android/android_kernel_samsung_sm8650-modules
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disp: msm: dp: park link clock before disconnecting

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In DP simulation mode, DP link clock's parent is driven
by usb pll clock, in case usb is disconnected during
DP simulation, those registers driven by DP link clock
cannot be accessed any more. In that case, put xo clock as
DP link clock's parent to keep the registers driven by
link clock still be accessible.

Change-Id: I2bbe6b92052284c7825f80348818d00557312a10
Signed-off-by: Yu Wu <quic_zwy@quicinc.com>
This commit is contained in:
Yu Wu 2024-06-07 13:09:59 +08:00
parent 912efcbdfe
commit 877e934a3a
2 changed files with 21 additions and 2 deletions
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7
msm/dp/dp_display.c
View File

@ -2015,6 +2015,10 @@ static void dp_display_disconnect_work(struct work_struct *work)
struct dp_display_private, disconnect_work);
dp_display_handle_disconnect(dp, false);
if (dp->debug->sim_mode && dp_display_state_is(DP_STATE_ABORTED))
dp_display_host_deinit(dp);
dp->debug->abort(dp->debug);
}
@ -2030,6 +2034,9 @@ static int dp_display_usb_notifier(struct notifier_block *nb,
dp_display_state_add(DP_STATE_ABORTED);
dp->ctrl->abort(dp->ctrl, true);
dp->aux->abort(dp->aux, true);
dp->power->park_clocks(dp->power);
queue_work(dp->wq, &dp->disconnect_work);
}

16
msm/dp/dp_power.c
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2024, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2012-2021, The Linux Foundation. All rights reserved.
*/
@ -33,6 +33,7 @@ struct dp_power_private {
bool strm1_clks_on;
bool strm0_clks_parked;
bool strm1_clks_parked;
bool link_clks_parked;
};
static int dp_power_regulator_init(struct dp_power_private *power)
@ -316,6 +317,9 @@ static int dp_power_park_module(struct dp_power_private *power, enum dp_pm_type
} else if (module == DP_STREAM1_PM) {
clk = power->pixel1_clk_rcg;
parked = &power->strm1_clks_parked;
} else if (module == DP_LINK_PM) {
clk = power->link_clk_rcg;
parked = &power->link_clks_parked;
} else {
goto exit;
}
@ -340,7 +344,7 @@ static int dp_power_park_module(struct dp_power_private *power, enum dp_pm_type
goto exit;
}
mp->clk_config->rate = XO_CLK_KHZ;
mp->clk_config->rate = XO_CLK_KHZ * 1000;
rc = msm_dss_clk_set_rate(mp->clk_config, mp->num_clk);
if (rc) {
DP_ERR("failed to set clk rate.\n");
@ -494,6 +498,8 @@ static int dp_power_clk_enable(struct dp_power *dp_power,
power->strm0_clks_parked = false;
if (pm_type == DP_STREAM1_PM)
power->strm1_clks_parked = false;
if (pm_type == DP_LINK_PM)
power->link_clks_parked = false;
/*
* This log is printed only when user connects or disconnects
@ -707,6 +713,12 @@ static int dp_power_park_clocks(struct dp_power *dp_power)
goto error;
}
rc = dp_power_park_module(power, DP_LINK_PM);
if (rc) {
DP_ERR("failed to park link clock. err=%d\n", rc);
goto error;
}
error:
return rc;
}