msm: kgsl: Fix page table base address comparison

For LPAC context ttbr0 base address will be having pagetable
base address and ASID field. During fault process identification
pagetable base address comparison will fail with ttbr0. Hence mask
ASID field from the ttbr0 to correctly match it with pagetable base.

Change-Id: I791a8bd1f1e7933ec655b32f11451c8efe4312d9
Signed-off-by: Hareesh Gundu <quic_hareeshg@quicinc.com>
This commit is contained in:
Hareesh Gundu 2022-10-24 16:43:06 -07:00 committed by Gerrit - the friendly Code Review server
parent 816e84eef7
commit 21504bd3ad
4 changed files with 7 additions and 3 deletions

View File

@ -877,7 +877,7 @@ static struct kgsl_process_private *setup_fault_process(struct kgsl_device *devi
u64 pt_ttbr0;
pt_ttbr0 = kgsl_mmu_pagetable_get_ttbr0(tmp->pagetable);
if ((pt_ttbr0 == hw_ptbase)
if ((pt_ttbr0 == MMU_SW_PT_BASE(hw_ptbase))
&& kgsl_process_private_get(tmp)) {
process = tmp;
break;

View File

@ -796,7 +796,7 @@ static struct kgsl_process_private *kgsl_iommu_get_process(u64 ptbase)
list_for_each_entry(p, &kgsl_driver.process_list, list) {
iommu_pt = to_iommu_pt(p->pagetable);
if (iommu_pt->ttbr0 == ptbase) {
if (iommu_pt->ttbr0 == MMU_SW_PT_BASE(ptbase)) {
if (!kgsl_process_private_get(p))
p = NULL;

View File

@ -229,7 +229,7 @@ kgsl_mmu_log_fault_addr(struct kgsl_mmu *mmu, u64 pt_base,
spin_lock(&kgsl_driver.ptlock);
list_for_each_entry(pt, &kgsl_driver.pagetable_list, list) {
if (kgsl_mmu_pagetable_get_ttbr0(pt) == pt_base) {
if (kgsl_mmu_pagetable_get_ttbr0(pt) == MMU_SW_PT_BASE(pt_base)) {
if ((addr & ~(PAGE_SIZE-1)) == pt->fault_addr) {
ret = 1;
break;

View File

@ -19,6 +19,10 @@
#define MMU_DEFAULT_TTBR0(_d) \
(kgsl_mmu_pagetable_get_ttbr0((_d)->mmu.defaultpagetable))
/* Mask ASID fields to match 48bit ptbase address*/
#define MMU_SW_PT_BASE(_ttbr0) \
(_ttbr0 & (BIT_ULL(KGSL_IOMMU_ASID_START_BIT) - 1))
#define KGSL_MMU_DEVICE(_mmu) \
container_of((_mmu), struct kgsl_device, mmu)