asoc: update MBHC ZDET logic for tambora
Update MBHC ZDET logic for tambora, Set TSMC/SMIC mode in init_reg function. Change-Id: I9b916d606ced5dc4ad691a6a53cc3fc27f860180 Signed-off-by: Yuhui Zhao <quic_yuhuzhao@quicinc.com>
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@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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@ -24,9 +24,10 @@
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#define WCD9378_ZDET_SUPPORTED true
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/* Z value defined in milliohm */
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#define WCD9378_ZDET_VAL_0 0
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#define WCD9378_ZDET_VAL_32 32000
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#define WCD9378_ZDET_VAL_400 400000
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#define WCD9378_ZDET_VAL_1200 1200000
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#define WCD9378_ZDET_VAL_2500 2500000
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#define WCD9378_ZDET_VAL_100K 100000000
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/* Z floating defined in ohms */
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#define WCD9378_ZDET_FLOATING_IMPEDANCE 0x0FFFFFFE
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@ -410,6 +411,7 @@ static inline void wcd9378_mbhc_get_result_params(struct wcd9378_priv *wcd9378,
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regmap_update_bits(wcd9378->regmap, WCD9378_ANA_MBHC_ZDET, 0x20, 0x00);
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x1 = WCD9378_MBHC_GET_X1(val);
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c1 = WCD9378_MBHC_GET_C1(val);
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/* If ramp is not complete, give additional 5ms */
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if ((c1 < 2) && x1)
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usleep_range(5000, 5050);
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@ -418,6 +420,7 @@ static inline void wcd9378_mbhc_get_result_params(struct wcd9378_priv *wcd9378,
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dev_dbg(wcd9378->dev,
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"%s: Impedance detect ramp error, c1=%d, x1=0x%x\n",
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__func__, c1, x1);
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*zdet = WCD9378_ZDET_VAL_0;
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goto ramp_down;
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}
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d1 = d1_a[c1];
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@ -524,10 +527,10 @@ static void wcd9378_wcd_mbhc_calc_impedance(struct wcd_mbhc *mbhc, uint32_t *zl,
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int zMono, z_diff1, z_diff2;
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bool is_fsm_disable = false;
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struct wcd9378_mbhc_zdet_param zdet_param[] = {
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{4, 0, 4, 0x08, 0x14, 0x18}, /* < 32ohm */
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{2, 0, 3, 0x18, 0x7C, 0x90}, /* 32ohm < Z < 400ohm */
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{1, 4, 5, 0x18, 0x7C, 0x90}, /* 400ohm < Z < 1200ohm */
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{1, 6, 7, 0x18, 0x7C, 0x90}, /* >1200ohm */
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{4, 0, 4, 0x08, 0x14, 0x18}, /* 0ohm < Z < 32ohm */
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{2, 0, 3, 0x20, 0x7C, 0x90}, /* 32ohm < Z < 400ohm */
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{2, 4, 6, 0x20, 0x7C, 0x90}, /* 400ohm < Z < 2500ohm */
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{2, 5, 7, 0x20, 0x7C, 0x90}, /* >2500ohm or < 0ohm */
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};
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struct wcd9378_mbhc_zdet_param *zdet_param_ptr = NULL;
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s16 d1_a[][4] = {
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@ -578,14 +581,16 @@ static void wcd9378_wcd_mbhc_calc_impedance(struct wcd_mbhc *mbhc, uint32_t *zl,
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goto left_ch_impedance;
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/* Second ramp for left ch */
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if (z1L < WCD9378_ZDET_VAL_32) {
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if ((z1L < WCD9378_ZDET_VAL_32) &&
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(z1L >= WCD9378_ZDET_VAL_0)) {
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zdet_param_ptr = &zdet_param[0];
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d1 = d1_a[0];
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} else if ((z1L > WCD9378_ZDET_VAL_400) &&
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(z1L <= WCD9378_ZDET_VAL_1200)) {
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(z1L <= WCD9378_ZDET_VAL_2500)) {
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zdet_param_ptr = &zdet_param[2];
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d1 = d1_a[2];
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} else if (z1L > WCD9378_ZDET_VAL_1200) {
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} else if ((z1L > WCD9378_ZDET_VAL_2500) ||
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(z1L < WCD9378_ZDET_VAL_0)) {
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zdet_param_ptr = &zdet_param[3];
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d1 = d1_a[3];
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}
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@ -607,19 +612,22 @@ left_ch_impedance:
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/* Start of right impedance ramp and calculation */
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wcd9378_mbhc_zdet_ramp(component, zdet_param_ptr, NULL, &z1R, d1);
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if (WCD9378_MBHC_IS_SECOND_RAMP_REQUIRED(z1R)) {
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if (((z1R > WCD9378_ZDET_VAL_1200) &&
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if ((((z1R > WCD9378_ZDET_VAL_2500) ||
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(z1R < WCD9378_ZDET_VAL_0)) &&
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(zdet_param_ptr->noff == 0x6)) ||
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((*zl) != WCD9378_ZDET_FLOATING_IMPEDANCE))
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goto right_ch_impedance;
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/* Second ramp for right ch */
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if (z1R < WCD9378_ZDET_VAL_32) {
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if ((z1R < WCD9378_ZDET_VAL_32) &&
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(z1R >= WCD9378_ZDET_VAL_0)) {
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zdet_param_ptr = &zdet_param[0];
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d1 = d1_a[0];
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} else if ((z1R > WCD9378_ZDET_VAL_400) &&
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(z1R <= WCD9378_ZDET_VAL_1200)) {
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(z1R <= WCD9378_ZDET_VAL_2500)) {
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zdet_param_ptr = &zdet_param[2];
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d1 = d1_a[2];
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} else if (z1R > WCD9378_ZDET_VAL_1200) {
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} else if ((z1L > WCD9378_ZDET_VAL_2500) ||
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(z1L < WCD9378_ZDET_VAL_0)) {
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zdet_param_ptr = &zdet_param[3];
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d1 = d1_a[3];
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}
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@ -240,6 +240,18 @@ static int wcd9378_swr_slv_get_current_bank(struct swr_device *dev, u8 devnum)
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static int wcd9378_init_reg(struct snd_soc_component *component)
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{
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u32 val = 0;
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val = snd_soc_component_read(component, WCD9378_EFUSE_REG_16);
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if (!val)
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snd_soc_component_update_bits(component, WCD9378_MBHC_CTL_SPARE_1,
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WCD9378_MBHC_CTL_SPARE_1_BIASGEN_RES_CTRL_MASK,
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0x03);
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else
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snd_soc_component_update_bits(component, WCD9378_MBHC_CTL_SPARE_1,
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WCD9378_MBHC_CTL_SPARE_1_BIASGEN_RES_CTRL_MASK,
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0x01);
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/*0.9 Volts*/
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snd_soc_component_update_bits(component, WCD9378_SLEEP_CTL,
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WCD9378_SLEEP_CTL_BG_CTL_MASK, 0x0E);
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