Andrew Bresticker f521ac8b39 clk: exynos5250: register APLL rate table
Register the APLL rate table so that we can set the APLL rate from
the cpufreq driver.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-01-08 18:01:49 +01:00
..
2013-12-19 11:45:17 -08:00
2013-12-01 12:42:45 -08:00
2013-12-19 17:47:33 -08:00
2013-03-19 17:20:30 -07:00
2013-11-04 12:23:18 -08:00
2012-08-31 11:05:18 -07:00
2013-05-31 12:07:45 -07:00
2013-12-27 17:45:08 -08:00
2013-12-27 17:45:08 -08:00