9c52aaf756
With this patch we add documentation for: * power-management-unit: the PMU is used to bring up the cores during SMP operations * sram: among other things the sram is used to store the first code executed by the core when it is powered up * cpu-enable-method: the CPU enable method used by Amlogic Meson8 and Meson8b SoCs Signed-off-by: Carlo Caione <carlo@endlessm.com> [also add Meson8 to the documentation] Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
33 lines
875 B
Plaintext
33 lines
875 B
Plaintext
Amlogic Meson8 and Meson8b SRAM for smp bringup:
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------------------------------------------------
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Amlogic's SMP-capable SoCs use part of the sram for the bringup of the cores.
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Once the core gets powered up it executes the code that is residing at a
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specific location.
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Therefore a reserved section sub-node has to be added to the mmio-sram
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declaration.
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Required sub-node properties:
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- compatible : depending on the SoC this should be one of:
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"amlogic,meson8-smp-sram"
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"amlogic,meson8b-smp-sram"
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The rest of the properties should follow the generic mmio-sram discription
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found in ../../misc/sram.txt
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Example:
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sram: sram@d9000000 {
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compatible = "mmio-sram";
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reg = <0xd9000000 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0xd9000000 0x20000>;
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smp-sram@1ff80 {
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compatible = "amlogic,meson8b-smp-sram";
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reg = <0x1ff80 0x8>;
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};
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};
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