daf695fca8
Since "s3c-fb: Automatically calculate pixel clock when none is given", there's no need for manually calculating the pixel clock anymore so remove these lines and add the correct refresh rate where appropriately. Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com> Cc: Pawel Osciak <p.osciak@samsung.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: InKi Dae <inki.dae@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
148 lines
3.5 KiB
C
148 lines
3.5 KiB
C
/* linux/arch/arm/mach-s5pv210/mach-aquila.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/serial_core.h>
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#include <linux/fb.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <mach/map.h>
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#include <mach/regs-clock.h>
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#include <mach/regs-fb.h>
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#include <plat/regs-serial.h>
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#include <plat/s5pv210.h>
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#include <plat/devs.h>
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#include <plat/cpu.h>
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#include <plat/fb.h>
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/* Following are default values for UCON, ULCON and UFCON UART registers */
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#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
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S3C2410_UCON_RXILEVEL | \
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S3C2410_UCON_TXIRQMODE | \
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S3C2410_UCON_RXIRQMODE | \
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S3C2410_UCON_RXFIFO_TOI | \
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S3C2443_UCON_RXERR_IRQEN)
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#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
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#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
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S5PV210_UFCON_TXTRIG4 | \
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S5PV210_UFCON_RXTRIG4)
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static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = S5PV210_UCON_DEFAULT,
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.ulcon = S5PV210_ULCON_DEFAULT,
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.ufcon = S5PV210_UFCON_DEFAULT,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = S5PV210_UCON_DEFAULT,
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.ulcon = S5PV210_ULCON_DEFAULT,
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.ufcon = S5PV210_UFCON_DEFAULT,
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},
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = S5PV210_UCON_DEFAULT,
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.ulcon = S5PV210_ULCON_DEFAULT,
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.ufcon = S5PV210_UFCON_DEFAULT,
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},
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[3] = {
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.hwport = 3,
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.flags = 0,
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.ucon = S5PV210_UCON_DEFAULT,
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.ulcon = S5PV210_ULCON_DEFAULT,
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.ufcon = S5PV210_UFCON_DEFAULT,
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},
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};
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/* Frame Buffer */
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static struct s3c_fb_pd_win aquila_fb_win0 = {
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.win_mode = {
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.left_margin = 16,
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.right_margin = 16,
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.upper_margin = 3,
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.lower_margin = 28,
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.hsync_len = 2,
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.vsync_len = 2,
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.xres = 480,
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.yres = 800,
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},
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.max_bpp = 32,
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.default_bpp = 16,
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};
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static struct s3c_fb_pd_win aquila_fb_win1 = {
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.win_mode = {
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.left_margin = 16,
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.right_margin = 16,
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.upper_margin = 3,
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.lower_margin = 28,
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.hsync_len = 2,
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.vsync_len = 2,
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.xres = 480,
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.yres = 800,
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},
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.max_bpp = 32,
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.default_bpp = 16,
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};
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static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
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.win[0] = &aquila_fb_win0,
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.win[1] = &aquila_fb_win1,
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.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
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.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
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VIDCON1_INV_VCLK | VIDCON1_INV_VDEN,
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.setup_gpio = s5pv210_fb_gpio_setup_24bpp,
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};
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static struct platform_device *aquila_devices[] __initdata = {
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&s3c_device_fb,
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};
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static void __init aquila_map_io(void)
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{
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s5p_init_io(NULL, 0, S5P_VA_CHIPID);
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s3c24xx_init_clocks(24000000);
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s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
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}
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static void __init aquila_machine_init(void)
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{
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/* FB */
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s3c_fb_set_platdata(&aquila_lcd_pdata);
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platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices));
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}
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MACHINE_START(AQUILA, "Aquila")
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/* Maintainers:
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Marek Szyprowski <m.szyprowski@samsung.com>
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Kyungmin Park <kyungmin.park@samsung.com> */
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.phys_io = S3C_PA_UART & 0xfff00000,
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.io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
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.boot_params = S5P_PA_SDRAM + 0x100,
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.init_irq = s5pv210_init_irq,
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.map_io = aquila_map_io,
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.init_machine = aquila_machine_init,
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.timer = &s3c24xx_timer,
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MACHINE_END
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