d98d0a990c
The values non secure EL1 needs to use for PMR and RPR registers depends on the value of SCR_EL3.FIQ. The values non secure EL1 sees from the distributor and redistributor depend on whether security is enabled for the GIC or not. To avoid having to deal with two sets of values for PMR masking/unmasking, only enable pseudo-NMIs when GIC has non-secure view of priorities. Also, add firmware requirements related to SCR_EL3. Signed-off-by: Julien Thierry <julien.thierry@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| .. | ||
| acpi_object_usage.txt | ||
| arm-acpi.txt | ||
| booting.txt | ||
| cpu-feature-registers.txt | ||
| elf_hwcaps.txt | ||
| hugetlbpage.txt | ||
| legacy_instructions.txt | ||
| memory.txt | ||
| pointer-authentication.txt | ||
| silicon-errata.txt | ||
| sve.txt | ||
| tagged-pointers.txt | ||