Christoph Hellwig b9490350f7 RISC-V: remove timer leftovers ...

This code is currently unused and will be added back later in a different
place with the real interrupt and clocksource support.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>

2018-08-13 08:31:30 -07:00

..

configs

RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig

2018-06-11 09:16:24 -07:00

include

RISC-V: Add definiion of extract symbol's index and type for 32-bit

2018-07-04 13:54:08 -07:00

kernel

RISC-V: remove timer leftovers

2018-08-13 08:31:30 -07:00

lib

RISC-V: implement __lshrti3.

2018-08-13 08:31:30 -07:00

mm

RISC-V: Add conditional macro for zone of DMA32

2018-07-04 13:53:21 -07:00

Kconfig

RISC-V: Select GENERIC_UCMPDI2 on RV32I

2018-07-04 13:53:33 -07:00

Makefile

RISC-V: implement __lshrti3.

2018-08-13 08:31:30 -07:00