Florian Fainelli b4b32e3216 soc: brcmstb: biuctrl: Fine tune B53 MCP interface settings
In order to achieve expected MCP bus throughput on 3 particular chips:
7268, 7271 and 7278, do the appropriate programming of the MCP
interface: increase number of MCP write credits, turn on write-back
throttling when present.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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