Jim Wilson 758914fea2 RISC-V: Don't increment sepc after breakpoint. ...

Adding 4 to sepc is pointless, and is wrong if we executed a 2-byte
compressed breakpoint.  This plus a corresponding gdb patch allows
compressed breakpoints to work in gdb.  Gdb maintainers have already
agreed that this is the right approach.

Signed-off-by: Jim Wilson <jimw@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>

2018-08-13 08:31:30 -07:00

..

configs

RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig

2018-06-11 09:16:24 -07:00

include

RISC-V: Add definiion of extract symbol's index and type for 32-bit

2018-07-04 13:54:08 -07:00

kernel

RISC-V: Don't increment sepc after breakpoint.

2018-08-13 08:31:30 -07:00

lib

RISC-V: implement __lshrti3.

2018-08-13 08:31:30 -07:00

mm

RISC-V: Add conditional macro for zone of DMA32

2018-07-04 13:53:21 -07:00

Kconfig

RISC-V: Select GENERIC_UCMPDI2 on RV32I

2018-07-04 13:53:33 -07:00

Makefile

RISC-V: implement __lshrti3.

2018-08-13 08:31:30 -07:00