Sinan Kaya 6b2f1351af PCI: Wait for device to become ready after secondary bus reset
Setting Secondary Bus Reset of a downstream port sends a hot reset.  PCIe
r4.0, sec 2.3.1, Request Handling Rules, indicates that a device can return
CRS Completion Status following such a reset.  Wait until the device
becomes ready in that situation.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
2018-03-05 08:10:14 -06:00
..
2018-02-01 11:40:07 -06:00
2018-02-06 09:59:40 -08:00
2018-02-09 09:44:25 -08:00
2018-02-06 09:59:40 -08:00
2018-02-01 11:40:07 -06:00
2018-02-01 11:40:07 -06:00
2018-02-06 09:59:40 -08:00
2018-01-18 12:55:24 -06:00
2018-02-01 11:40:07 -06:00
2018-02-01 11:40:07 -06:00
2018-02-01 11:40:07 -06:00
2018-02-01 11:40:07 -06:00
2018-02-06 09:59:40 -08:00
2018-02-01 11:40:07 -06:00
2018-01-31 10:13:07 -06:00
2018-02-01 11:40:07 -06:00
2018-02-01 11:40:07 -06:00
2018-02-01 11:40:07 -06:00
2018-01-18 12:55:24 -06:00
2018-02-01 11:40:07 -06:00