487d9fc501
Update the MMCIF driver to include register information and register access functions in the header file. The MMCIF boot code builds on top of this. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
72 lines
1.9 KiB
C
72 lines
1.9 KiB
C
/*
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* include/linux/mmc/sh_mmcif.h
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*
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* platform data for eMMC driver
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*
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* Copyright (C) 2010 Renesas Solutions Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*
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*/
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#ifndef __SH_MMCIF_H__
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#define __SH_MMCIF_H__
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#include <linux/platform_device.h>
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#include <linux/io.h>
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/*
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* MMCIF : CE_CLK_CTRL [19:16]
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* 1000 : Peripheral clock / 512
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* 0111 : Peripheral clock / 256
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* 0110 : Peripheral clock / 128
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* 0101 : Peripheral clock / 64
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* 0100 : Peripheral clock / 32
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* 0011 : Peripheral clock / 16
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* 0010 : Peripheral clock / 8
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* 0001 : Peripheral clock / 4
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* 0000 : Peripheral clock / 2
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* 1111 : Peripheral clock (sup_pclk set '1')
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*/
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struct sh_mmcif_plat_data {
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void (*set_pwr)(struct platform_device *pdev, int state);
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void (*down_pwr)(struct platform_device *pdev);
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u8 sup_pclk; /* 1 :SH7757, 0: SH7724/SH7372 */
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unsigned long caps;
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u32 ocr;
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};
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#define MMCIF_CE_CMD_SET 0x00000000
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#define MMCIF_CE_ARG 0x00000008
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#define MMCIF_CE_ARG_CMD12 0x0000000C
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#define MMCIF_CE_CMD_CTRL 0x00000010
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#define MMCIF_CE_BLOCK_SET 0x00000014
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#define MMCIF_CE_CLK_CTRL 0x00000018
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#define MMCIF_CE_BUF_ACC 0x0000001C
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#define MMCIF_CE_RESP3 0x00000020
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#define MMCIF_CE_RESP2 0x00000024
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#define MMCIF_CE_RESP1 0x00000028
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#define MMCIF_CE_RESP0 0x0000002C
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#define MMCIF_CE_RESP_CMD12 0x00000030
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#define MMCIF_CE_DATA 0x00000034
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#define MMCIF_CE_INT 0x00000040
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#define MMCIF_CE_INT_MASK 0x00000044
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#define MMCIF_CE_HOST_STS1 0x00000048
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#define MMCIF_CE_HOST_STS2 0x0000004C
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#define MMCIF_CE_VERSION 0x0000007C
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extern inline u32 sh_mmcif_readl(void __iomem *addr, int reg)
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{
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return readl(addr + reg);
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}
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extern inline void sh_mmcif_writel(void __iomem *addr, int reg, u32 val)
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{
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writel(val, addr + reg);
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}
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#endif /* __SH_MMCIF_H__ */
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