f07d3e39f0
commit da3cc91b8db403728cde03c8a95cba268d8cbf1b upstream.
The commit 4d689b619445 ("iommu/io-pgtable-arm-v7s: Convert to IOMMU API
TLB sync") help move the tlb_sync of unmap from v7s into the iommu
framework. It helps add a new function "mtk_iommu_iotlb_sync", But it
lacked the lock, then it will cause the variable "tlb_flush_active"
may be changed unexpectedly, we could see this warning log randomly:
mtk-iommu 10205000.iommu: Partial TLB flush timed out, falling back to
full flush
The HW requires tlb_flush/tlb_sync in pairs strictly, this patch adds
a new tlb_lock for tlb operations to fix this issue.
Fixes: 4d689b619445 ("iommu/io-pgtable-arm-v7s: Convert to IOMMU API TLB sync")
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
95 lines
2.0 KiB
C
95 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2016 MediaTek Inc.
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* Author: Honghui Zhang <honghui.zhang@mediatek.com>
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*/
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#ifndef _MTK_IOMMU_H_
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#define _MTK_IOMMU_H_
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/io-pgtable.h>
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#include <linux/iommu.h>
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#include <linux/list.h>
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#include <linux/spinlock.h>
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#include <soc/mediatek/smi.h>
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struct mtk_iommu_suspend_reg {
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u32 standard_axi_mode;
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u32 dcm_dis;
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u32 ctrl_reg;
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u32 int_control0;
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u32 int_main_control;
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u32 ivrp_paddr;
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u32 vld_pa_rng;
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};
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enum mtk_iommu_plat {
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M4U_MT2701,
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M4U_MT2712,
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M4U_MT8173,
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M4U_MT8183,
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};
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struct mtk_iommu_plat_data {
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enum mtk_iommu_plat m4u_plat;
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bool has_4gb_mode;
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/* HW will use the EMI clock if there isn't the "bclk". */
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bool has_bclk;
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bool has_vld_pa_rng;
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bool reset_axi;
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unsigned char larbid_remap[MTK_LARB_NR_MAX];
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};
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struct mtk_iommu_domain;
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struct mtk_iommu_data {
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void __iomem *base;
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int irq;
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struct device *dev;
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struct clk *bclk;
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phys_addr_t protect_base; /* protect memory base */
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struct mtk_iommu_suspend_reg reg;
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struct mtk_iommu_domain *m4u_dom;
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struct iommu_group *m4u_group;
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bool enable_4GB;
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bool tlb_flush_active;
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spinlock_t tlb_lock; /* lock for tlb range flush */
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struct iommu_device iommu;
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const struct mtk_iommu_plat_data *plat_data;
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struct list_head list;
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struct mtk_smi_larb_iommu larb_imu[MTK_LARB_NR_MAX];
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};
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static inline int compare_of(struct device *dev, void *data)
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{
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return dev->of_node == data;
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}
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static inline void release_of(struct device *dev, void *data)
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{
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of_node_put(data);
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}
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static inline int mtk_iommu_bind(struct device *dev)
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{
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struct mtk_iommu_data *data = dev_get_drvdata(dev);
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return component_bind_all(dev, &data->larb_imu);
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}
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static inline void mtk_iommu_unbind(struct device *dev)
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{
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struct mtk_iommu_data *data = dev_get_drvdata(dev);
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component_unbind_all(dev, &data->larb_imu);
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}
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#endif
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