Fabrice Gasnier 76740fd8c6 counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update ... [ Upstream commit fd5ac974fc25feed084c2d1599d0dddb4e0556bc ] The ARR (auto reload register) and CMP (compare) registers are successively written. The status bits to check the update of these registers are polled together with regmap_read_poll_timeout(). The condition to end the loop may become true, even if one of the register isn't correctly updated. So ensure both status bits are set before clearing them. Fixes: d8958824cf ("iio: counter: Add support for STM32 LPTimer") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20221123133609.465614-1-fabrice.gasnier@foss.st.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2023-01-18 11:41:24 +01:00
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104-quad-8.c	counter: 104-quad-8: Return error when invalid mode during ceiling_write	2021-09-15 09:47:34 +02:00
counter.c
ftm-quaddec.c	counter/ftm-quaddec: Use device-managed registration API	2019-07-27 22:55:27 +01:00
Kconfig	Second set of IIO fixes for the 5.2 cycle.	2019-06-17 22:28:29 +02:00
Makefile	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
stm32-lptimer-cnt.c	counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update	2023-01-18 11:41:24 +01:00
stm32-timer-cnt.c	counter: stm32-timer-cnt: fix ceiling miss-alignment with reload register	2021-04-14 08:24:09 +02:00