Define CPU interface offsets for the GICC_ABPR, GICC_APR, and GICC_IIDR
registers. Define distributor registers for the GICD_SPENDSGIR and the
GICD_CPENDSGIR. KVM/ARM needs to know about these definitions to fully
support save/restore of the VGIC.
Also define some masks and shifts for the various GICH_VMCR fields.
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
0307e1770f