a4b5bd9abc
SB1 cache exception handling.
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Expand SB1 cache error handling by adding SB1_CEX_ALWAYS_FATAL and
SB1_CEX_STALL, allowing configurable behavior on cache errors.
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:48 +01:00
93ce2f524e
Add support for SB1A CPU.
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Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:46 +01:00
750ccf687f
Fix zero length sys_cacheflush
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Cacheflush(0, 0, 0) was crashing the system. This is because
flush_icache_range(start, end) tries to flushing whole address space
(0 - ~0UL) if both start and end are zero.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:44 +01:00
6ec25809c1
Rename page argument of flush_cache_page to something more descriptive.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:42 +01:00
dbc571690e
Fix wrong comment.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:38 +01:00
ec917c2c1a
Fixup a few lose ends in explicit support for MIPS R1/R2.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:37 +01:00
65f1f5a2c3
Don't copy SB1 cache error handler to uncached memory.
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This may have made sense on a paranoid day with pass 1 BCM1250 processors
that were throwing cache error exception left and right for no good
reason. On modern silicion that hardly makes sense and the code had
gotten just an obscurity ...
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:34 +01:00
46dc3a4a09
Fix stale comment in c-sb1.c.
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Signed-Off-By: Andrew Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:33 +01:00
02cf211968
Cleanup the mess in cpu_cache_init.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:32 +01:00
f5cfa980e5
Use R4000 TLB routines for SB1 also.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:31 +01:00
9043f7e95d
Sync c-tx39.c with c-r4k.c.
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tx39_flush_cache_range() does nothing if !cpu_has_dc_aliases. It should
flush d-cache and invalidate i-cache since the TX39(H2) has separate I/D
cache.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:28 +01:00
10a3dabddd
Add/Fix missing bit of R4600 hit cacheop workaround.
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Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:18 +01:00
02fe2c9ce3
Minor code cleanup.
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Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:17 +01:00
f5b4d9563b
R4600 v2.0 needs a nop before tlbp.
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Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:17 +01:00
424cadae94
Don't set up a sg dma address if we have no page address for some reason.
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Code cleanup.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:17 +01:00
d8748a3abf
More .set push/pop.
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Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:16 +01:00
330cfe016b
Let r4600 PRID detection match only legacy CPUs, cleanups.
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Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:15 +01:00
7623debf26
Handle mtc0 - tlb write hazard for VR5432.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:12 +01:00
1d40cfcd34
Avoid SMP cacheflushes. This is a minor optimization of startup but
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will also avoid smp_call_function from doing stupid things when called
from a CPU that is not yet marked online.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:54 +01:00
bdf21b18b4
Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:54 +01:00
e01402b115
More AP / SP bits for the 34K, the Malta bits and things. Still wants
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a little polishing.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:53 +01:00
ec74e361f1
Mark a few variables __read_mostly.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:46 +01:00
cc61c1fede
MIPS R2 instruction hazard handling.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:46 +01:00
bbc7f22f6d
Detect the 34K.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:45 +01:00
60080265a1
Define kmap_atomic_pfn() for MIPS.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:42 +01:00
3ef33e68c1
Date: Fri Jul 8 20:10:17 2005 +0000
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Those literals are long.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:40 +01:00
6e760c8dae
Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:37 +01:00
2c93e12cfe
Avoid tlbw* hazards for the R4600/R4700/R5000.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:34 +01:00
c3455b0efc
Inline ioremap() calls for constant addresses that map to KSEG1.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:34 +01:00
4c0a2d4275
Fix the diagnostic dump for the XTLB refill handler.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:32 +01:00
41986a6e7e
Fix a diagnostic message.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:32 +01:00
c6ad7b7d3c
Use macros for the RM7k cp0.config bits instead of magic numbers.
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Minor clean-ups.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:28 +01:00
fded2e508a
Optimize R3k TLB Load/Store/Modified handlers, by scheduling
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delay slots properly and avoiding an unnecessary jump to a jump.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:22 +01:00
d925c262dd
Fill R3k load delay slots properly.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:21 +01:00
9678e28b1a
Only dump instructions actually emitted.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:21 +01:00
63b2d2f4d2
Handle _PAGE_DIRTY correctly for CONFIG_64BIT_PHYS_ADDR on 32bit CPUs.
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Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:11 +01:00
ba5187dbb4
Better interface to run uncached cache setup code.
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Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:11 +01:00
1342f7e6c5
Arrested for multiple offences of header file inclusion.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:07 +01:00
172546bf60
Fix race conditions for read_c0_entryhi. Remove broken ASID masks in
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tlb-sb1.c. Make tlb-r4k.c and tlb-sb1.c more similiar and more efficient.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:01 +01:00
202d0388e7
Remove useless casts. Fix formatting.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:00 +01:00
1b3a6e975c
Fix 64bit SMP TLB handler and stack frame handling, optimize 32bit SMP
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TLB handlers a bit, match definitions in pgtable-{32,64}.h better.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:00 +01:00
6cbe063159
R4300 delay slot.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:59 +01:00
53de0d471f
Reformat; cosmetic cleanups.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:57 +01:00
9ff77c469e
Export shm_align_mask and flush_data_cache_page.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:54 +01:00
77c728c224
Gcc 4.0 fixes.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:53 +01:00
fe00f943e0
Sparseify MIPS.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:50 +01:00
e3ad1c23ba
Base Au1200 2.6 support.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:47 +01:00
685f779e60
Fix initialization. Unbreak the wait-for-completion loops. Code cleanup.
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Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:44 +01:00
65bda1a95d
Switch SiByte drivers back to __raw_*() functions.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:44 +01:00
16033d6104
Handle addresses beyond VMALLOC_END correctly.
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Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:38 +01:00
