87847 Commits

Author SHA1 Message Date
1fe40f6d39 ARM: KVM: Add newlines to panic strings
The panic strings are hard to read and on narrow terminals some
characters are simply truncated off the panic message.

Make is slightly prettier with a newline in the Hyp panic strings.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-08-30 15:48:02 -07:00
6833d83891 ARM: KVM: Work around older compiler bug
Compilers before 4.6 do not behave well with unnamed fields in structure
initializers and therefore produces build errors:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=10676

By refering to the unnamed union using braces, both older and newer
compilers produce the same result.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reported-by: Russell King <linux@arm.linux.org.uk>
Tested-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-08-30 15:47:58 -07:00
6e72cc5700 ARM: KVM: Simplify tracepoint text
The tracepoint for kvm_guest_fault was extremely long, make it a
slightly bit shorter.

Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-08-30 15:47:53 -07:00
0963e5d0f2 ARM: KVM: Fix kvm_set_pte assignment
THe kvm_set_pte function was actually assigning the entire struct to the
structure member, which should work because the structure only has that
one member, but it is still not very nice.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-08-30 15:47:37 -07:00
326b16db9f arm64: delay: don't bother reporting bogomips in /proc/cpuinfo
We always use a timer-backed delay loop for arm64, so don't bother
reporting a bogomips value which appears to confuse some people.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-08-30 18:47:07 +01:00
a2bdc32a52 ARM: dts: vexpress: Add CCI node to TC2 device-tree
The Versatile Express V2P-CA15_A7 (aka TC2) has a CCI-400 which is
needed to get Multi-Cluster Power Management (MCPM) working.

Signed-off-by: Jon Medhurst <tixy@linaro.org>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-30 09:32:07 -07:00
947bf103fc ARC: [ASID] Track ASID allocation cycles/generations
This helps remove asid-to-mm reverse map

While mm->context.id contains the ASID assigned to a process, our ASID
allocator also used asid_mm_map[] reverse map. In a new allocation
cycle (mm->ASID >= @asid_cache), the Round Robin ASID allocator used this
to check if new @asid_cache belonged to some mm2 (from prev cycle).
If so, it could locate that mm using the ASID reverse map, and mark that
mm as unallocated ASID, to force it to refresh at the time of switch_mm()

However, for SMP, the reverse map has to be maintained per CPU, so
becomes 2 dimensional, hence got rid of it.

With reverse map gone, it is NOT possible to reach out to current
assignee. So we track the ASID allocation generation/cycle and
on every switch_mm(), check if the current generation of CPU ASID is
same as mm's ASID; If not it is refreshed.

(Based loosely on arch/sh implementation)

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30 21:42:19 +05:30
c60115537c ARC: [ASID] activate_mm() == switch_mm()
ASID allocation changes/2

Use the fact that switch_mm() and activate_mm() are exactly same code
now while acknowledging the semantical difference in comment

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30 21:42:19 +05:30
3daa48d1d9 ARC: [ASID] get_new_mmu_context() to conditionally allocate new ASID
ASID allocation changes/1

This patch does 2 things:

(1) get_new_mmu_context() NOW moves mm->ASID to a new value ONLY if it
    was from a prev allocation cycle/generation OR if mm had no ASID
    allocated (vs. before would unconditionally moving to a new ASID)

    Callers desiring unconditional update of ASID, e.g.local_flush_tlb_mm()
    (for parent's address space invalidation at fork) need to first force
    the parent to an unallocated ASID.

(2) get_new_mmu_context() always sets the MMU PID reg with unchanged/new
    ASID value.

The gains are:
- consolidation of all asid alloc logic into get_new_mmu_context()
- avoiding code duplication in switch_mm() for PID reg setting
- Enables future change to fold activate_mm() into switch_mm()

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30 21:42:18 +05:30
5bd87adf9b ARC: [ASID] Refactor the TLB paranoid debug code
-Asm code already has values of SW and HW ASID values, so they can be
 passed to the printing routine.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30 21:42:18 +05:30
ade922f8e2 ARC: [ASID] Remove legacy/unused debug code
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30 21:42:17 +05:30
a718e10cba tile: handle super huge pages in virt_to_pte
This tile-specific API had a minor bug, in that if a super huge (>4GB)
page mapped a particular address range, we wouldn't handle it correctly.
As part of fixing that bug, I also cleaned up some of the pud and pmd
accessors to make them more consistent.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:57:02 -04:00
35f059761c tilegx: change how we find the kernel stack
Previously, we used a special-purpose register (SPR_SYSTEM_SAVE_K_0)
to hold the CPU number and the top of the current kernel stack
by using the low bits to hold the CPU number, and using the high
bits to hold the address of the page just above where we'd want
the kernel stack to be.  That way we could initialize a new SP
when first entering the kernel by just masking the SPR value and
subtracting a couple of words.

However, it's actually more useful to be able to place an arbitrary
kernel-top value in the SPR.  This allows us to create a new stack
context (e.g. for virtualization) with an arbitrary top-of-stack VA.
To make this work, we now store the CPU number in the high bits,
above the highest legal VA bit (42 bits in the current tilegx
microarchitecture).  The full 42 bits are thus available to store the
top of stack value.  Getting the current cpu (a relatively common
operation) is still fast; it's now a shift rather than a mask.

We make this change only for tilegx, since tilepro has too few SPR
bits to do this, and we don't need this support on tilepro anyway.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:58 -04:00
4036c7d354 tile: don't call show_regs_print_info() with corrupt current
We use the validate_current() API to make sure that "current" seems
plausible before using it.  With the new show_regs_print_info()
API, we want to check that current is OK before calling it, since
otherwise we will end up in a recursive panic.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:54 -04:00
6fbeee29a2 tile: fix some -Wsign-compare warnings
Normally the build doesn't include these warnings, but at one
point I built with -Wsign-compare, and noticed a few things that
are technically bugs.  This change fixes those things.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:50 -04:00
e56059f2d3 tile: group .hottext* sections properly in vmlinux.lds
With this change such sections are grouped with regular text
in the vmlinux image; this change puts them at the front,
which is where the standard Linux includes .text.hot*.
This change should fix a recently-observed bug where a bunch of
symbols were being omitted from the /proc/kallsyms output
because they fell between _etext and _sinittext.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:46 -04:00
c0f0601060 tile: fix strncpy_from_user bug
In strncpy_from_user_asm, when the destination buffer length was the
same as the actual string length, we were returning the size of the
destination buffer.  But since it's a NUL terminated string, we should
return the length of the string instead.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:42 -04:00
084fe6a0f5 tile: remove set/clear_fixmap APIs
Nothing in the codebase was using them, and as written they took
"unsigned long" as the physical address rather than "phys_addr_t",
which is wrong on tilepro anyway.  Rather than fixing stale APIs,
just remove them; if there's ever demand for them on this platform,
we can put them back.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:38 -04:00
abe3265a6d tile: do less L1 I-cache eviction
We had been doing an automatic full eviction of the L1 I$
everywhere whenever we did a kernel-space TLB flush.  It turns
out this isn't necessary, since all the callers already handle
doing a flush if necessary.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:34 -04:00
6f0142d501 tile: allow "initrd" boot argument for kexec
This enables support for "kexec --initrd" for tile.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:30 -04:00
b2eca4274c tile: support ASLR fully
With this change, tile Linux now supports address-space layout
randomization for shared objects, stack, heap and vdso.

Acked-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Tony Lu <zlu@tilera.com>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:25 -04:00
9b5bbf729d tile: correct r1 value during syscall tracing
The r1 value is set based on the r0 value as we return to user space.
So tracing tools won't automatically see the right value.  Fix this by
generating the correct r1 value in do_syscall_trace_exit() rather
than trying to tamper with the hot path in syscall return.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:20 -04:00
8d8cf06740 tile: fix panic with large IRQ number
The "available_irqs" value needs to actually reflect the IRQs
available, not just start as an all-ones mask, since we only
have 32 IRQs available even on a 64-bit platform.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:16 -04:00
d4d9eab4ad tile: use proper .align directives on __ex_table sections
This may fix a reported bug where an R_TILEGX_64 in a module was not
pointing to an aligned address.

Reported-by: Simon Marchi <simon.marchi@polymtl.ca>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:56:11 -04:00
3fa17c395b tile: support kprobes on tilegx
This change includes support for Kprobes, Jprobes and Return Probes.

Reviewed-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Signed-off-by: Tony Lu <zlu@tilera.com>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 11:55:53 -04:00
a61fd5e366 tile: support ftrace on tilegx
This commit adds support for static ftrace, graph function support,
and dynamic tracer support.

Signed-off-by: Tony Lu <zlu@tilera.com>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-08-30 10:20:13 -04:00
a9f6cf965e Merge branch 'kvm-ppc-next' of git://github.com/agraf/linux-2.6 into queue
* 'kvm-ppc-next' of git://github.com/agraf/linux-2.6:
  KVM: PPC: Book3S PR: Rework kvmppc_mmu_book3s_64_xlate()
  KVM: PPC: Book3S PR: Make instruction fetch fallback work for system calls
  KVM: PPC: Book3S PR: Don't corrupt guest state when kernel uses VMX
  KVM: PPC: Book3S: Fix compile error in XICS emulation
  KVM: PPC: Book3S PR: return appropriate error when allocation fails
  arch: powerpc: kvm: add signed type cast for comparation
  powerpc/kvm: Copy the pvr value after memset
  KVM: PPC: Book3S PR: Load up SPRG3 register with guest value on guest entry
  kvm/ppc/booke: Don't call kvm_guest_enter twice
  kvm/ppc: Call trace_hardirqs_on before entry
  KVM: PPC: Book3S HV: Allow negative offsets to real-mode hcall handlers
  KVM: PPC: Book3S HV: Correct tlbie usage
  powerpc/kvm: Use 256K chunk to track both RMA and hash page table allocation.
  powerpc/kvm: Contiguous memory allocator based RMA allocation
  powerpc/kvm: Contiguous memory allocator based hash page table allocation
  KVM: PPC: Book3S: Ignore DABR register
  mm/cma: Move dma contiguous changes into a seperate config
2013-08-30 15:33:11 +03:00
c85fa502ef Merge remote-tracking branch 'asoc/topic/samsung' into tmp 2013-08-30 11:04:29 +01:00
c79c33af8f Merge remote-tracking branch 'asoc/topic/core' into tmp 2013-08-30 11:04:14 +01:00
2245932155 s390/pci: use virtual memory for iommu bitmap
The bitmap used to mark dma mappings can be quite large on systems
with huge amounts of memory. Use virtual memory for this bitmap.

Suggested-by: Alexander Schmidt <alexschm@de.ibm.com>
Reviewed-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-08-30 08:57:24 +02:00
57b5918c33 s390/pci: update function handle after resume from hibernate
Function handles may change while the system was in hibernation
use list pci functions and update the function handles.

Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-08-30 08:57:20 +02:00
d03abe5882 s390/pci: try harder to modify a function
In rare situations a PCI function can report a busy condition
when we issue the modify pci function command. A temporary busy
condition can exceed 1 second but not 2 seconds. Increase the
time until we report an error to 2 seconds. Also increase the
time we sleep between the retries to reduce the load in this
case.

Suggested-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-08-30 08:57:18 +02:00
1d57896638 s390/pci: split lpf
List pci functions is used to query and iterate over pci functions.
This function currently has 2 users - initial device discovery and
rescan after a machine check. Instead of having a multipurpose
function pass a callback which gets called for each pci function.

Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-08-30 08:57:17 +02:00
77e844b964 s390/hibernate: add early resume function
Some functions that do arch specific resume actions are called
directly from swsusp_asm64.S . Before we add another function call
provide a generic s390_early_resume function which can be used
for this purpose.

Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-08-30 08:57:15 +02:00
0ff70ec88b s390/pci: add recover sysfs knob
Add an arch specific attribute to recover a pci function from an
error state or config space blockage.

Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-08-30 08:57:12 +02:00
cb80918287 s390/pci: use claim_resource
Use pci_claim_resource to find and request bus ressources in
pcibios_add_device. Also move some (de)initialization stuff to
pcibios_enable_device/pcibios_disable_device.

Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-08-30 08:57:10 +02:00
67f43f38ee s390/pci/hotplug: convert to be builtin only
Convert s390' pci hotplug to be builtin only, with no module option.

Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-08-30 08:57:07 +02:00
c0857f5d0e ARC: No need to flush the TLB in early boot
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30 10:48:14 +05:30
483e9bcb01 ARC: MMUv4 preps/3 - Abstract out TLB Insert/Delete
This reorganizes the current TLB operations into psuedo-ops to better
pair with MMUv4's native Insert/Delete operations

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30 10:22:48 +05:30
d091fcb97f ARC: MMUv4 preps/2 - Reshuffle PTE bits
With previous commit freeing up PTE bits, reassign them so as to:

- Match the bit to H/w counterpart where possible
  (e.g. MMUv2 GLOBAL/PRESENT, this avoids a shift in create_tlb())
- Avoid holes in _PAGE_xxx definitions

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30 10:19:12 +05:30
2bbc31ef2b Omap fixes for the merge window that are not urgent enough
for the -rc series.
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Merge tag 'omap-for-v3.12/fixes-non-critical-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical

From Tony Lindgren:
Omap fixes for the merge window that are not urgent enough
for the -rc series.

* tag 'omap-for-v3.12/fixes-non-critical-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2: use 'int' instead of 'unsigned' for variable 'gpmc_irq_start'
  ARM: OMAP2: remove useless variable 'ret'
  ARM: OMAP: dma: fix error return code in omap_system_dma_probe()
  ARM: OMAP2+: fix wrong address when loading PRM_FRAC_INCREMENTOR_DENUMERATOR_RELOAD
  ARM: OMAP2+: am33xx-restart: trigger warm reset on omap2+ boards
  ARM: OMAP2: Use a consistent AM33XX SoC option description
  ARM: OMAP2+: Remove legacy device creation for McPDM and DMIC
  + Linux 3.11-rc6
2013-08-29 19:12:04 -07:00
7323f21953 ARM: OMAP2+: Add back the define for AM33XX_RST_GLOBAL_WARM_SW_MASK
This is needed to prevent a build error with a patch queued for fixes
"ARM: OMAP2+: am33xx-restart: trigger warm reset on omap2+ boards".

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29 19:10:59 -07:00
7658ea2fb5 ARM: shmobile: r8a7779: Update early timer initialisation order
a894fcc2d01a89e6fe3da0845a4d80a5312e1124 ("ARM: smp_twd: Divorce smp_twd
from local timer API") altered twd_local_timer_common_register() so that it
may make use of late_timer_init.

This is problematic on marzen with Magnus's recent patch "ARM: shmobile:
marzen: Switch to DT_MACHINE_START" which switches marzen around to enable
USE_OF and thus shmobile_timer_init(), which is registered as
late_time_init by shmobile_earlytimer_init() stops being a no-op.

As a work-around I have updated r8a7779_earlytimer_init() so that
shmobile_earlytimer_init() is called after r8a7779_register_twd().
Or in other words, the shmobile_earlytimer_init() setting of
late_time_init overwrites that of twd_local_timer_common_register().

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Magnus Damm <damm@opensource.se>
2013-08-30 09:31:39 +09:00
d296ebe0e6 Add basic support for devices on dra7xx by adding the PRCM and hwmod
parts the same way as for other omaps. This is still needed in
 addition to device tree support for things like power management.
 
 Via Paul Walmsley <paul@pwsan.com>:
 
 This series adds basic TI DRA7xx PRCM and hwmod support.
 
 Basic test logs are available here:
 
 http://www.pwsan.com/omap/testlogs/dra7xx_prcm_devel_v3.12/20130823050445/
 
 Note that DRA7xx could not be tested locally, since I don't have a board.
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Merge tag 'omap-for-v3.12/dra7xx-prcm' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/all

From Tony Lindgren:
Add basic support for devices on dra7xx by adding the PRCM and hwmod
parts the same way as for other omaps. This is still needed in
addition to device tree support for things like power management.

Via Paul Walmsley <paul@pwsan.com>:

This series adds basic TI DRA7xx PRCM and hwmod support.

Basic test logs are available here:

http://www.pwsan.com/omap/testlogs/dra7xx_prcm_devel_v3.12/20130823050445/

Note that DRA7xx could not be tested locally, since I don't have a board.

* tag 'omap-for-v3.12/dra7xx-prcm' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP: DRA7: Enable PM framework initializations
  ARM: OMAP: DRA7: hwmod: Create initial DRA7XX SoC data
  ARM: OMAP: DRA7: Reuse the omap44xx_restart and fix the device instance
  ARM: OMAP: DRA7: powerdomain: Handle missing vc/vp
  ARM: OMAP: DRA7: powerdomain: Add DRA7XX data and update header
  ARM: OMAP: DRA7: clockdomain: Add DRA7XX data and update header
  ARM: OMAP: DRA7: PRCM: Add DRA7XX local MPU PRCM regsiters
  ARM: OMAP: DRA7: CM: Add minimal regbit shifts
  ARM: OMAP: DRA7: CM: Add DRA7XX register defines
  ARM: OMAP: DRA7: PRM: Add DRA7XX register definitions
  ARM: DRA7: Add the build support in omap2plus
  ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5
  ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs'
  ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512
  ARM: DRA7: board-generic: Add basic DT support
  ARM: DRA7: Resue the clocksource, clockevent support
  ARM: DRA7: Reuse io tables and add a new .init_early
  ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29 16:46:14 -07:00
65cb771fdf OMAP PRCM and hwmod fixes and improvments via Paul Walmsley <paul@pwsan.com>:
Various OMAP PRCM & hwmod fixes and improvements.  Notable changes
 include:
 
 - a fix for OMAP4 PLL locking to avoid a bootloader dependency that
   causes nasty log spew on startup
 
 - AM33xx DEBUGSS support fixes in hwmod data
 
 - OMAP5 mailbox support in hwmod data
 
 Basic test logs are here:
 
 http://www.pwsan.com/omap/testlogs/prcm_a_for_v3.12/20130823125002/
 
 Note that the 3530 failure is due to the mysterious transient serial
 issue affecting 3530 for several releases now, which causes a log
 parsing failure.  PM still seems to work.
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Merge tag 'omap-for-v3.12/prcm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/all

From Tony Lindgren:
OMAP PRCM and hwmod fixes and improvments via Paul Walmsley <paul@pwsan.com>:

Various OMAP PRCM & hwmod fixes and improvements.  Notable changes
include:

- a fix for OMAP4 PLL locking to avoid a bootloader dependency that
  causes nasty log spew on startup

- AM33xx DEBUGSS support fixes in hwmod data

- OMAP5 mailbox support in hwmod data

Basic test logs are here:

http://www.pwsan.com/omap/testlogs/prcm_a_for_v3.12/20130823125002/

Note that the 3530 failure is due to the mysterious transient serial
issue affecting 3530 for several releases now, which causes a log
parsing failure.  PM still seems to work.

* tag 'omap-for-v3.12/prcm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP: AM33xx: clock: Add RNG clock data
  ARM: OMAP: TI81XX: add always-on powerdomain for TI81XX
  ARM: OMAP4: clock: Lock PLLs in the right sequence
  ARM: OMAP: AM33XX: hwmod: Add hwmod data for debugSS
  ARM: OMAP2+: Only write the sysconfig on idle when necessary
  ARM: OMAP5: hwmod data: Add mailbox data

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29 16:38:28 -07:00
3616257f30 Updates for Highbank for 3.12:
- A couple of fixes to enable LPAE.
 - pl08x driver fixes to make it build with ARCH_DMA_ADDR_T_64BIT.
 - Avoid L2 related smc calls on Midway.
 - Add selecting of necesssary ARM errata.
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Merge tag 'highbank-for-3.12' of git://sources.calxeda.com/kernel/linux into late/all

From Rob Herring:
Updates for Highbank for 3.12:
- A couple of fixes to enable LPAE.
- pl08x driver fixes to make it build with ARCH_DMA_ADDR_T_64BIT.
- Avoid L2 related smc calls on Midway.
- Add selecting of necesssary ARM errata.

* tag 'highbank-for-3.12' of git://sources.calxeda.com/kernel/linux:
  ARM: highbank: clean-up some unused includes
  ARM: highbank: avoid L2 cache smc calls when PL310 is not present
  ARM: move outer_cache declaration out of ifdef
  ARM: highbank: select ARCH_DMA_ADDR_T_64BIT for LPAE
  DMA: fix printk warning in AMBA PL08x DMA driver
  DMA: fix AMBA PL08x compilation issue with 64bit DMA address type
  ARM: highbank: select required errata work-arounds
  ARM: highbank: select ARCH_HAS_HOLES_MEMORYMODEL
  ARM: highbank: enable DMA zone for LPAE
  ARM: use phys_addr_t for DMA zone sizes

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29 14:09:04 -07:00
6f244c9ccf AT91 SoC update for 3.12 take 1
- enable kernel uncompress information output for
   SoC where it was missing: at91sam9n12 and sama5d3
 - addition of at91rm9200 to the generic at91_dt_defconfig
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Merge tag 'at91-soc' of git://github.com/at91linux/linux-at91 into late/all

From Nicolas Ferre:
AT91 SoC update for 3.12 take 1
- enable kernel uncompress information output for
  SoC where it was missing: at91sam9n12 and sama5d3
- addition of at91rm9200 to the generic at91_dt_defconfig

* tag 'at91-soc' of git://github.com/at91linux/linux-at91:
  ARM: at91: at91_dt_defconfig: enable rm9200 support
  ARM: at91: sam9n12: enable kernel uncompress info output
  ARM: at91: sama5: enable kernel uncompress info output
  ARM: at91: include sama5d3.h into hardware.h
  ARM: at91: sama5d3: add definition for usart base address
2013-08-29 14:07:34 -07:00
ef2fd3b15b Allwinner DT changes for 3.12, take 4
These patches enables the gated clocks on the A10s, A20 and A31 DTSI.
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Merge tag 'sunxi-dt-for-3.12-4' of https://github.com/mripard/linux into late/all

From Maxime Ripard:
Allwinner DT changes for 3.12, take 3 and 4

These patches add support for:
  - The cubieboard2 board
  - The pinctrl driver that got merged for the A20 and A31
  - The associated muxing for the A20 and A31 boards already supported
  - Enables the gated clocks on the A10s, A20 and A31 DTSI.

* tag 'sunxi-dt-for-3.12-4' of https://github.com/mripard/linux:
  ARM: sun7i: Enable the A20 clocks in the DTSI
  ARM: sun6i: Enable clock support in the DTSI
  ARM: sun5i: dt: Use the A10s gates in the DTSI
  ARM: sun7i: Add Cubieboard2 Device Tree
  ARM: sun7i: a20-olinuxino: Enable the user LED
  ARM: sun7i: a20-olinuxino: Enable UARTs muxing
  ARM: sun7i: DT: Add UART muxing options to the DTSI
  ARM: sun7i: Add the PIO controller node to the DTSI
  ARM: sun6i: colombus: Add uart0 muxing
  ARM: sun6i: Add UART0 muxing options
  ARM: sunxi: dt: Add PIO controller to A31 DTSI

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29 14:00:28 -07:00
9120c0bea9 iio: at91: Use different prescal, startup mask in MR for different IP
For at91 boards, there are different IPs for adc. Different IPs has different
STARTUP & PRESCAL mask in ADC_MR.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2013-08-29 21:49:28 +01:00
e1811f97ba iio: at91: introduce the multiple compatible string for different IPs.
As use the multiple compatible string, we can remove hardware register in dt.

CC: devicetree@vger.kernel.org
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2013-08-29 21:45:04 +01:00