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ARM: mx5: Use common function for configuring AIPS

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Now that a common imx_set_aips() function is available, use it on mx51 and mx53.

This lets the code smaller and cleaner.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Fabio Estevam 2012-03-02 07:45:58 -03:00 committed by Sascha Hauer
parent 192cfd5877
commit aa6a9fa1f2
2 changed files with 8 additions and 36 deletions
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36
arch/arm/mach-imx/cpu-imx5.c
View File

@ -149,39 +149,3 @@ int mx50_revision(void)
return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx50_revision);
static int __init post_cpu_init(void)
{
unsigned int reg;
void __iomem *base;
if (cpu_is_mx51() || cpu_is_mx53()) {
if (cpu_is_mx51())
base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR);
else
base = MX53_IO_ADDRESS(MX53_AIPS1_BASE_ADDR);
__raw_writel(0x0, base + 0x40);
__raw_writel(0x0, base + 0x44);
__raw_writel(0x0, base + 0x48);
__raw_writel(0x0, base + 0x4C);
reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
__raw_writel(reg, base + 0x50);
if (cpu_is_mx51())
base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR);
else
base = MX53_IO_ADDRESS(MX53_AIPS2_BASE_ADDR);
__raw_writel(0x0, base + 0x40);
__raw_writel(0x0, base + 0x44);
__raw_writel(0x0, base + 0x48);
__raw_writel(0x0, base + 0x4C);
reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
__raw_writel(reg, base + 0x50);
}
return 0;
}
postcore_initcall(post_cpu_init);

8
arch/arm/mach-imx/mm-imx5.c
View File

@ -191,6 +191,10 @@ void __init imx51_soc_init(void)
/* i.mx51 has the i.mx35 type sdma */
imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
/* Setup AIPS registers */
imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR));
imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR));
}
void __init imx53_soc_init(void)
@ -206,4 +210,8 @@ void __init imx53_soc_init(void)
/* i.mx53 has the i.mx35 type sdma */
imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
/* Setup AIPS registers */
imx_set_aips(MX53_IO_ADDRESS(MX53_AIPS1_BASE_ADDR));
imx_set_aips(MX53_IO_ADDRESS(MX53_AIPS2_BASE_ADDR));
}