sfc: Rework the bitfield header so that we can identify fields by bit number
This will support register self-tests. From: Steve Hodgson <shodgson@solarflare.com> Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Ben Hutchings
Jeff Garzik
parent
2467ca46b6
commit
a515089c96
@ -52,9 +52,9 @@
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*
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* The maximum width mask that can be generated is 64 bits.
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*/
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#define EFX_MASK64(field) \
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(EFX_WIDTH(field) == 64 ? ~((u64) 0) : \
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(((((u64) 1) << EFX_WIDTH(field))) - 1))
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#define EFX_MASK64(width) \
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((width) == 64 ? ~((u64) 0) : \
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(((((u64) 1) << (width))) - 1))
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/* Mask equal in width to the specified field.
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*
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@ -63,9 +63,9 @@
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* The maximum width mask that can be generated is 32 bits. Use
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* EFX_MASK64 for higher width fields.
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*/
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#define EFX_MASK32(field) \
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(EFX_WIDTH(field) == 32 ? ~((u32) 0) : \
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(((((u32) 1) << EFX_WIDTH(field))) - 1))
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#define EFX_MASK32(width) \
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((width) == 32 ? ~((u32) 0) : \
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(((((u32) 1) << (width))) - 1))
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/* A doubleword (i.e. 4 byte) datatype - little-endian in HW */
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typedef union efx_dword {
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@ -138,44 +138,49 @@ typedef union efx_oword {
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EFX_EXTRACT_NATIVE(le32_to_cpu(element), min, max, low, high)
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#define EFX_EXTRACT_OWORD64(oword, low, high) \
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(EFX_EXTRACT64((oword).u64[0], 0, 63, low, high) | \
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EFX_EXTRACT64((oword).u64[1], 64, 127, low, high))
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((EFX_EXTRACT64((oword).u64[0], 0, 63, low, high) | \
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EFX_EXTRACT64((oword).u64[1], 64, 127, low, high)) & \
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EFX_MASK64(high + 1 - low))
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#define EFX_EXTRACT_QWORD64(qword, low, high) \
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EFX_EXTRACT64((qword).u64[0], 0, 63, low, high)
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(EFX_EXTRACT64((qword).u64[0], 0, 63, low, high) & \
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EFX_MASK64(high + 1 - low))
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#define EFX_EXTRACT_OWORD32(oword, low, high) \
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(EFX_EXTRACT32((oword).u32[0], 0, 31, low, high) | \
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EFX_EXTRACT32((oword).u32[1], 32, 63, low, high) | \
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EFX_EXTRACT32((oword).u32[2], 64, 95, low, high) | \
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EFX_EXTRACT32((oword).u32[3], 96, 127, low, high))
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((EFX_EXTRACT32((oword).u32[0], 0, 31, low, high) | \
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EFX_EXTRACT32((oword).u32[1], 32, 63, low, high) | \
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EFX_EXTRACT32((oword).u32[2], 64, 95, low, high) | \
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EFX_EXTRACT32((oword).u32[3], 96, 127, low, high)) & \
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EFX_MASK32(high + 1 - low))
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#define EFX_EXTRACT_QWORD32(qword, low, high) \
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(EFX_EXTRACT32((qword).u32[0], 0, 31, low, high) | \
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EFX_EXTRACT32((qword).u32[1], 32, 63, low, high))
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((EFX_EXTRACT32((qword).u32[0], 0, 31, low, high) | \
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EFX_EXTRACT32((qword).u32[1], 32, 63, low, high)) & \
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EFX_MASK32(high + 1 - low))
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#define EFX_EXTRACT_DWORD(dword, low, high) \
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EFX_EXTRACT32((dword).u32[0], 0, 31, low, high)
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#define EFX_EXTRACT_DWORD(dword, low, high) \
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(EFX_EXTRACT32((dword).u32[0], 0, 31, low, high) & \
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EFX_MASK32(high + 1 - low))
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#define EFX_OWORD_FIELD64(oword, field) \
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(EFX_EXTRACT_OWORD64(oword, EFX_LOW_BIT(field), EFX_HIGH_BIT(field)) \
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& EFX_MASK64(field))
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#define EFX_OWORD_FIELD64(oword, field) \
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EFX_EXTRACT_OWORD64(oword, EFX_LOW_BIT(field), \
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EFX_HIGH_BIT(field))
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#define EFX_QWORD_FIELD64(qword, field) \
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(EFX_EXTRACT_QWORD64(qword, EFX_LOW_BIT(field), EFX_HIGH_BIT(field)) \
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& EFX_MASK64(field))
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#define EFX_QWORD_FIELD64(qword, field) \
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EFX_EXTRACT_QWORD64(qword, EFX_LOW_BIT(field), \
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EFX_HIGH_BIT(field))
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#define EFX_OWORD_FIELD32(oword, field) \
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(EFX_EXTRACT_OWORD32(oword, EFX_LOW_BIT(field), EFX_HIGH_BIT(field)) \
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& EFX_MASK32(field))
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#define EFX_OWORD_FIELD32(oword, field) \
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EFX_EXTRACT_OWORD32(oword, EFX_LOW_BIT(field), \
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EFX_HIGH_BIT(field))
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#define EFX_QWORD_FIELD32(qword, field) \
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(EFX_EXTRACT_QWORD32(qword, EFX_LOW_BIT(field), EFX_HIGH_BIT(field)) \
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& EFX_MASK32(field))
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#define EFX_QWORD_FIELD32(qword, field) \
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EFX_EXTRACT_QWORD32(qword, EFX_LOW_BIT(field), \
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EFX_HIGH_BIT(field))
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#define EFX_DWORD_FIELD(dword, field) \
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(EFX_EXTRACT_DWORD(dword, EFX_LOW_BIT(field), EFX_HIGH_BIT(field)) \
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& EFX_MASK32(field))
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#define EFX_DWORD_FIELD(dword, field) \
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EFX_EXTRACT_DWORD(dword, EFX_LOW_BIT(field), \
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EFX_HIGH_BIT(field))
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#define EFX_OWORD_IS_ZERO64(oword) \
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(((oword).u64[0] | (oword).u64[1]) == (__force __le64) 0)
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@ -417,63 +422,85 @@ typedef union efx_oword {
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(oword).u64[1] = ~((oword).u64[1]); \
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} while (0)
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#define EFX_INSERT_FIELD64(...) \
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cpu_to_le64(EFX_INSERT_FIELD_NATIVE(__VA_ARGS__))
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#define EFX_INSERT64(min, max, low, high, value) \
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cpu_to_le64(EFX_INSERT_NATIVE(min, max, low, high, value))
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#define EFX_INSERT_FIELD32(...) \
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cpu_to_le32(EFX_INSERT_FIELD_NATIVE(__VA_ARGS__))
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#define EFX_INSERT32(min, max, low, high, value) \
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cpu_to_le32(EFX_INSERT_NATIVE(min, max, low, high, value))
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#define EFX_INPLACE_MASK64(min, max, field) \
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EFX_INSERT_FIELD64(min, max, field, EFX_MASK64(field))
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#define EFX_INPLACE_MASK64(min, max, low, high) \
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EFX_INSERT64(min, max, low, high, EFX_MASK64(high + 1 - low))
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#define EFX_INPLACE_MASK32(min, max, field) \
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EFX_INSERT_FIELD32(min, max, field, EFX_MASK32(field))
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#define EFX_INPLACE_MASK32(min, max, low, high) \
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EFX_INSERT32(min, max, low, high, EFX_MASK32(high + 1 - low))
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#define EFX_SET_OWORD_FIELD64(oword, field, value) do { \
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#define EFX_SET_OWORD64(oword, low, high, value) do { \
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(oword).u64[0] = (((oword).u64[0] \
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& ~EFX_INPLACE_MASK64(0, 63, field)) \
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| EFX_INSERT_FIELD64(0, 63, field, value)); \
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& ~EFX_INPLACE_MASK64(0, 63, low, high)) \
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| EFX_INSERT64(0, 63, low, high, value)); \
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(oword).u64[1] = (((oword).u64[1] \
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& ~EFX_INPLACE_MASK64(64, 127, field)) \
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| EFX_INSERT_FIELD64(64, 127, field, value)); \
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& ~EFX_INPLACE_MASK64(64, 127, low, high)) \
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| EFX_INSERT64(64, 127, low, high, value)); \
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} while (0)
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#define EFX_SET_QWORD_FIELD64(qword, field, value) do { \
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#define EFX_SET_QWORD64(qword, low, high, value) do { \
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(qword).u64[0] = (((qword).u64[0] \
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& ~EFX_INPLACE_MASK64(0, 63, field)) \
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| EFX_INSERT_FIELD64(0, 63, field, value)); \
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& ~EFX_INPLACE_MASK64(0, 63, low, high)) \
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| EFX_INSERT64(0, 63, low, high, value)); \
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} while (0)
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#define EFX_SET_OWORD_FIELD32(oword, field, value) do { \
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#define EFX_SET_OWORD32(oword, low, high, value) do { \
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(oword).u32[0] = (((oword).u32[0] \
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& ~EFX_INPLACE_MASK32(0, 31, field)) \
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| EFX_INSERT_FIELD32(0, 31, field, value)); \
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& ~EFX_INPLACE_MASK32(0, 31, low, high)) \
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| EFX_INSERT32(0, 31, low, high, value)); \
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(oword).u32[1] = (((oword).u32[1] \
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& ~EFX_INPLACE_MASK32(32, 63, field)) \
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| EFX_INSERT_FIELD32(32, 63, field, value)); \
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& ~EFX_INPLACE_MASK32(32, 63, low, high)) \
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| EFX_INSERT32(32, 63, low, high, value)); \
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(oword).u32[2] = (((oword).u32[2] \
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& ~EFX_INPLACE_MASK32(64, 95, field)) \
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| EFX_INSERT_FIELD32(64, 95, field, value)); \
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& ~EFX_INPLACE_MASK32(64, 95, low, high)) \
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| EFX_INSERT32(64, 95, low, high, value)); \
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(oword).u32[3] = (((oword).u32[3] \
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& ~EFX_INPLACE_MASK32(96, 127, field)) \
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| EFX_INSERT_FIELD32(96, 127, field, value)); \
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& ~EFX_INPLACE_MASK32(96, 127, low, high)) \
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| EFX_INSERT32(96, 127, low, high, value)); \
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} while (0)
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#define EFX_SET_QWORD_FIELD32(qword, field, value) do { \
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#define EFX_SET_QWORD32(qword, low, high, value) do { \
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(qword).u32[0] = (((qword).u32[0] \
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& ~EFX_INPLACE_MASK32(0, 31, field)) \
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| EFX_INSERT_FIELD32(0, 31, field, value)); \
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& ~EFX_INPLACE_MASK32(0, 31, low, high)) \
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| EFX_INSERT32(0, 31, low, high, value)); \
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(qword).u32[1] = (((qword).u32[1] \
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& ~EFX_INPLACE_MASK32(32, 63, field)) \
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| EFX_INSERT_FIELD32(32, 63, field, value)); \
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& ~EFX_INPLACE_MASK32(32, 63, low, high)) \
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| EFX_INSERT32(32, 63, low, high, value)); \
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} while (0)
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#define EFX_SET_DWORD_FIELD(dword, field, value) do { \
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(dword).u32[0] = (((dword).u32[0] \
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& ~EFX_INPLACE_MASK32(0, 31, field)) \
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| EFX_INSERT_FIELD32(0, 31, field, value)); \
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#define EFX_SET_DWORD32(dword, low, high, value) do { \
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(dword).u32[0] = (((dword).u32[0] \
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& ~EFX_INPLACE_MASK32(0, 31, low, high)) \
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| EFX_INSERT32(0, 31, low, high, value)); \
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} while (0)
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#define EFX_SET_OWORD_FIELD64(oword, field, value) \
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EFX_SET_OWORD64(oword, EFX_LOW_BIT(field), \
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EFX_HIGH_BIT(field), value)
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#define EFX_SET_QWORD_FIELD64(qword, field, value) \
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EFX_SET_QWORD64(qword, EFX_LOW_BIT(field), \
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EFX_HIGH_BIT(field), value)
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#define EFX_SET_OWORD_FIELD32(oword, field, value) \
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EFX_SET_OWORD32(oword, EFX_LOW_BIT(field), \
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EFX_HIGH_BIT(field), value)
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#define EFX_SET_QWORD_FIELD32(qword, field, value) \
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EFX_SET_QWORD32(qword, EFX_LOW_BIT(field), \
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EFX_HIGH_BIT(field), value)
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#define EFX_SET_DWORD_FIELD(dword, field, value) \
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EFX_SET_DWORD32(dword, EFX_LOW_BIT(field), \
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EFX_HIGH_BIT(field), value)
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#if BITS_PER_LONG == 64
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#define EFX_SET_OWORD_FIELD EFX_SET_OWORD_FIELD64
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#define EFX_SET_QWORD_FIELD EFX_SET_QWORD_FIELD64
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@ -1147,8 +1147,8 @@ struct falcon_nvconfig_board_v3 {
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#define SPI_DEV_TYPE_ERASE_SIZE_WIDTH 5
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#define SPI_DEV_TYPE_BLOCK_SIZE_LBN 24
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#define SPI_DEV_TYPE_BLOCK_SIZE_WIDTH 5
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#define SPI_DEV_TYPE_FIELD(type, field) \
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(((type) >> EFX_LOW_BIT(field)) & EFX_MASK32(field))
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#define SPI_DEV_TYPE_FIELD(type, field) \
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(((type) >> EFX_LOW_BIT(field)) & EFX_MASK32(EFX_WIDTH(field)))
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#define NVCONFIG_BASE 0x300
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#define NVCONFIG_BOARD_MAGIC_NUM 0xFA1C
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