ARM: dts: Add DT for Hitex LPC4350 Evaluation Board

Add basic support for Hitex LPC4350 Evaluation Board. Board
features a LPC4350 Soc, 8 MB SDRAM, 8 MB SPI Flash, USB and
Ethernet.

More information can be found on:
http://www.hitex.com/index.php?id=3212

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@gmail.com>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Ariel D'Alessandro 2015-05-12 00:00:52 +02:00 committed by Arnd Bergmann
parent 56bd3771e6
commit 7dfc635894
4 changed files with 86 additions and 0 deletions

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@ -95,6 +95,7 @@ haoyu Haoyu Microelectronic Co. Ltd.
himax Himax Technologies, Inc. himax Himax Technologies, Inc.
hisilicon Hisilicon Limited. hisilicon Hisilicon Limited.
hit Hitachi Ltd. hit Hitachi Ltd.
hitex Hitex Development Tools
honeywell Honeywell honeywell Honeywell
hp Hewlett Packard hp Hewlett Packard
i2se I2SE GmbH i2se I2SE GmbH

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@ -208,6 +208,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-ts419-6281.dtb \ kirkwood-ts419-6281.dtb \
kirkwood-ts419-6282.dtb kirkwood-ts419-6282.dtb
dtb-$(CONFIG_ARCH_LPC18XX) += \ dtb-$(CONFIG_ARCH_LPC18XX) += \
lpc4350-hitex-eval.dtb \
lpc4357-ea4357-devkit.dtb lpc4357-ea4357-devkit.dtb
dtb-$(CONFIG_ARCH_LPC32XX) += \ dtb-$(CONFIG_ARCH_LPC32XX) += \
ea3250.dtb phy3250.dtb ea3250.dtb phy3250.dtb

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@ -0,0 +1,45 @@
/*
* Hitex LPC4350 Evaluation Board
*
* Copyright 2015 Ariel D'Alessandro <ariel.dalessandro@gmail.com>
*
* This code is released using a dual license strategy: BSD/GPL
* You can choose the licence that better fits your requirements.
*
* Released under the terms of 3-clause BSD License
* Released under the terms of GNU General Public License Version 2.0
*
*/
/dts-v1/;
#include "lpc18xx.dtsi"
#include "lpc4350.dtsi"
/ {
model = "Hitex LPC4350 Evaluation Board";
compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
};
chosen {
stdout-path = &uart0;
};
memory {
device_type = "memory";
reg = <0x28000000 0x800000>; /* 8 MB */
};
};
&pll1 {
clock-mult = <15>;
};
&uart0 {
status = "okay";
};

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@ -0,0 +1,39 @@
/*
* NXP LPC4350 and LPC4330 SoC
*
* Copyright 2015 Ariel D'Alessandro <ariel.dalessandro@gmail.com>
*
* This code is released using a dual license strategy: BSD/GPL
* You can choose the licence that better fits your requirements.
*
* Released under the terms of 3-clause BSD License
* Released under the terms of GNU General Public License Version 2.0
*
*/
/ {
compatible = "nxp,lpc4350", "nxp,lpc4330";
cpus {
cpu@0 {
compatible = "arm,cortex-m4";
};
};
soc {
sram0: sram@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */
};
sram1: sram@10080000 {
compatible = "mmio-sram";
reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */
};
sram2: sram@20000000 {
compatible = "mmio-sram";
reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
};
};
};