This is the 5.4.220 stable release
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ALSA: usb-audio: Fix potential memory leaks ALSA: usb-audio: Fix NULL dererence at error path ALSA: hda/realtek: remove ALC289_FIXUP_DUAL_SPK for Dell 5530 ALSA: hda/realtek: Correct pin configs for ASUS G533Z ALSA: hda/realtek: Add quirk for ASUS GV601R laptop ALSA: hda/realtek: Add Intel Reference SSID to support headset keys mtd: rawnand: atmel: Unmap streaming DMA mappings cifs: destage dirty pages before re-reading them for cache=none cifs: Fix the error length of VALIDATE_NEGOTIATE_INFO message iio: dac: ad5593r: Fix i2c read protocol requirements iio: pressure: dps310: Refactor startup procedure iio: pressure: dps310: Reset chip after timeout usb: add quirks for Lenovo OneLink+ Dock can: kvaser_usb: Fix use of uninitialized completion can: kvaser_usb_leaf: Fix overread with an invalid command can: kvaser_usb_leaf: Fix TX queue out of sync after restart can: kvaser_usb_leaf: Fix CAN state after restart mmc: sdhci-sprd: Fix minimum clock limit fs: dlm: fix race between test_bit() and queue_work() fs: dlm: handle -EBUSY first in lock arg validation HID: multitouch: Add memory barriers quota: Check next/prev free block number after reading from quota file ASoC: wcd9335: fix order of Slimbus unprepare/disable regulator: qcom_rpm: Fix circular deferral regression RISC-V: Make port I/O string accessors actually work parisc: fbdev/stifb: Align graphics memory size to 4MB riscv: Allow PROT_WRITE-only mmap() riscv: Pass -mno-relax only on lld < 15.0.0 UM: cpuinfo: Fix a warning for CONFIG_CPUMASK_OFFSTACK PCI: Sanitise firmware BAR assignments behind a PCI-PCI bridge powerpc/boot: Explicitly disable usage of SPE instructions fbdev: smscufx: Fix use-after-free in ufx_ops_open() btrfs: fix race between quota enable and quota rescan ioctl f2fs: increase the limit for reserve_root f2fs: fix to do sanity check on destination blkaddr during recovery f2fs: fix to do sanity check on summary info nilfs2: fix use-after-free bug of struct nilfs_root jbd2: wake up journal waiters in FIFO order, not LIFO ext4: avoid crash when inline data creation follows DIO write ext4: fix null-ptr-deref in ext4_write_info ext4: make ext4_lazyinit_thread freezable ext4: place buffer head allocation before handle start livepatch: fix race between fork and KLP transition ftrace: Properly unset FTRACE_HASH_FL_MOD ring-buffer: Allow splice to read previous partially read pages ring-buffer: Have the shortest_full queue be the shortest not longest ring-buffer: Check pending waiters when doing wake ups as well ring-buffer: Fix race between reset page and reading page media: cedrus: Set the platform driver data earlier KVM: x86/emulator: Fix handing of POP SS to correctly set interruptibility KVM: nVMX: Unconditionally purge queued/injected events on nested "exit" KVM: VMX: Drop bits 31:16 when shoving exception error code into VMCS gcov: support GCC 12.1 and newer compilers drm/nouveau: fix a use-after-free in nouveau_gem_prime_import_sg_table() selinux: use "grep -E" instead of "egrep" tracing: Disable interrupt or preemption before acquiring arch_spinlock_t userfaultfd: open userfaultfds with O_RDONLY sh: machvec: Use char[] for section boundaries ARM: 9247/1: mm: set readonly for MT_MEMORY_RO with ARM_LPAE nfsd: Fix a memory leak in an error handling path wifi: ath10k: add peer map clean up for peer delete in ath10k_sta_state() wifi: mac80211: allow bw change during channel switch in mesh bpftool: Fix a wrong type cast in btf_dumper_int x86/resctrl: Fix to restore to original value when re-enabling hardware prefetch register wifi: rtl8xxxu: tighten bounds checking in rtl8xxxu_read_efuse() spi: qup: add missing clk_disable_unprepare on error in spi_qup_resume() spi: qup: add missing clk_disable_unprepare on error in spi_qup_pm_resume_runtime() wifi: rtl8xxxu: Fix skb misuse in TX queue selection bpf: btf: fix truncated last_member_type_id in btf_struct_resolve wifi: rtl8xxxu: gen2: Fix mistake in path B IQ calibration net: fs_enet: Fix wrong check in do_pd_setup bpf: Ensure correct locking around vulnerable function find_vpid() x86/microcode/AMD: Track patch allocation size explicitly spi/omap100k:Fix PM disable depth imbalance in omap1_spi100k_probe netfilter: nft_fib: Fix for rpath check with VRF devices spi: s3c64xx: Fix large transfers with DMA vhost/vsock: Use kvmalloc/kvfree for larger packets. mISDN: fix use-after-free bugs in l1oip timer handlers sctp: handle the error returned from sctp_auth_asoc_init_active_key tcp: fix tcp_cwnd_validate() to not forget is_cwnd_limited net: rds: don't hold sock lock when cancelling work from rds_tcp_reset_callbacks() bnx2x: fix potential memory leak in bnx2x_tpa_stop() net/ieee802154: reject zero-sized raw_sendmsg() once: add DO_ONCE_SLOW() for sleepable contexts net: mvpp2: fix mvpp2 debugfs leak drm: bridge: adv7511: fix CEC power down control register offset drm/mipi-dsi: Detach devices when removing the host platform/chrome: fix double-free in chromeos_laptop_prepare() platform/chrome: fix memory corruption in ioctl platform/x86: msi-laptop: Fix old-ec check for backlight registering platform/x86: msi-laptop: Fix resource cleanup drm: fix drm_mipi_dbi build errors drm/bridge: megachips: Fix a null pointer dereference bug ASoC: rsnd: Add check for rsnd_mod_power_on ALSA: hda: beep: Simplify keep-power-at-enable behavior drm/omap: dss: Fix refcount leak bugs mmc: au1xmmc: Fix an error handling path in au1xmmc_probe() ASoC: eureka-tlv320: Hold reference returned from of_find_xxx API drm/msm/dpu: index dpu_kms->hw_vbif using vbif_idx ALSA: dmaengine: increment buffer pointer atomically mmc: wmt-sdmmc: Fix an error handling path in wmt_mci_probe() ASoC: wm8997: Fix PM disable depth imbalance in wm8997_probe ASoC: wm5110: Fix PM disable depth imbalance in wm5110_probe ASoC: wm5102: Fix PM disable depth imbalance in wm5102_probe ALSA: hda/hdmi: Don't skip notification handling during PM operation memory: pl353-smc: Fix refcount leak bug in pl353_smc_probe() memory: of: Fix refcount leak bug in of_get_ddr_timings() soc: qcom: smsm: Fix refcount leak bugs in qcom_smsm_probe() soc: qcom: smem_state: Add refcounting for the 'state->of_node' ARM: dts: turris-omnia: Fix mpp26 pin name and comment ARM: dts: kirkwood: lsxl: fix serial line ARM: dts: kirkwood: lsxl: remove first ethernet port ARM: dts: exynos: correct s5k6a3 reset polarity on Midas family ARM: Drop CMDLINE_* dependency on ATAGS ARM: dts: exynos: fix polarity of VBUS GPIO of Origen iio: adc: at91-sama5d2_adc: fix AT91_SAMA5D2_MR_TRACKTIM_MAX iio: adc: at91-sama5d2_adc: check return status for pressure and touch iio: adc: at91-sama5d2_adc: lock around oversampling and sample freq iio: inkern: only release the device node when done with it iio: ABI: Fix wrong format of differential capacitance channel ABI. clk: meson: Hold reference returned by of_get_parent() clk: oxnas: Hold reference returned by of_get_parent() clk: berlin: Add of_node_put() for of_get_parent() clk: tegra: Fix refcount leak in tegra210_clock_init clk: tegra: Fix refcount leak in tegra114_clock_init clk: tegra20: Fix refcount leak in tegra20_clock_init HSI: omap_ssi: Fix refcount leak in ssi_probe HSI: omap_ssi_port: Fix dma_map_sg error check media: exynos4-is: fimc-is: Add of_node_put() when breaking out of loop tty: xilinx_uartps: Fix the ignore_status media: xilinx: vipp: Fix refcount leak in xvip_graph_dma_init RDMA/rxe: Fix "kernel NULL pointer dereference" error RDMA/rxe: Fix the error caused by qp->sk misc: ocxl: fix possible refcount leak in afu_ioctl() dyndbg: fix module.dyndbg handling dyndbg: let query-modname override actual module name mtd: devices: docg3: check the return value of devm_ioremap() in the probe RDMA/siw: Always consume all skbuf data in sk_data_ready() upcall. ata: fix ata_id_sense_reporting_enabled() and ata_id_has_sense_reporting() ata: fix ata_id_has_devslp() ata: fix ata_id_has_ncq_autosense() ata: fix ata_id_has_dipm() mtd: rawnand: meson: fix bit map use in meson_nfc_ecc_correct() md/raid5: Ensure stripe_fill happens on non-read IO with journal xhci: Don't show warning for reinit on known broken suspend usb: gadget: function: fix dangling pnp_string in f_printer.c drivers: serial: jsm: fix some leaks in probe tty: serial: fsl_lpuart: disable dma rx/tx use flags in lpuart_dma_shutdown phy: qualcomm: call clk_disable_unprepare in the error handling staging: vt6655: fix some erroneous memory clean-up loops firmware: google: Test spinlock on panic path to avoid lockups serial: 8250: Fix restoring termios speed after suspend scsi: libsas: Fix use-after-free bug in smp_execute_task_sg() fsi: core: Check error number after calling ida_simple_get mfd: intel_soc_pmic: Fix an error handling path in intel_soc_pmic_i2c_probe() mfd: fsl-imx25: Fix an error handling path in mx25_tsadc_setup_irq() mfd: lp8788: Fix an error handling path in lp8788_probe() mfd: lp8788: Fix an error handling path in lp8788_irq_init() and lp8788_irq_init() mfd: fsl-imx25: Fix check for platform_get_irq() errors mfd: sm501: Add check for platform_driver_register() clk: mediatek: mt8183: mfgcfg: Propagate rate changes to parent dmaengine: ioat: stop mod_timer from resurrecting deleted timer in __cleanup() spmi: pmic-arb: correct duplicate APID to PPID mapping logic clk: bcm2835: fix bcm2835_clock_rate_from_divisor declaration clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe clk: ast2600: BCLK comes from EPLL mailbox: bcm-ferxrm-mailbox: Fix error check for dma_map_sg powerpc/math_emu/efp: Include module.h powerpc/sysdev/fsl_msi: Add missing of_node_put() powerpc/pci_dn: Add missing of_node_put() powerpc/powernv: add missing of_node_put() in opal_export_attrs() x86/hyperv: Fix 'struct hv_enlightened_vmcs' definition powerpc/64s: Fix GENERIC_CPU build flags for PPC970 / G5 powerpc: Fix SPE Power ISA properties for e500v1 platforms cgroup/cpuset: Enable update_tasks_cpumask() on top_cpuset iommu/omap: Fix buffer overflow in debugfs crypto: akcipher - default implementation for setting a private key crypto: ccp - Release dma channels before dmaengine unrgister iommu/iova: Fix module config properly kbuild: remove the target in signal traps when interrupted crypto: cavium - prevent integer overflow loading firmware f2fs: fix race condition on setting FI_NO_EXTENT flag ACPI: video: Add Toshiba Satellite/Portege Z830 quirk MIPS: BCM47XX: Cast memcmp() of function to (void *) powercap: intel_rapl: fix UBSAN shift-out-of-bounds issue thermal: intel_powerclamp: Use get_cpu() instead of smp_processor_id() to avoid crash NFSD: Return nfserr_serverfault if splice_ok but buf->pages have data wifi: brcmfmac: fix invalid address access when enabling SCAN log level bpftool: Clear errno after libcap's checks openvswitch: Fix double reporting of drops in dropwatch openvswitch: Fix overreporting of drops in dropwatch tcp: annotate data-race around tcp_md5sig_pool_populated wifi: ath9k: avoid uninit memory read in ath9k_htc_rx_msg() xfrm: Update ipcomp_scratches with NULL when freed wifi: brcmfmac: fix use-after-free bug in brcmf_netdev_start_xmit() Bluetooth: L2CAP: initialize delayed works at l2cap_chan_create() Bluetooth: hci_sysfs: Fix attempting to call device_add multiple times can: bcm: check the result of can_send() in bcm_can_tx() wifi: rt2x00: don't run Rt5592 IQ calibration on MT7620 wifi: rt2x00: set correct TX_SW_CFG1 MAC register for MT7620 wifi: rt2x00: set VGC gain for both chains of MT7620 wifi: rt2x00: set SoC wmac clock register wifi: rt2x00: correctly set BBP register 86 for MT7620 net: If sock is dead don't access sock's sk_wq in sk_stream_wait_memory Bluetooth: L2CAP: Fix user-after-free r8152: Rate limit overflow messages drm/nouveau/nouveau_bo: fix potential memory leak in nouveau_bo_alloc() drm: Use size_t type for len variable in drm_copy_field() drm: Prevent drm_copy_field() to attempt copying a NULL pointer drm/amd/display: fix overflow on MIN_I64 definition drm/vc4: vec: Fix timings for VEC modes drm: panel-orientation-quirks: Add quirk for Anbernic Win600 platform/x86: msi-laptop: Change DMI match / alias strings to fix module autoloading drm/amdgpu: fix initial connector audio value mmc: sdhci-msm: add compatible string check for sdm670 ARM: dts: imx7d-sdb: config the max pressure for tsc2046 ARM: dts: imx6q: add missing properties for sram ARM: dts: imx6dl: add missing properties for sram ARM: dts: imx6qp: add missing properties for sram ARM: dts: imx6sl: add missing properties for sram ARM: dts: imx6sll: add missing properties for sram ARM: dts: imx6sx: add missing properties for sram btrfs: scrub: try to fix super block errors clk: zynqmp: Fix stack-out-of-bounds in strncpy` media: cx88: Fix a null-ptr-deref bug in buffer_prepare() clk: zynqmp: pll: rectify rate rounding in zynqmp_pll_round_rate scsi: 3w-9xxx: Avoid disabling device if failing to enable it nbd: Fix hung when signal interrupts nbd_start_device_ioctl() power: supply: adp5061: fix out-of-bounds read in adp5061_get_chg_type() staging: vt6655: fix potential memory leak ata: libahci_platform: Sanity check the DT child nodes number bcache: fix set_at_max_writeback_rate() for multiple attached devices HID: roccat: Fix use-after-free in roccat_read() md/raid5: Wait for MD_SB_CHANGE_PENDING in raid5d usb: host: xhci: Fix potential memory leak in xhci_alloc_stream_info() usb: musb: Fix musb_gadget.c rxstate overflow bug Revert "usb: storage: Add quirk for Samsung Fit flash" staging: rtl8723bs: fix a potential memory leak in rtw_init_cmd_priv() nvme: copy firmware_rev on each init nvmet-tcp: add bounds check on Transfer Tag usb: idmouse: fix an uninit-value in idmouse_open clk: bcm2835: Make peripheral PLLC critical perf intel-pt: Fix segfault in intel_pt_print_info() with uClibc io_uring/af_unix: defer registered files gc to io_uring release net: ieee802154: return -EINVAL for unknown addr type Revert "net/ieee802154: reject zero-sized raw_sendmsg()" net/ieee802154: don't warn zero-sized raw_sendmsg() ext4: continue to expand file system when the target size doesn't reach md: Replace snprintf with scnprintf efi: libstub: drop pointless get_memory_map() call inet: fully convert sk->sk_rx_dst to RCU rules thermal: intel_powerclamp: Use first online CPU as control_cpu Linux 5.4.220 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I91859d6b79f44ab654cb0c88d0d6c9c46f62131b
This commit is contained in:
Greg Kroah-Hartman
commit
6b029aa535
@ -138,7 +138,7 @@ Description:
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Raw capacitance measurement from channel Y. Units after
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application of scale and offset are nanofarads.
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What: /sys/.../iio:deviceX/in_capacitanceY-in_capacitanceZ_raw
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What: /sys/.../iio:deviceX/in_capacitanceY-capacitanceZ_raw
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KernelVersion: 3.2
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Contact: linux-iio@vger.kernel.org
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Description:
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2
Makefile
2
Makefile
@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 4
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SUBLEVEL = 219
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SUBLEVEL = 220
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EXTRAVERSION =
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NAME = Kleptomaniac Octopus
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@ -1838,7 +1838,6 @@ config CMDLINE
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choice
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prompt "Kernel command line type" if CMDLINE != ""
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default CMDLINE_FROM_BOOTLOADER
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depends on ATAGS
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config CMDLINE_FROM_BOOTLOADER
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bool "Use bootloader kernel arguments if available"
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@ -307,7 +307,7 @@
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marvell,function = "spi0";
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};
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spi0cs1_pins: spi0cs1-pins {
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spi0cs2_pins: spi0cs2-pins {
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marvell,pins = "mpp26";
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marvell,function = "spi0";
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};
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@ -342,7 +342,7 @@
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};
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};
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/* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
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/* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
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};
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&uart0 {
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@ -534,7 +534,7 @@
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clocks = <&camera 1>;
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clock-names = "extclk";
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samsung,camclk-out = <1>;
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gpios = <&gpm1 6 GPIO_ACTIVE_HIGH>;
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gpios = <&gpm1 6 GPIO_ACTIVE_LOW>;
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port {
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is_s5k6a3_ep: endpoint {
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@ -86,7 +86,7 @@
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};
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&ehci {
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samsung,vbus-gpio = <&gpx3 5 1>;
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samsung,vbus-gpio = <&gpx3 5 GPIO_ACTIVE_HIGH>;
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status = "okay";
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phys = <&exynos_usbphy 2>, <&exynos_usbphy 3>;
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phy-names = "hsic0", "hsic1";
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@ -81,6 +81,9 @@
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ocram: sram@900000 {
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compatible = "mmio-sram";
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reg = <0x00900000 0x20000>;
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ranges = <0 0x00900000 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&clks IMX6QDL_CLK_OCRAM>;
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};
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@ -158,6 +158,9 @@
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ocram: sram@900000 {
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compatible = "mmio-sram";
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reg = <0x00900000 0x40000>;
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ranges = <0 0x00900000 0x40000>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&clks IMX6QDL_CLK_OCRAM>;
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};
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@ -9,12 +9,18 @@
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ocram2: sram@940000 {
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compatible = "mmio-sram";
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reg = <0x00940000 0x20000>;
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ranges = <0 0x00940000 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&clks IMX6QDL_CLK_OCRAM>;
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};
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ocram3: sram@960000 {
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compatible = "mmio-sram";
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reg = <0x00960000 0x20000>;
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ranges = <0 0x00960000 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&clks IMX6QDL_CLK_OCRAM>;
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};
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@ -121,6 +121,9 @@
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ocram: sram@900000 {
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compatible = "mmio-sram";
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reg = <0x00900000 0x20000>;
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ranges = <0 0x00900000 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&clks IMX6SL_CLK_OCRAM>;
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};
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@ -123,6 +123,9 @@
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ocram: sram@900000 {
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compatible = "mmio-sram";
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reg = <0x00900000 0x20000>;
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ranges = <0 0x00900000 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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intc: interrupt-controller@a01000 {
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@ -163,12 +163,18 @@
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ocram_s: sram@8f8000 {
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compatible = "mmio-sram";
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reg = <0x008f8000 0x4000>;
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ranges = <0 0x008f8000 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&clks IMX6SX_CLK_OCRAM_S>;
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};
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ocram: sram@900000 {
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compatible = "mmio-sram";
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reg = <0x00900000 0x20000>;
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ranges = <0 0x00900000 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&clks IMX6SX_CLK_OCRAM>;
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};
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@ -177,12 +177,7 @@
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interrupt-parent = <&gpio2>;
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interrupts = <29 0>;
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pendown-gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
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ti,x-min = /bits/ 16 <0>;
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ti,x-max = /bits/ 16 <0>;
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ti,y-min = /bits/ 16 <0>;
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ti,y-max = /bits/ 16 <0>;
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ti,pressure-max = /bits/ 16 <0>;
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ti,x-plate-ohms = /bits/ 16 <400>;
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touchscreen-max-pressure = <255>;
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wakeup-source;
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};
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};
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@ -10,6 +10,11 @@
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ocp@f1000000 {
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pinctrl: pin-controller@10000 {
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/* Non-default UART pins */
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pmx_uart0: pmx-uart0 {
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marvell,pins = "mpp4", "mpp5";
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};
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|
||||
pmx_power_hdd: pmx-power-hdd {
|
||||
marvell,pins = "mpp10";
|
||||
marvell,function = "gpo";
|
||||
@ -213,22 +218,11 @@
|
||||
&mdio {
|
||||
status = "okay";
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
ethphy1: ethernet-phy@8 {
|
||||
reg = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
ethernet0-port@0 {
|
||||
phy-handle = <ðphy0>;
|
||||
};
|
||||
};
|
||||
|
||||
ð1 {
|
||||
status = "okay";
|
||||
ethernet1-port@0 {
|
||||
|
||||
@ -320,7 +320,11 @@ static struct mem_type mem_types[] __ro_after_init = {
|
||||
.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
|
||||
L_PTE_XN | L_PTE_RDONLY,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
#ifdef CONFIG_ARM_LPAE
|
||||
.prot_sect = PMD_TYPE_SECT | L_PMD_SECT_RDONLY | PMD_SECT_AP2,
|
||||
#else
|
||||
.prot_sect = PMD_TYPE_SECT,
|
||||
#endif
|
||||
.domain = DOMAIN_KERNEL,
|
||||
},
|
||||
[MT_ROM] = {
|
||||
|
||||
@ -85,7 +85,7 @@ static __init void prom_init_mem(void)
|
||||
pr_debug("Assume 128MB RAM\n");
|
||||
break;
|
||||
}
|
||||
if (!memcmp(prom_init, prom_init + mem, 32))
|
||||
if (!memcmp((void *)prom_init, (void *)prom_init + mem, 32))
|
||||
break;
|
||||
}
|
||||
lowmem = mem;
|
||||
@ -162,7 +162,7 @@ void __init bcm47xx_prom_highmem_init(void)
|
||||
|
||||
off = EXTVBASE + __pa(off);
|
||||
for (extmem = 128 << 20; extmem < 512 << 20; extmem <<= 1) {
|
||||
if (!memcmp(prom_init, (void *)(off + extmem), 16))
|
||||
if (!memcmp((void *)prom_init, (void *)(off + extmem), 16))
|
||||
break;
|
||||
}
|
||||
extmem -= lowmem;
|
||||
|
||||
@ -155,7 +155,7 @@ CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power8
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power9,-mtune=power8)
|
||||
else
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,$(call cc-option,-mtune=power5))
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mcpu=power5,-mcpu=power4)
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power4
|
||||
endif
|
||||
else ifdef CONFIG_PPC_BOOK3E_64
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64
|
||||
|
||||
@ -30,6 +30,7 @@ endif
|
||||
|
||||
BOOTCFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
|
||||
-fno-strict-aliasing -O2 -msoft-float -mno-altivec -mno-vsx \
|
||||
$(call cc-option,-mno-spe) $(call cc-option,-mspe=no) \
|
||||
-pipe -fomit-frame-pointer -fno-builtin -fPIC -nostdinc \
|
||||
$(LINUXINCLUDE)
|
||||
|
||||
|
||||
51
arch/powerpc/boot/dts/fsl/e500v1_power_isa.dtsi
Normal file
51
arch/powerpc/boot/dts/fsl/e500v1_power_isa.dtsi
Normal file
@ -0,0 +1,51 @@
|
||||
/*
|
||||
* e500v1 Power ISA Device Tree Source (include)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
power-isa-version = "2.03";
|
||||
power-isa-b; // Base
|
||||
power-isa-e; // Embedded
|
||||
power-isa-atb; // Alternate Time Base
|
||||
power-isa-cs; // Cache Specification
|
||||
power-isa-e.le; // Embedded.Little-Endian
|
||||
power-isa-e.pm; // Embedded.Performance Monitor
|
||||
power-isa-ecl; // Embedded Cache Locking
|
||||
power-isa-mmc; // Memory Coherence
|
||||
power-isa-sp; // Signal Processing Engine
|
||||
power-isa-sp.fs; // SPE.Embedded Float Scalar Single
|
||||
power-isa-sp.fv; // SPE.Embedded Float Vector
|
||||
mmu-type = "power-embedded";
|
||||
};
|
||||
};
|
||||
@ -7,7 +7,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "e500v2_power_isa.dtsi"
|
||||
/include/ "e500v1_power_isa.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8540ADS";
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "e500v2_power_isa.dtsi"
|
||||
/include/ "e500v1_power_isa.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8541CDS";
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "e500v2_power_isa.dtsi"
|
||||
/include/ "e500v1_power_isa.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8555CDS";
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "e500v2_power_isa.dtsi"
|
||||
/include/ "e500v1_power_isa.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8560ADS";
|
||||
|
||||
@ -325,6 +325,7 @@ struct pci_dn *pci_add_device_node_info(struct pci_controller *hose,
|
||||
INIT_LIST_HEAD(&pdn->list);
|
||||
parent = of_get_parent(dn);
|
||||
pdn->parent = parent ? PCI_DN(parent) : NULL;
|
||||
of_node_put(parent);
|
||||
if (pdn->parent)
|
||||
list_add_tail(&pdn->list, &pdn->parent->child_list);
|
||||
|
||||
|
||||
@ -17,6 +17,7 @@
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/prctl.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <linux/uaccess.h>
|
||||
#include <asm/reg.h>
|
||||
|
||||
@ -776,6 +776,7 @@ static void opal_export_attrs(void)
|
||||
kobj = kobject_create_and_add("exports", opal_kobj);
|
||||
if (!kobj) {
|
||||
pr_warn("kobject_create_and_add() of exports failed\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
@ -211,8 +211,10 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
|
||||
dev_err(&pdev->dev,
|
||||
"node %pOF has an invalid fsl,msi phandle %u\n",
|
||||
hose->dn, np->phandle);
|
||||
of_node_put(np);
|
||||
return -EINVAL;
|
||||
}
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
for_each_pci_msi_entry(entry, pdev) {
|
||||
|
||||
@ -35,6 +35,7 @@ else
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_LD_IS_LLD),y)
|
||||
ifeq ($(shell test $(CONFIG_LLD_VERSION) -lt 150000; echo $$?),0)
|
||||
KBUILD_CFLAGS += -mno-relax
|
||||
KBUILD_AFLAGS += -mno-relax
|
||||
ifneq ($(LLVM_IAS),1)
|
||||
@ -42,6 +43,7 @@ ifneq ($(LLVM_IAS),1)
|
||||
KBUILD_AFLAGS += -Wa,-mno-relax
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
# ISA string setting
|
||||
riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
|
||||
|
||||
@ -252,9 +252,9 @@ __io_reads_ins(reads, u32, l, __io_br(), __io_ar(addr))
|
||||
__io_reads_ins(ins, u8, b, __io_pbr(), __io_par(addr))
|
||||
__io_reads_ins(ins, u16, w, __io_pbr(), __io_par(addr))
|
||||
__io_reads_ins(ins, u32, l, __io_pbr(), __io_par(addr))
|
||||
#define insb(addr, buffer, count) __insb((void __iomem *)(long)addr, buffer, count)
|
||||
#define insw(addr, buffer, count) __insw((void __iomem *)(long)addr, buffer, count)
|
||||
#define insl(addr, buffer, count) __insl((void __iomem *)(long)addr, buffer, count)
|
||||
#define insb(addr, buffer, count) __insb(PCI_IOBASE + (addr), buffer, count)
|
||||
#define insw(addr, buffer, count) __insw(PCI_IOBASE + (addr), buffer, count)
|
||||
#define insl(addr, buffer, count) __insl(PCI_IOBASE + (addr), buffer, count)
|
||||
|
||||
__io_writes_outs(writes, u8, b, __io_bw(), __io_aw())
|
||||
__io_writes_outs(writes, u16, w, __io_bw(), __io_aw())
|
||||
@ -266,22 +266,22 @@ __io_writes_outs(writes, u32, l, __io_bw(), __io_aw())
|
||||
__io_writes_outs(outs, u8, b, __io_pbw(), __io_paw())
|
||||
__io_writes_outs(outs, u16, w, __io_pbw(), __io_paw())
|
||||
__io_writes_outs(outs, u32, l, __io_pbw(), __io_paw())
|
||||
#define outsb(addr, buffer, count) __outsb((void __iomem *)(long)addr, buffer, count)
|
||||
#define outsw(addr, buffer, count) __outsw((void __iomem *)(long)addr, buffer, count)
|
||||
#define outsl(addr, buffer, count) __outsl((void __iomem *)(long)addr, buffer, count)
|
||||
#define outsb(addr, buffer, count) __outsb(PCI_IOBASE + (addr), buffer, count)
|
||||
#define outsw(addr, buffer, count) __outsw(PCI_IOBASE + (addr), buffer, count)
|
||||
#define outsl(addr, buffer, count) __outsl(PCI_IOBASE + (addr), buffer, count)
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
__io_reads_ins(reads, u64, q, __io_br(), __io_ar(addr))
|
||||
#define readsq(addr, buffer, count) __readsq(addr, buffer, count)
|
||||
|
||||
__io_reads_ins(ins, u64, q, __io_pbr(), __io_par(addr))
|
||||
#define insq(addr, buffer, count) __insq((void __iomem *)addr, buffer, count)
|
||||
#define insq(addr, buffer, count) __insq(PCI_IOBASE + (addr), buffer, count)
|
||||
|
||||
__io_writes_outs(writes, u64, q, __io_bw(), __io_aw())
|
||||
#define writesq(addr, buffer, count) __writesq(addr, buffer, count)
|
||||
|
||||
__io_writes_outs(outs, u64, q, __io_pbr(), __io_paw())
|
||||
#define outsq(addr, buffer, count) __outsq((void __iomem *)addr, buffer, count)
|
||||
#define outsq(addr, buffer, count) __outsq(PCI_IOBASE + (addr), buffer, count)
|
||||
#endif
|
||||
|
||||
#include <asm-generic/io.h>
|
||||
|
||||
@ -18,9 +18,6 @@ static long riscv_sys_mmap(unsigned long addr, unsigned long len,
|
||||
if (unlikely(offset & (~PAGE_MASK >> page_shift_offset)))
|
||||
return -EINVAL;
|
||||
|
||||
if (unlikely((prot & PROT_WRITE) && !(prot & PROT_READ)))
|
||||
return -EINVAL;
|
||||
|
||||
return ksys_mmap_pgoff(addr, len, prot, flags, fd,
|
||||
offset >> (PAGE_SHIFT - page_shift_offset));
|
||||
}
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
|
||||
#include <asm-generic/sections.h>
|
||||
|
||||
extern long __machvec_start, __machvec_end;
|
||||
extern char __machvec_start[], __machvec_end[];
|
||||
extern char __uncached_start, __uncached_end;
|
||||
extern char __start_eh_frame[], __stop_eh_frame[];
|
||||
|
||||
|
||||
@ -19,8 +19,8 @@
|
||||
#define MV_NAME_SIZE 32
|
||||
|
||||
#define for_each_mv(mv) \
|
||||
for ((mv) = (struct sh_machine_vector *)&__machvec_start; \
|
||||
(mv) && (unsigned long)(mv) < (unsigned long)&__machvec_end; \
|
||||
for ((mv) = (struct sh_machine_vector *)__machvec_start; \
|
||||
(mv) && (unsigned long)(mv) < (unsigned long)__machvec_end; \
|
||||
(mv)++)
|
||||
|
||||
static struct sh_machine_vector * __init get_mv_byname(const char *name)
|
||||
@ -86,8 +86,8 @@ void __init sh_mv_setup(void)
|
||||
if (!machvec_selected) {
|
||||
unsigned long machvec_size;
|
||||
|
||||
machvec_size = ((unsigned long)&__machvec_end -
|
||||
(unsigned long)&__machvec_start);
|
||||
machvec_size = ((unsigned long)__machvec_end -
|
||||
(unsigned long)__machvec_start);
|
||||
|
||||
/*
|
||||
* Sanity check for machvec section alignment. Ensure
|
||||
@ -101,7 +101,7 @@ void __init sh_mv_setup(void)
|
||||
* vector (usually the only one) from .machvec.init.
|
||||
*/
|
||||
if (machvec_size >= sizeof(struct sh_machine_vector))
|
||||
sh_mv = *(struct sh_machine_vector *)&__machvec_start;
|
||||
sh_mv = *(struct sh_machine_vector *)__machvec_start;
|
||||
}
|
||||
|
||||
printk(KERN_NOTICE "Booting machvec: %s\n", get_system_type());
|
||||
|
||||
@ -77,7 +77,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
||||
|
||||
static void *c_start(struct seq_file *m, loff_t *pos)
|
||||
{
|
||||
return *pos < NR_CPUS ? cpu_data + *pos : NULL;
|
||||
return *pos < nr_cpu_ids ? cpu_data + *pos : NULL;
|
||||
}
|
||||
|
||||
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
|
||||
|
||||
@ -721,7 +721,7 @@ struct hv_enlightened_vmcs {
|
||||
u64 guest_rip;
|
||||
|
||||
u32 hv_clean_fields;
|
||||
u32 hv_padding_32;
|
||||
u32 padding32_1;
|
||||
u32 hv_synthetic_controls;
|
||||
struct {
|
||||
u32 nested_flush_hypercall:1;
|
||||
@ -729,7 +729,7 @@ struct hv_enlightened_vmcs {
|
||||
u32 reserved:30;
|
||||
} __packed hv_enlightenments_control;
|
||||
u32 hv_vp_id;
|
||||
|
||||
u32 padding32_2;
|
||||
u64 hv_vm_id;
|
||||
u64 partition_assist_page;
|
||||
u64 padding64_4[4];
|
||||
|
||||
@ -9,6 +9,7 @@
|
||||
struct ucode_patch {
|
||||
struct list_head plist;
|
||||
void *data; /* Intel uses only this one */
|
||||
unsigned int size;
|
||||
u32 patch_id;
|
||||
u16 equiv_cpu;
|
||||
};
|
||||
|
||||
@ -783,6 +783,7 @@ static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover,
|
||||
kfree(patch);
|
||||
return -EINVAL;
|
||||
}
|
||||
patch->size = *patch_size;
|
||||
|
||||
mc_hdr = (struct microcode_header_amd *)(fw + SECTION_HDR_SIZE);
|
||||
proc_id = mc_hdr->processor_rev_id;
|
||||
@ -864,7 +865,7 @@ load_microcode_amd(bool save, u8 family, const u8 *data, size_t size)
|
||||
return ret;
|
||||
|
||||
memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
|
||||
memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data), PATCH_MAX_SIZE));
|
||||
memcpy(amd_ucode_patch, p->data, min_t(u32, p->size, PATCH_MAX_SIZE));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -416,6 +416,7 @@ static int pseudo_lock_fn(void *_rdtgrp)
|
||||
struct pseudo_lock_region *plr = rdtgrp->plr;
|
||||
u32 rmid_p, closid_p;
|
||||
unsigned long i;
|
||||
u64 saved_msr;
|
||||
#ifdef CONFIG_KASAN
|
||||
/*
|
||||
* The registers used for local register variables are also used
|
||||
@ -459,6 +460,7 @@ static int pseudo_lock_fn(void *_rdtgrp)
|
||||
* the buffer and evict pseudo-locked memory read earlier from the
|
||||
* cache.
|
||||
*/
|
||||
saved_msr = __rdmsr(MSR_MISC_FEATURE_CONTROL);
|
||||
__wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
|
||||
closid_p = this_cpu_read(pqr_state.cur_closid);
|
||||
rmid_p = this_cpu_read(pqr_state.cur_rmid);
|
||||
@ -510,7 +512,7 @@ static int pseudo_lock_fn(void *_rdtgrp)
|
||||
__wrmsr(IA32_PQR_ASSOC, rmid_p, closid_p);
|
||||
|
||||
/* Re-enable the hardware prefetcher(s) */
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, 0x0, 0x0);
|
||||
wrmsrl(MSR_MISC_FEATURE_CONTROL, saved_msr);
|
||||
local_irq_enable();
|
||||
|
||||
plr->thread_done = 1;
|
||||
@ -867,6 +869,7 @@ bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_domain *d)
|
||||
static int measure_cycles_lat_fn(void *_plr)
|
||||
{
|
||||
struct pseudo_lock_region *plr = _plr;
|
||||
u32 saved_low, saved_high;
|
||||
unsigned long i;
|
||||
u64 start, end;
|
||||
void *mem_r;
|
||||
@ -875,6 +878,7 @@ static int measure_cycles_lat_fn(void *_plr)
|
||||
/*
|
||||
* Disable hardware prefetchers.
|
||||
*/
|
||||
rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
|
||||
mem_r = READ_ONCE(plr->kmem);
|
||||
/*
|
||||
@ -891,7 +895,7 @@ static int measure_cycles_lat_fn(void *_plr)
|
||||
end = rdtsc_ordered();
|
||||
trace_pseudo_lock_mem_latency((u32)(end - start));
|
||||
}
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, 0x0, 0x0);
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
|
||||
local_irq_enable();
|
||||
plr->thread_done = 1;
|
||||
wake_up_interruptible(&plr->lock_thread_wq);
|
||||
@ -936,6 +940,7 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
|
||||
u64 hits_before = 0, hits_after = 0, miss_before = 0, miss_after = 0;
|
||||
struct perf_event *miss_event, *hit_event;
|
||||
int hit_pmcnum, miss_pmcnum;
|
||||
u32 saved_low, saved_high;
|
||||
unsigned int line_size;
|
||||
unsigned int size;
|
||||
unsigned long i;
|
||||
@ -969,6 +974,7 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
|
||||
/*
|
||||
* Disable hardware prefetchers.
|
||||
*/
|
||||
rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
|
||||
|
||||
/* Initialize rest of local variables */
|
||||
@ -1027,7 +1033,7 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
|
||||
*/
|
||||
rmb();
|
||||
/* Re-enable hardware prefetchers */
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, 0x0, 0x0);
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
|
||||
local_irq_enable();
|
||||
out_hit:
|
||||
perf_event_release_kernel(hit_event);
|
||||
|
||||
@ -2020,7 +2020,7 @@ static int em_pop_sreg(struct x86_emulate_ctxt *ctxt)
|
||||
if (rc != X86EMUL_CONTINUE)
|
||||
return rc;
|
||||
|
||||
if (ctxt->modrm_reg == VCPU_SREG_SS)
|
||||
if (seg == VCPU_SREG_SS)
|
||||
ctxt->interruptibility = KVM_X86_SHADOW_INT_MOV_SS;
|
||||
if (ctxt->op_bytes > 2)
|
||||
rsp_increment(ctxt, ctxt->op_bytes - 2);
|
||||
|
||||
@ -3427,7 +3427,16 @@ static void nested_vmx_inject_exception_vmexit(struct kvm_vcpu *vcpu,
|
||||
u32 intr_info = nr | INTR_INFO_VALID_MASK;
|
||||
|
||||
if (vcpu->arch.exception.has_error_code) {
|
||||
vmcs12->vm_exit_intr_error_code = vcpu->arch.exception.error_code;
|
||||
/*
|
||||
* Intel CPUs do not generate error codes with bits 31:16 set,
|
||||
* and more importantly VMX disallows setting bits 31:16 in the
|
||||
* injected error code for VM-Entry. Drop the bits to mimic
|
||||
* hardware and avoid inducing failure on nested VM-Entry if L1
|
||||
* chooses to inject the exception back to L2. AMD CPUs _do_
|
||||
* generate "full" 32-bit error codes, so KVM allows userspace
|
||||
* to inject exception error codes with bits 31:16 set.
|
||||
*/
|
||||
vmcs12->vm_exit_intr_error_code = (u16)vcpu->arch.exception.error_code;
|
||||
intr_info |= INTR_INFO_DELIVER_CODE_MASK;
|
||||
}
|
||||
|
||||
@ -3762,14 +3771,6 @@ static void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
|
||||
nested_vmx_abort(vcpu,
|
||||
VMX_ABORT_SAVE_GUEST_MSR_FAIL);
|
||||
}
|
||||
|
||||
/*
|
||||
* Drop what we picked up for L2 via vmx_complete_interrupts. It is
|
||||
* preserved above and would only end up incorrectly in L1.
|
||||
*/
|
||||
vcpu->arch.nmi_injected = false;
|
||||
kvm_clear_exception_queue(vcpu);
|
||||
kvm_clear_interrupt_queue(vcpu);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -4104,6 +4105,17 @@ void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
|
||||
WARN_ON_ONCE(nested_early_check);
|
||||
}
|
||||
|
||||
/*
|
||||
* Drop events/exceptions that were queued for re-injection to L2
|
||||
* (picked up via vmx_complete_interrupts()), as well as exceptions
|
||||
* that were pending for L2. Note, this must NOT be hoisted above
|
||||
* prepare_vmcs12(), events/exceptions queued for re-injection need to
|
||||
* be captured in vmcs12 (see vmcs12_save_pending_event()).
|
||||
*/
|
||||
vcpu->arch.nmi_injected = false;
|
||||
kvm_clear_exception_queue(vcpu);
|
||||
kvm_clear_interrupt_queue(vcpu);
|
||||
|
||||
vmx_switch_vmcs(vcpu, &vmx->vmcs01);
|
||||
|
||||
/* Update any VMCS fields that might have changed while L2 ran */
|
||||
|
||||
@ -1676,7 +1676,17 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu)
|
||||
kvm_deliver_exception_payload(vcpu);
|
||||
|
||||
if (has_error_code) {
|
||||
vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
|
||||
/*
|
||||
* Despite the error code being architecturally defined as 32
|
||||
* bits, and the VMCS field being 32 bits, Intel CPUs and thus
|
||||
* VMX don't actually supporting setting bits 31:16. Hardware
|
||||
* will (should) never provide a bogus error code, but AMD CPUs
|
||||
* do generate error codes with bits 31:16 set, and so KVM's
|
||||
* ABI lets userspace shove in arbitrary 32-bit values. Drop
|
||||
* the upper bits to avoid VM-Fail, losing information that
|
||||
* does't really exist is preferable to killing the VM.
|
||||
*/
|
||||
vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, (u16)error_code);
|
||||
intr_info |= INTR_INFO_DELIVER_CODE_MASK;
|
||||
}
|
||||
|
||||
|
||||
@ -119,6 +119,12 @@ static int akcipher_default_op(struct akcipher_request *req)
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static int akcipher_default_set_key(struct crypto_akcipher *tfm,
|
||||
const void *key, unsigned int keylen)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
int crypto_register_akcipher(struct akcipher_alg *alg)
|
||||
{
|
||||
struct crypto_alg *base = &alg->base;
|
||||
@ -131,6 +137,8 @@ int crypto_register_akcipher(struct akcipher_alg *alg)
|
||||
alg->encrypt = akcipher_default_op;
|
||||
if (!alg->decrypt)
|
||||
alg->decrypt = akcipher_default_op;
|
||||
if (!alg->set_priv_key)
|
||||
alg->set_priv_key = akcipher_default_set_key;
|
||||
|
||||
akcipher_prepare_alg(alg);
|
||||
return crypto_register_alg(base);
|
||||
|
||||
@ -498,6 +498,22 @@ static const struct dmi_system_id video_dmi_table[] = {
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "SATELLITE R830"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.callback = video_disable_backlight_sysfs_if,
|
||||
.ident = "Toshiba Satellite Z830",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "SATELLITE Z830"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.callback = video_disable_backlight_sysfs_if,
|
||||
.ident = "Toshiba Portege Z830",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE Z830"),
|
||||
},
|
||||
},
|
||||
/*
|
||||
* Some machine's _DOD IDs don't have bit 31(Device ID Scheme) set
|
||||
* but the IDs actually follow the Device ID Scheme.
|
||||
|
||||
@ -451,14 +451,24 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
|
||||
}
|
||||
}
|
||||
|
||||
hpriv->nports = child_nodes = of_get_child_count(dev->of_node);
|
||||
/*
|
||||
* Too many sub-nodes most likely means having something wrong with
|
||||
* the firmware.
|
||||
*/
|
||||
child_nodes = of_get_child_count(dev->of_node);
|
||||
if (child_nodes > AHCI_MAX_PORTS) {
|
||||
rc = -EINVAL;
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
/*
|
||||
* If no sub-node was found, we still need to set nports to
|
||||
* one in order to be able to use the
|
||||
* ahci_platform_[en|dis]able_[phys|regulators] functions.
|
||||
*/
|
||||
if (!child_nodes)
|
||||
if (child_nodes)
|
||||
hpriv->nports = child_nodes;
|
||||
else
|
||||
hpriv->nports = 1;
|
||||
|
||||
hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL);
|
||||
|
||||
@ -1327,10 +1327,12 @@ static int nbd_start_device_ioctl(struct nbd_device *nbd, struct block_device *b
|
||||
mutex_unlock(&nbd->config_lock);
|
||||
ret = wait_event_interruptible(config->recv_wq,
|
||||
atomic_read(&config->recv_threads) == 0);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
sock_shutdown(nbd);
|
||||
flush_workqueue(nbd->recv_workq);
|
||||
nbd_clear_que(nbd);
|
||||
}
|
||||
|
||||
flush_workqueue(nbd->recv_workq);
|
||||
mutex_lock(&nbd->config_lock);
|
||||
nbd_bdev_reset(bdev);
|
||||
/* user requested, ignore socket errors */
|
||||
|
||||
@ -967,9 +967,9 @@ static u32 bcm2835_clock_choose_div(struct clk_hw *hw,
|
||||
return div;
|
||||
}
|
||||
|
||||
static long bcm2835_clock_rate_from_divisor(struct bcm2835_clock *clock,
|
||||
unsigned long parent_rate,
|
||||
u32 div)
|
||||
static unsigned long bcm2835_clock_rate_from_divisor(struct bcm2835_clock *clock,
|
||||
unsigned long parent_rate,
|
||||
u32 div)
|
||||
{
|
||||
const struct bcm2835_clock_data *data = clock->data;
|
||||
u64 temp;
|
||||
@ -1756,7 +1756,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
|
||||
.load_mask = CM_PLLC_LOADPER,
|
||||
.hold_mask = CM_PLLC_HOLDPER,
|
||||
.fixed_divider = 1,
|
||||
.flags = CLK_SET_RATE_PARENT),
|
||||
.flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
|
||||
|
||||
/*
|
||||
* PLLD is the display PLL, used to drive DSI display panels.
|
||||
|
||||
@ -500,12 +500,15 @@ static void __init berlin2_clock_setup(struct device_node *np)
|
||||
int n, ret;
|
||||
|
||||
clk_data = kzalloc(struct_size(clk_data, hws, MAX_CLKS), GFP_KERNEL);
|
||||
if (!clk_data)
|
||||
if (!clk_data) {
|
||||
of_node_put(parent_np);
|
||||
return;
|
||||
}
|
||||
clk_data->num = MAX_CLKS;
|
||||
hws = clk_data->hws;
|
||||
|
||||
gbase = of_iomap(parent_np, 0);
|
||||
of_node_put(parent_np);
|
||||
if (!gbase)
|
||||
return;
|
||||
|
||||
|
||||
@ -286,19 +286,23 @@ static void __init berlin2q_clock_setup(struct device_node *np)
|
||||
int n, ret;
|
||||
|
||||
clk_data = kzalloc(struct_size(clk_data, hws, MAX_CLKS), GFP_KERNEL);
|
||||
if (!clk_data)
|
||||
if (!clk_data) {
|
||||
of_node_put(parent_np);
|
||||
return;
|
||||
}
|
||||
clk_data->num = MAX_CLKS;
|
||||
hws = clk_data->hws;
|
||||
|
||||
gbase = of_iomap(parent_np, 0);
|
||||
if (!gbase) {
|
||||
of_node_put(parent_np);
|
||||
pr_err("%pOF: Unable to map global base\n", np);
|
||||
return;
|
||||
}
|
||||
|
||||
/* BG2Q CPU PLL is not part of global registers */
|
||||
cpupll_base = of_iomap(parent_np, 1);
|
||||
of_node_put(parent_np);
|
||||
if (!cpupll_base) {
|
||||
pr_err("%pOF: Unable to map cpupll base\n", np);
|
||||
iounmap(gbase);
|
||||
|
||||
@ -579,7 +579,7 @@ static int aspeed_g6_clk_probe(struct platform_device *pdev)
|
||||
regmap_write(map, 0x308, 0x12000); /* 3x3 = 9 */
|
||||
|
||||
/* P-Bus (BCLK) clock divider */
|
||||
hw = clk_hw_register_divider_table(dev, "bclk", "hpll", 0,
|
||||
hw = clk_hw_register_divider_table(dev, "bclk", "epll", 0,
|
||||
scu_g6_base + ASPEED_G6_CLK_SELECTION1, 20, 3, 0,
|
||||
ast2600_div_table,
|
||||
&aspeed_g6_clk_lock);
|
||||
|
||||
@ -207,7 +207,7 @@ static const struct of_device_id oxnas_stdclk_dt_ids[] = {
|
||||
|
||||
static int oxnas_stdclk_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct device_node *np = pdev->dev.of_node, *parent_np;
|
||||
const struct oxnas_stdclk_data *data;
|
||||
const struct of_device_id *id;
|
||||
struct regmap *regmap;
|
||||
@ -219,7 +219,9 @@ static int oxnas_stdclk_probe(struct platform_device *pdev)
|
||||
return -ENODEV;
|
||||
data = id->data;
|
||||
|
||||
regmap = syscon_node_to_regmap(of_get_parent(np));
|
||||
parent_np = of_get_parent(np);
|
||||
regmap = syscon_node_to_regmap(parent_np);
|
||||
of_node_put(parent_np);
|
||||
if (IS_ERR(regmap)) {
|
||||
dev_err(&pdev->dev, "failed to have parent regmap\n");
|
||||
return PTR_ERR(regmap);
|
||||
|
||||
@ -18,9 +18,9 @@ static const struct mtk_gate_regs mfg_cg_regs = {
|
||||
.sta_ofs = 0x0,
|
||||
};
|
||||
|
||||
#define GATE_MFG(_id, _name, _parent, _shift) \
|
||||
GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, \
|
||||
&mtk_clk_gate_ops_setclr)
|
||||
#define GATE_MFG(_id, _name, _parent, _shift) \
|
||||
GATE_MTK_FLAGS(_id, _name, _parent, &mfg_cg_regs, _shift, \
|
||||
&mtk_clk_gate_ops_setclr, CLK_SET_RATE_PARENT)
|
||||
|
||||
static const struct mtk_gate mfg_clks[] = {
|
||||
GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0)
|
||||
|
||||
@ -36,6 +36,7 @@ int meson_aoclkc_probe(struct platform_device *pdev)
|
||||
struct meson_aoclk_reset_controller *rstc;
|
||||
struct meson_aoclk_data *data;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *np;
|
||||
struct regmap *regmap;
|
||||
int ret, clkid;
|
||||
|
||||
@ -47,7 +48,9 @@ int meson_aoclkc_probe(struct platform_device *pdev)
|
||||
if (!rstc)
|
||||
return -ENOMEM;
|
||||
|
||||
regmap = syscon_node_to_regmap(of_get_parent(dev->of_node));
|
||||
np = of_get_parent(dev->of_node);
|
||||
regmap = syscon_node_to_regmap(np);
|
||||
of_node_put(np);
|
||||
if (IS_ERR(regmap)) {
|
||||
dev_err(dev, "failed to get regmap\n");
|
||||
return PTR_ERR(regmap);
|
||||
|
||||
@ -17,6 +17,7 @@ int meson_eeclkc_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct meson_eeclkc_data *data;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *np;
|
||||
struct regmap *map;
|
||||
int ret, i;
|
||||
|
||||
@ -25,7 +26,9 @@ int meson_eeclkc_probe(struct platform_device *pdev)
|
||||
return -EINVAL;
|
||||
|
||||
/* Get the hhi system controller node */
|
||||
map = syscon_node_to_regmap(of_get_parent(dev->of_node));
|
||||
np = of_get_parent(dev->of_node);
|
||||
map = syscon_node_to_regmap(np);
|
||||
of_node_put(np);
|
||||
if (IS_ERR(map)) {
|
||||
dev_err(dev,
|
||||
"failed to get HHI regmap\n");
|
||||
|
||||
@ -3684,13 +3684,16 @@ static void __init meson8b_clkc_init_common(struct device_node *np,
|
||||
struct clk_hw_onecell_data *clk_hw_onecell_data)
|
||||
{
|
||||
struct meson8b_clk_reset *rstc;
|
||||
struct device_node *parent_np;
|
||||
const char *notifier_clk_name;
|
||||
struct clk *notifier_clk;
|
||||
void __iomem *clk_base;
|
||||
struct regmap *map;
|
||||
int i, ret;
|
||||
|
||||
map = syscon_node_to_regmap(of_get_parent(np));
|
||||
parent_np = of_get_parent(np);
|
||||
map = syscon_node_to_regmap(parent_np);
|
||||
of_node_put(parent_np);
|
||||
if (IS_ERR(map)) {
|
||||
pr_info("failed to get HHI regmap - Trying obsolete regs\n");
|
||||
|
||||
|
||||
@ -1337,6 +1337,7 @@ static void __init tegra114_clock_init(struct device_node *np)
|
||||
}
|
||||
|
||||
pmc_base = of_iomap(node, 0);
|
||||
of_node_put(node);
|
||||
if (!pmc_base) {
|
||||
pr_err("Can't map pmc registers\n");
|
||||
WARN_ON(1);
|
||||
|
||||
@ -1151,6 +1151,7 @@ static void __init tegra20_clock_init(struct device_node *np)
|
||||
}
|
||||
|
||||
pmc_base = of_iomap(node, 0);
|
||||
of_node_put(node);
|
||||
if (!pmc_base) {
|
||||
pr_err("Can't map pmc registers\n");
|
||||
BUG();
|
||||
|
||||
@ -3523,6 +3523,7 @@ static void __init tegra210_clock_init(struct device_node *np)
|
||||
}
|
||||
|
||||
pmc_base = of_iomap(node, 0);
|
||||
of_node_put(node);
|
||||
if (!pmc_base) {
|
||||
pr_err("Can't map pmc registers\n");
|
||||
WARN_ON(1);
|
||||
|
||||
@ -252,14 +252,16 @@ static int of_dra7_atl_clk_probe(struct platform_device *pdev)
|
||||
if (rc) {
|
||||
pr_err("%s: failed to lookup atl clock %d\n", __func__,
|
||||
i);
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto pm_put;
|
||||
}
|
||||
|
||||
clk = of_clk_get_from_provider(&clkspec);
|
||||
if (IS_ERR(clk)) {
|
||||
pr_err("%s: failed to get atl clock %d from provider\n",
|
||||
__func__, i);
|
||||
return PTR_ERR(clk);
|
||||
ret = PTR_ERR(clk);
|
||||
goto pm_put;
|
||||
}
|
||||
|
||||
cdesc = to_atl_desc(__clk_get_hw(clk));
|
||||
@ -292,8 +294,9 @@ static int of_dra7_atl_clk_probe(struct platform_device *pdev)
|
||||
if (cdesc->enabled)
|
||||
atl_clk_enable(__clk_get_hw(clk));
|
||||
}
|
||||
pm_runtime_put_sync(cinfo->dev);
|
||||
|
||||
pm_put:
|
||||
pm_runtime_put_sync(cinfo->dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@ -679,6 +679,13 @@ static void zynqmp_get_clock_info(void)
|
||||
FIELD_PREP(CLK_ATTR_NODE_INDEX, i);
|
||||
|
||||
zynqmp_pm_clock_get_name(clock[i].clk_id, &name);
|
||||
|
||||
/*
|
||||
* Terminate with NULL character in case name provided by firmware
|
||||
* is longer and truncated due to size limit.
|
||||
*/
|
||||
name.name[sizeof(name.name) - 1] = '\0';
|
||||
|
||||
if (!strcmp(name.name, RESERVED_CLK_NAME))
|
||||
continue;
|
||||
strncpy(clock[i].clk_name, name.name, MAX_NAME_LEN);
|
||||
|
||||
@ -98,26 +98,25 @@ static long zynqmp_pll_round_rate(struct clk_hw *hw, unsigned long rate,
|
||||
unsigned long *prate)
|
||||
{
|
||||
u32 fbdiv;
|
||||
long rate_div, f;
|
||||
u32 mult, div;
|
||||
|
||||
/* Enable the fractional mode if needed */
|
||||
rate_div = (rate * FRAC_DIV) / *prate;
|
||||
f = rate_div % FRAC_DIV;
|
||||
if (f) {
|
||||
if (rate > PS_PLL_VCO_MAX) {
|
||||
fbdiv = rate / PS_PLL_VCO_MAX;
|
||||
rate = rate / (fbdiv + 1);
|
||||
}
|
||||
if (rate < PS_PLL_VCO_MIN) {
|
||||
fbdiv = DIV_ROUND_UP(PS_PLL_VCO_MIN, rate);
|
||||
rate = rate * fbdiv;
|
||||
}
|
||||
return rate;
|
||||
/* Let rate fall inside the range PS_PLL_VCO_MIN ~ PS_PLL_VCO_MAX */
|
||||
if (rate > PS_PLL_VCO_MAX) {
|
||||
div = DIV_ROUND_UP(rate, PS_PLL_VCO_MAX);
|
||||
rate = rate / div;
|
||||
}
|
||||
if (rate < PS_PLL_VCO_MIN) {
|
||||
mult = DIV_ROUND_UP(PS_PLL_VCO_MIN, rate);
|
||||
rate = rate * mult;
|
||||
}
|
||||
|
||||
fbdiv = DIV_ROUND_CLOSEST(rate, *prate);
|
||||
fbdiv = clamp_t(u32, fbdiv, PLL_FBDIV_MIN, PLL_FBDIV_MAX);
|
||||
return *prate * fbdiv;
|
||||
if (fbdiv < PLL_FBDIV_MIN || fbdiv > PLL_FBDIV_MAX) {
|
||||
fbdiv = clamp_t(u32, fbdiv, PLL_FBDIV_MIN, PLL_FBDIV_MAX);
|
||||
rate = *prate * fbdiv;
|
||||
}
|
||||
|
||||
return rate;
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@ -254,6 +254,7 @@ static int cpt_ucode_load_fw(struct cpt_device *cpt, const u8 *fw, bool is_ae)
|
||||
const struct firmware *fw_entry;
|
||||
struct device *dev = &cpt->pdev->dev;
|
||||
struct ucode_header *ucode;
|
||||
unsigned int code_length;
|
||||
struct microcode *mcode;
|
||||
int j, ret = 0;
|
||||
|
||||
@ -264,11 +265,12 @@ static int cpt_ucode_load_fw(struct cpt_device *cpt, const u8 *fw, bool is_ae)
|
||||
ucode = (struct ucode_header *)fw_entry->data;
|
||||
mcode = &cpt->mcode[cpt->next_mc_idx];
|
||||
memcpy(mcode->version, (u8 *)fw_entry->data, CPT_UCODE_VERSION_SZ);
|
||||
mcode->code_size = ntohl(ucode->code_length) * 2;
|
||||
if (!mcode->code_size) {
|
||||
code_length = ntohl(ucode->code_length);
|
||||
if (code_length == 0 || code_length >= INT_MAX / 2) {
|
||||
ret = -EINVAL;
|
||||
goto fw_release;
|
||||
}
|
||||
mcode->code_size = code_length * 2;
|
||||
|
||||
mcode->is_ae = is_ae;
|
||||
mcode->core_mask = 0ULL;
|
||||
|
||||
@ -642,6 +642,10 @@ static void ccp_dma_release(struct ccp_device *ccp)
|
||||
for (i = 0; i < ccp->cmd_q_count; i++) {
|
||||
chan = ccp->ccp_dma_chan + i;
|
||||
dma_chan = &chan->dma_chan;
|
||||
|
||||
if (dma_chan->client_count)
|
||||
dma_release_channel(dma_chan);
|
||||
|
||||
tasklet_kill(&chan->cleanup_tasklet);
|
||||
list_del_rcu(&dma_chan->device_node);
|
||||
}
|
||||
@ -767,8 +771,8 @@ void ccp_dmaengine_unregister(struct ccp_device *ccp)
|
||||
if (!dmaengine)
|
||||
return;
|
||||
|
||||
dma_async_device_unregister(dma_dev);
|
||||
ccp_dma_release(ccp);
|
||||
dma_async_device_unregister(dma_dev);
|
||||
|
||||
kmem_cache_destroy(ccp->dma_desc_cache);
|
||||
kmem_cache_destroy(ccp->dma_cmd_cache);
|
||||
|
||||
@ -653,7 +653,7 @@ static void __cleanup(struct ioatdma_chan *ioat_chan, dma_addr_t phys_complete)
|
||||
if (active - i == 0) {
|
||||
dev_dbg(to_dev(ioat_chan), "%s: cancel completion timeout\n",
|
||||
__func__);
|
||||
mod_timer(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
mod_timer_pending(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
}
|
||||
|
||||
/* microsecond delay by sysfs variable per pending descriptor */
|
||||
@ -679,7 +679,7 @@ static void ioat_cleanup(struct ioatdma_chan *ioat_chan)
|
||||
|
||||
if (chanerr &
|
||||
(IOAT_CHANERR_HANDLE_MASK | IOAT_CHANERR_RECOVER_MASK)) {
|
||||
mod_timer(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
mod_timer_pending(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
ioat_eh(ioat_chan);
|
||||
}
|
||||
}
|
||||
@ -876,7 +876,7 @@ static void check_active(struct ioatdma_chan *ioat_chan)
|
||||
}
|
||||
|
||||
if (test_and_clear_bit(IOAT_CHAN_ACTIVE, &ioat_chan->state))
|
||||
mod_timer(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
mod_timer_pending(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
}
|
||||
|
||||
void ioat_timer_event(struct timer_list *t)
|
||||
|
||||
@ -291,14 +291,6 @@ efi_status_t allocate_new_fdt_and_exit_boot(efi_system_table_t *sys_table,
|
||||
goto fail;
|
||||
}
|
||||
|
||||
/*
|
||||
* Now that we have done our final memory allocation (and free)
|
||||
* we can get the memory map key needed for exit_boot_services().
|
||||
*/
|
||||
status = efi_get_memory_map(sys_table, &map);
|
||||
if (status != EFI_SUCCESS)
|
||||
goto fail_free_new_fdt;
|
||||
|
||||
status = update_fdt(sys_table, (void *)fdt_addr, fdt_size,
|
||||
(void *)*new_fdt_addr, MAX_FDT_SIZE, cmdline_ptr,
|
||||
initrd_addr, initrd_size);
|
||||
|
||||
@ -679,6 +679,15 @@ static struct notifier_block gsmi_die_notifier = {
|
||||
static int gsmi_panic_callback(struct notifier_block *nb,
|
||||
unsigned long reason, void *arg)
|
||||
{
|
||||
|
||||
/*
|
||||
* Panic callbacks are executed with all other CPUs stopped,
|
||||
* so we must not attempt to spin waiting for gsmi_dev.lock
|
||||
* to be released.
|
||||
*/
|
||||
if (spin_is_locked(&gsmi_dev.lock))
|
||||
return NOTIFY_DONE;
|
||||
|
||||
gsmi_shutdown_reason(GSMI_SHUTDOWN_PANIC);
|
||||
return NOTIFY_DONE;
|
||||
}
|
||||
|
||||
@ -1271,6 +1271,9 @@ int fsi_master_register(struct fsi_master *master)
|
||||
|
||||
mutex_init(&master->scan_lock);
|
||||
master->idx = ida_simple_get(&master_ida, 0, INT_MAX, GFP_KERNEL);
|
||||
if (master->idx < 0)
|
||||
return master->idx;
|
||||
|
||||
dev_set_name(&master->dev, "fsi%d", master->idx);
|
||||
|
||||
rc = device_register(&master->dev);
|
||||
|
||||
@ -27,6 +27,7 @@ menuconfig DRM
|
||||
config DRM_MIPI_DBI
|
||||
tristate
|
||||
depends on DRM
|
||||
select DRM_KMS_HELPER
|
||||
|
||||
config DRM_MIPI_DSI
|
||||
bool
|
||||
|
||||
@ -1646,10 +1646,12 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
||||
adev->mode_info.dither_property,
|
||||
AMDGPU_FMT_DITHER_DISABLE);
|
||||
|
||||
if (amdgpu_audio != 0)
|
||||
if (amdgpu_audio != 0) {
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.audio_property,
|
||||
AMDGPU_AUDIO_AUTO);
|
||||
amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
|
||||
}
|
||||
|
||||
subpixel_order = SubPixelHorizontalRGB;
|
||||
connector->interlace_allowed = true;
|
||||
@ -1771,6 +1773,7 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.audio_property,
|
||||
AMDGPU_AUDIO_AUTO);
|
||||
amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
|
||||
}
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.dither_property,
|
||||
@ -1824,6 +1827,7 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.audio_property,
|
||||
AMDGPU_AUDIO_AUTO);
|
||||
amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
|
||||
}
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.dither_property,
|
||||
@ -1874,6 +1878,7 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.audio_property,
|
||||
AMDGPU_AUDIO_AUTO);
|
||||
amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
|
||||
}
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.dither_property,
|
||||
|
||||
@ -26,12 +26,12 @@
|
||||
#include "bw_fixed.h"
|
||||
|
||||
|
||||
#define MIN_I64 \
|
||||
(int64_t)(-(1LL << 63))
|
||||
|
||||
#define MAX_I64 \
|
||||
(int64_t)((1ULL << 63) - 1)
|
||||
|
||||
#define MIN_I64 \
|
||||
(-MAX_I64 - 1)
|
||||
|
||||
#define FRACTIONAL_PART_MASK \
|
||||
((1ULL << BW_FIXED_BITS_PER_FRACTIONAL_PART) - 1)
|
||||
|
||||
|
||||
@ -384,10 +384,7 @@ void adv7511_cec_irq_process(struct adv7511 *adv7511, unsigned int irq1);
|
||||
#else
|
||||
static inline int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511)
|
||||
{
|
||||
unsigned int offset = adv7511->type == ADV7533 ?
|
||||
ADV7533_REG_CEC_OFFSET : 0;
|
||||
|
||||
regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset,
|
||||
regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL,
|
||||
ADV7511_CEC_CTRL_POWER_DOWN);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -316,7 +316,7 @@ int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511)
|
||||
goto err_cec_alloc;
|
||||
}
|
||||
|
||||
regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset, 0);
|
||||
regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL, 0);
|
||||
/* cec soft reset */
|
||||
regmap_write(adv7511->regmap_cec,
|
||||
ADV7511_REG_CEC_SOFT_RESET + offset, 0x01);
|
||||
@ -343,7 +343,7 @@ int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511)
|
||||
dev_info(dev, "Initializing CEC failed with error %d, disabling CEC\n",
|
||||
ret);
|
||||
err_cec_parse_dt:
|
||||
regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset,
|
||||
regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL,
|
||||
ADV7511_CEC_CTRL_POWER_DOWN);
|
||||
return ret == -EPROBE_DEFER ? ret : 0;
|
||||
}
|
||||
|
||||
@ -279,7 +279,9 @@ static void ge_b850v3_lvds_remove(void)
|
||||
* This check is to avoid both the drivers
|
||||
* removing the bridge in their remove() function
|
||||
*/
|
||||
if (!ge_b850v3_lvds_ptr)
|
||||
if (!ge_b850v3_lvds_ptr ||
|
||||
!ge_b850v3_lvds_ptr->stdp2690_i2c ||
|
||||
!ge_b850v3_lvds_ptr->stdp4028_i2c)
|
||||
goto out;
|
||||
|
||||
drm_bridge_remove(&ge_b850v3_lvds_ptr->bridge);
|
||||
|
||||
@ -473,7 +473,13 @@ EXPORT_SYMBOL(drm_invalid_op);
|
||||
*/
|
||||
static int drm_copy_field(char __user *buf, size_t *buf_len, const char *value)
|
||||
{
|
||||
int len;
|
||||
size_t len;
|
||||
|
||||
/* don't attempt to copy a NULL pointer */
|
||||
if (WARN_ONCE(!value, "BUG: the value to copy was not set!")) {
|
||||
*buf_len = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* don't overflow userbuf */
|
||||
len = strlen(value);
|
||||
|
||||
@ -300,6 +300,7 @@ static int mipi_dsi_remove_device_fn(struct device *dev, void *priv)
|
||||
{
|
||||
struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev);
|
||||
|
||||
mipi_dsi_detach(dsi);
|
||||
mipi_dsi_device_unregister(dsi);
|
||||
|
||||
return 0;
|
||||
|
||||
@ -128,6 +128,12 @@ static const struct dmi_system_id orientation_data[] = {
|
||||
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "One S1003"),
|
||||
},
|
||||
.driver_data = (void *)&lcd800x1280_rightside_up,
|
||||
}, { /* Anbernic Win600 */
|
||||
.matches = {
|
||||
DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "Anbernic"),
|
||||
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Win600"),
|
||||
},
|
||||
.driver_data = (void *)&lcd720x1280_rightside_up,
|
||||
}, { /* Asus T100HA */
|
||||
.matches = {
|
||||
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
|
||||
|
||||
@ -596,12 +596,10 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
|
||||
_dpu_kms_mmu_destroy(dpu_kms);
|
||||
|
||||
if (dpu_kms->catalog) {
|
||||
for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
|
||||
u32 vbif_idx = dpu_kms->catalog->vbif[i].id;
|
||||
|
||||
if ((vbif_idx < VBIF_MAX) && dpu_kms->hw_vbif[vbif_idx]) {
|
||||
dpu_hw_vbif_destroy(dpu_kms->hw_vbif[vbif_idx]);
|
||||
dpu_kms->hw_vbif[vbif_idx] = NULL;
|
||||
for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) {
|
||||
if (dpu_kms->hw_vbif[i]) {
|
||||
dpu_hw_vbif_destroy(dpu_kms->hw_vbif[i]);
|
||||
dpu_kms->hw_vbif[i] = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -899,7 +897,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
|
||||
for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
|
||||
u32 vbif_idx = dpu_kms->catalog->vbif[i].id;
|
||||
|
||||
dpu_kms->hw_vbif[i] = dpu_hw_vbif_init(vbif_idx,
|
||||
dpu_kms->hw_vbif[vbif_idx] = dpu_hw_vbif_init(vbif_idx,
|
||||
dpu_kms->vbif[vbif_idx], dpu_kms->catalog);
|
||||
if (IS_ERR_OR_NULL(dpu_kms->hw_vbif[vbif_idx])) {
|
||||
rc = PTR_ERR(dpu_kms->hw_vbif[vbif_idx]);
|
||||
|
||||
@ -11,6 +11,14 @@
|
||||
#include "dpu_hw_vbif.h"
|
||||
#include "dpu_trace.h"
|
||||
|
||||
static struct dpu_hw_vbif *dpu_get_vbif(struct dpu_kms *dpu_kms, enum dpu_vbif vbif_idx)
|
||||
{
|
||||
if (vbif_idx < ARRAY_SIZE(dpu_kms->hw_vbif))
|
||||
return dpu_kms->hw_vbif[vbif_idx];
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* _dpu_vbif_wait_for_xin_halt - wait for the xin to halt
|
||||
* @vbif: Pointer to hardware vbif driver
|
||||
@ -148,11 +156,11 @@ static u32 _dpu_vbif_get_ot_limit(struct dpu_hw_vbif *vbif,
|
||||
void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms,
|
||||
struct dpu_vbif_set_ot_params *params)
|
||||
{
|
||||
struct dpu_hw_vbif *vbif = NULL;
|
||||
struct dpu_hw_vbif *vbif;
|
||||
struct dpu_hw_mdp *mdp;
|
||||
bool forced_on = false;
|
||||
u32 ot_lim;
|
||||
int ret, i;
|
||||
int ret;
|
||||
|
||||
if (!dpu_kms) {
|
||||
DPU_ERROR("invalid arguments\n");
|
||||
@ -160,12 +168,7 @@ void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms,
|
||||
}
|
||||
mdp = dpu_kms->hw_mdp;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) {
|
||||
if (dpu_kms->hw_vbif[i] &&
|
||||
dpu_kms->hw_vbif[i]->idx == params->vbif_idx)
|
||||
vbif = dpu_kms->hw_vbif[i];
|
||||
}
|
||||
|
||||
vbif = dpu_get_vbif(dpu_kms, params->vbif_idx);
|
||||
if (!vbif || !mdp) {
|
||||
DPU_DEBUG("invalid arguments vbif %d mdp %d\n",
|
||||
vbif != 0, mdp != 0);
|
||||
@ -208,7 +211,7 @@ void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms,
|
||||
void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms,
|
||||
struct dpu_vbif_set_qos_params *params)
|
||||
{
|
||||
struct dpu_hw_vbif *vbif = NULL;
|
||||
struct dpu_hw_vbif *vbif;
|
||||
struct dpu_hw_mdp *mdp;
|
||||
bool forced_on = false;
|
||||
const struct dpu_vbif_qos_tbl *qos_tbl;
|
||||
@ -220,13 +223,7 @@ void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms,
|
||||
}
|
||||
mdp = dpu_kms->hw_mdp;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) {
|
||||
if (dpu_kms->hw_vbif[i] &&
|
||||
dpu_kms->hw_vbif[i]->idx == params->vbif_idx) {
|
||||
vbif = dpu_kms->hw_vbif[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
vbif = dpu_get_vbif(dpu_kms, params->vbif_idx);
|
||||
|
||||
if (!vbif || !vbif->cap) {
|
||||
DPU_ERROR("invalid vbif %d\n", params->vbif_idx);
|
||||
|
||||
@ -276,8 +276,10 @@ nouveau_bo_alloc(struct nouveau_cli *cli, u64 *size, int *align, u32 flags,
|
||||
break;
|
||||
}
|
||||
|
||||
if (WARN_ON(pi < 0))
|
||||
if (WARN_ON(pi < 0)) {
|
||||
kfree(nvbo);
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
/* Disable compression if suitable settings couldn't be found. */
|
||||
if (nvbo->comp && !vmm->page[pi].comp) {
|
||||
|
||||
@ -90,7 +90,6 @@ struct drm_gem_object *nouveau_gem_prime_import_sg_table(struct drm_device *dev,
|
||||
|
||||
ret = nouveau_bo_init(nvbo, size, align, flags, sg, robj);
|
||||
if (ret) {
|
||||
nouveau_bo_ref(NULL, &nvbo);
|
||||
obj = ERR_PTR(ret);
|
||||
goto unlock;
|
||||
}
|
||||
|
||||
@ -1173,6 +1173,7 @@ static void __dss_uninit_ports(struct dss_device *dss, unsigned int num_ports)
|
||||
default:
|
||||
break;
|
||||
}
|
||||
of_node_put(port);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1205,11 +1206,13 @@ static int dss_init_ports(struct dss_device *dss)
|
||||
default:
|
||||
break;
|
||||
}
|
||||
of_node_put(port);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
error:
|
||||
of_node_put(port);
|
||||
__dss_uninit_ports(dss, i);
|
||||
return r;
|
||||
}
|
||||
|
||||
@ -256,7 +256,7 @@ static void vc4_vec_ntsc_j_mode_set(struct vc4_vec *vec)
|
||||
static const struct drm_display_mode ntsc_mode = {
|
||||
DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 13500,
|
||||
720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0,
|
||||
480, 480 + 3, 480 + 3 + 3, 480 + 3 + 3 + 16, 0,
|
||||
480, 480 + 7, 480 + 7 + 6, 525, 0,
|
||||
DRM_MODE_FLAG_INTERLACE)
|
||||
};
|
||||
|
||||
@ -278,7 +278,7 @@ static void vc4_vec_pal_m_mode_set(struct vc4_vec *vec)
|
||||
static const struct drm_display_mode pal_mode = {
|
||||
DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 13500,
|
||||
720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0,
|
||||
576, 576 + 2, 576 + 2 + 3, 576 + 2 + 3 + 20, 0,
|
||||
576, 576 + 4, 576 + 4 + 6, 625, 0,
|
||||
DRM_MODE_FLAG_INTERLACE)
|
||||
};
|
||||
|
||||
|
||||
@ -1162,7 +1162,7 @@ static void mt_touch_report(struct hid_device *hid,
|
||||
int contact_count = -1;
|
||||
|
||||
/* sticky fingers release in progress, abort */
|
||||
if (test_and_set_bit(MT_IO_FLAGS_RUNNING, &td->mt_io_flags))
|
||||
if (test_and_set_bit_lock(MT_IO_FLAGS_RUNNING, &td->mt_io_flags))
|
||||
return;
|
||||
|
||||
scantime = *app->scantime;
|
||||
@ -1243,7 +1243,7 @@ static void mt_touch_report(struct hid_device *hid,
|
||||
del_timer(&td->release_timer);
|
||||
}
|
||||
|
||||
clear_bit(MT_IO_FLAGS_RUNNING, &td->mt_io_flags);
|
||||
clear_bit_unlock(MT_IO_FLAGS_RUNNING, &td->mt_io_flags);
|
||||
}
|
||||
|
||||
static int mt_touch_input_configured(struct hid_device *hdev,
|
||||
@ -1680,11 +1680,11 @@ static void mt_expired_timeout(struct timer_list *t)
|
||||
* An input report came in just before we release the sticky fingers,
|
||||
* it will take care of the sticky fingers.
|
||||
*/
|
||||
if (test_and_set_bit(MT_IO_FLAGS_RUNNING, &td->mt_io_flags))
|
||||
if (test_and_set_bit_lock(MT_IO_FLAGS_RUNNING, &td->mt_io_flags))
|
||||
return;
|
||||
if (test_bit(MT_IO_FLAGS_PENDING_SLOTS, &td->mt_io_flags))
|
||||
mt_release_contacts(hdev);
|
||||
clear_bit(MT_IO_FLAGS_RUNNING, &td->mt_io_flags);
|
||||
clear_bit_unlock(MT_IO_FLAGS_RUNNING, &td->mt_io_flags);
|
||||
}
|
||||
|
||||
static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)
|
||||
|
||||
@ -257,6 +257,8 @@ int roccat_report_event(int minor, u8 const *data)
|
||||
if (!new_value)
|
||||
return -ENOMEM;
|
||||
|
||||
mutex_lock(&device->cbuf_lock);
|
||||
|
||||
report = &device->cbuf[device->cbuf_end];
|
||||
|
||||
/* passing NULL is safe */
|
||||
@ -276,6 +278,8 @@ int roccat_report_event(int minor, u8 const *data)
|
||||
reader->cbuf_start = (reader->cbuf_start + 1) % ROCCAT_CBUF_SIZE;
|
||||
}
|
||||
|
||||
mutex_unlock(&device->cbuf_lock);
|
||||
|
||||
wake_up_interruptible(&device->wait);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -524,6 +524,7 @@ static int ssi_probe(struct platform_device *pd)
|
||||
if (!childpdev) {
|
||||
err = -ENODEV;
|
||||
dev_err(&pd->dev, "failed to create ssi controller port\n");
|
||||
of_node_put(child);
|
||||
goto out3;
|
||||
}
|
||||
}
|
||||
|
||||
@ -230,10 +230,10 @@ static int ssi_start_dma(struct hsi_msg *msg, int lch)
|
||||
if (msg->ttype == HSI_MSG_READ) {
|
||||
err = dma_map_sg(&ssi->device, msg->sgt.sgl, msg->sgt.nents,
|
||||
DMA_FROM_DEVICE);
|
||||
if (err < 0) {
|
||||
if (!err) {
|
||||
dev_dbg(&ssi->device, "DMA map SG failed !\n");
|
||||
pm_runtime_put_autosuspend(omap_port->pdev);
|
||||
return err;
|
||||
return -EIO;
|
||||
}
|
||||
csdp = SSI_DST_BURST_4x32_BIT | SSI_DST_MEMORY_PORT |
|
||||
SSI_SRC_SINGLE_ACCESS0 | SSI_SRC_PERIPHERAL_PORT |
|
||||
@ -247,10 +247,10 @@ static int ssi_start_dma(struct hsi_msg *msg, int lch)
|
||||
} else {
|
||||
err = dma_map_sg(&ssi->device, msg->sgt.sgl, msg->sgt.nents,
|
||||
DMA_TO_DEVICE);
|
||||
if (err < 0) {
|
||||
if (!err) {
|
||||
dev_dbg(&ssi->device, "DMA map SG failed !\n");
|
||||
pm_runtime_put_autosuspend(omap_port->pdev);
|
||||
return err;
|
||||
return -EIO;
|
||||
}
|
||||
csdp = SSI_SRC_BURST_4x32_BIT | SSI_SRC_MEMORY_PORT |
|
||||
SSI_DST_SINGLE_ACCESS0 | SSI_DST_PERIPHERAL_PORT |
|
||||
|
||||
@ -73,7 +73,7 @@
|
||||
#define AT91_SAMA5D2_MR_ANACH BIT(23)
|
||||
/* Tracking Time */
|
||||
#define AT91_SAMA5D2_MR_TRACKTIM(v) ((v) << 24)
|
||||
#define AT91_SAMA5D2_MR_TRACKTIM_MAX 0xff
|
||||
#define AT91_SAMA5D2_MR_TRACKTIM_MAX 0xf
|
||||
/* Transfer Time */
|
||||
#define AT91_SAMA5D2_MR_TRANSFER(v) ((v) << 28)
|
||||
#define AT91_SAMA5D2_MR_TRANSFER_MAX 0x3
|
||||
@ -1321,10 +1321,12 @@ static int at91_adc_read_info_raw(struct iio_dev *indio_dev,
|
||||
ret = at91_adc_read_position(st, chan->channel,
|
||||
&tmp_val);
|
||||
*val = tmp_val;
|
||||
if (ret > 0)
|
||||
ret = at91_adc_adjust_val_osr(st, val);
|
||||
mutex_unlock(&st->lock);
|
||||
iio_device_release_direct_mode(indio_dev);
|
||||
|
||||
return at91_adc_adjust_val_osr(st, val);
|
||||
return ret;
|
||||
}
|
||||
if (chan->type == IIO_PRESSURE) {
|
||||
ret = iio_device_claim_direct_mode(indio_dev);
|
||||
@ -1335,10 +1337,12 @@ static int at91_adc_read_info_raw(struct iio_dev *indio_dev,
|
||||
ret = at91_adc_read_pressure(st, chan->channel,
|
||||
&tmp_val);
|
||||
*val = tmp_val;
|
||||
if (ret > 0)
|
||||
ret = at91_adc_adjust_val_osr(st, val);
|
||||
mutex_unlock(&st->lock);
|
||||
iio_device_release_direct_mode(indio_dev);
|
||||
|
||||
return at91_adc_adjust_val_osr(st, val);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* in this case we have a voltage channel */
|
||||
@ -1429,16 +1433,20 @@ static int at91_adc_write_raw(struct iio_dev *indio_dev,
|
||||
/* if no change, optimize out */
|
||||
if (val == st->oversampling_ratio)
|
||||
return 0;
|
||||
mutex_lock(&st->lock);
|
||||
st->oversampling_ratio = val;
|
||||
/* update ratio */
|
||||
at91_adc_config_emr(st);
|
||||
mutex_unlock(&st->lock);
|
||||
return 0;
|
||||
case IIO_CHAN_INFO_SAMP_FREQ:
|
||||
if (val < st->soc_info.min_sample_rate ||
|
||||
val > st->soc_info.max_sample_rate)
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&st->lock);
|
||||
at91_adc_setup_samp_freq(indio_dev, val);
|
||||
mutex_unlock(&st->lock);
|
||||
return 0;
|
||||
default:
|
||||
return -EINVAL;
|
||||
|
||||
@ -14,6 +14,8 @@
|
||||
#include <linux/of.h>
|
||||
#include <linux/acpi.h>
|
||||
|
||||
#include <asm/unaligned.h>
|
||||
|
||||
#define AD5593R_MODE_CONF (0 << 4)
|
||||
#define AD5593R_MODE_DAC_WRITE (1 << 4)
|
||||
#define AD5593R_MODE_ADC_READBACK (4 << 4)
|
||||
@ -21,6 +23,24 @@
|
||||
#define AD5593R_MODE_GPIO_READBACK (6 << 4)
|
||||
#define AD5593R_MODE_REG_READBACK (7 << 4)
|
||||
|
||||
static int ad5593r_read_word(struct i2c_client *i2c, u8 reg, u16 *value)
|
||||
{
|
||||
int ret;
|
||||
u8 buf[2];
|
||||
|
||||
ret = i2c_smbus_write_byte(i2c, reg);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = i2c_master_recv(i2c, buf, sizeof(buf));
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
*value = get_unaligned_be16(buf);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ad5593r_write_dac(struct ad5592r_state *st, unsigned chan, u16 value)
|
||||
{
|
||||
struct i2c_client *i2c = to_i2c_client(st->dev);
|
||||
@ -39,13 +59,7 @@ static int ad5593r_read_adc(struct ad5592r_state *st, unsigned chan, u16 *value)
|
||||
if (val < 0)
|
||||
return (int) val;
|
||||
|
||||
val = i2c_smbus_read_word_swapped(i2c, AD5593R_MODE_ADC_READBACK);
|
||||
if (val < 0)
|
||||
return (int) val;
|
||||
|
||||
*value = (u16) val;
|
||||
|
||||
return 0;
|
||||
return ad5593r_read_word(i2c, AD5593R_MODE_ADC_READBACK, value);
|
||||
}
|
||||
|
||||
static int ad5593r_reg_write(struct ad5592r_state *st, u8 reg, u16 value)
|
||||
@ -59,25 +73,19 @@ static int ad5593r_reg_write(struct ad5592r_state *st, u8 reg, u16 value)
|
||||
static int ad5593r_reg_read(struct ad5592r_state *st, u8 reg, u16 *value)
|
||||
{
|
||||
struct i2c_client *i2c = to_i2c_client(st->dev);
|
||||
s32 val;
|
||||
|
||||
val = i2c_smbus_read_word_swapped(i2c, AD5593R_MODE_REG_READBACK | reg);
|
||||
if (val < 0)
|
||||
return (int) val;
|
||||
|
||||
*value = (u16) val;
|
||||
|
||||
return 0;
|
||||
return ad5593r_read_word(i2c, AD5593R_MODE_REG_READBACK | reg, value);
|
||||
}
|
||||
|
||||
static int ad5593r_gpio_read(struct ad5592r_state *st, u8 *value)
|
||||
{
|
||||
struct i2c_client *i2c = to_i2c_client(st->dev);
|
||||
s32 val;
|
||||
u16 val;
|
||||
int ret;
|
||||
|
||||
val = i2c_smbus_read_word_swapped(i2c, AD5593R_MODE_GPIO_READBACK);
|
||||
if (val < 0)
|
||||
return (int) val;
|
||||
ret = ad5593r_read_word(i2c, AD5593R_MODE_GPIO_READBACK, &val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
*value = (u8) val;
|
||||
|
||||
|
||||
@ -136,9 +136,10 @@ static int __of_iio_channel_get(struct iio_channel *channel,
|
||||
|
||||
idev = bus_find_device(&iio_bus_type, NULL, iiospec.np,
|
||||
iio_dev_node_match);
|
||||
of_node_put(iiospec.np);
|
||||
if (idev == NULL)
|
||||
if (idev == NULL) {
|
||||
of_node_put(iiospec.np);
|
||||
return -EPROBE_DEFER;
|
||||
}
|
||||
|
||||
indio_dev = dev_to_iio_dev(idev);
|
||||
channel->indio_dev = indio_dev;
|
||||
@ -146,6 +147,7 @@ static int __of_iio_channel_get(struct iio_channel *channel,
|
||||
index = indio_dev->info->of_xlate(indio_dev, &iiospec);
|
||||
else
|
||||
index = __of_iio_simple_xlate(indio_dev, &iiospec);
|
||||
of_node_put(iiospec.np);
|
||||
if (index < 0)
|
||||
goto err_put;
|
||||
channel->channel = &indio_dev->channels[index];
|
||||
|
||||
@ -89,6 +89,7 @@ struct dps310_data {
|
||||
s32 c00, c10, c20, c30, c01, c11, c21;
|
||||
s32 pressure_raw;
|
||||
s32 temp_raw;
|
||||
bool timeout_recovery_failed;
|
||||
};
|
||||
|
||||
static const struct iio_chan_spec dps310_channels[] = {
|
||||
@ -159,6 +160,102 @@ static int dps310_get_coefs(struct dps310_data *data)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Some versions of the chip will read temperatures in the ~60C range when
|
||||
* it's actually ~20C. This is the manufacturer recommended workaround
|
||||
* to correct the issue. The registers used below are undocumented.
|
||||
*/
|
||||
static int dps310_temp_workaround(struct dps310_data *data)
|
||||
{
|
||||
int rc;
|
||||
int reg;
|
||||
|
||||
rc = regmap_read(data->regmap, 0x32, ®);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/*
|
||||
* If bit 1 is set then the device is okay, and the workaround does not
|
||||
* need to be applied
|
||||
*/
|
||||
if (reg & BIT(1))
|
||||
return 0;
|
||||
|
||||
rc = regmap_write(data->regmap, 0x0e, 0xA5);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = regmap_write(data->regmap, 0x0f, 0x96);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = regmap_write(data->regmap, 0x62, 0x02);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = regmap_write(data->regmap, 0x0e, 0x00);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
return regmap_write(data->regmap, 0x0f, 0x00);
|
||||
}
|
||||
|
||||
static int dps310_startup(struct dps310_data *data)
|
||||
{
|
||||
int rc;
|
||||
int ready;
|
||||
|
||||
/*
|
||||
* Set up pressure sensor in single sample, one measurement per second
|
||||
* mode
|
||||
*/
|
||||
rc = regmap_write(data->regmap, DPS310_PRS_CFG, 0);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/*
|
||||
* Set up external (MEMS) temperature sensor in single sample, one
|
||||
* measurement per second mode
|
||||
*/
|
||||
rc = regmap_write(data->regmap, DPS310_TMP_CFG, DPS310_TMP_EXT);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/* Temp and pressure shifts are disabled when PRC <= 8 */
|
||||
rc = regmap_write_bits(data->regmap, DPS310_CFG_REG,
|
||||
DPS310_PRS_SHIFT_EN | DPS310_TMP_SHIFT_EN, 0);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/* MEAS_CFG doesn't update correctly unless first written with 0 */
|
||||
rc = regmap_write_bits(data->regmap, DPS310_MEAS_CFG,
|
||||
DPS310_MEAS_CTRL_BITS, 0);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/* Turn on temperature and pressure measurement in the background */
|
||||
rc = regmap_write_bits(data->regmap, DPS310_MEAS_CFG,
|
||||
DPS310_MEAS_CTRL_BITS, DPS310_PRS_EN |
|
||||
DPS310_TEMP_EN | DPS310_BACKGROUND);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/*
|
||||
* Calibration coefficients required for reporting temperature.
|
||||
* They are available 40ms after the device has started
|
||||
*/
|
||||
rc = regmap_read_poll_timeout(data->regmap, DPS310_MEAS_CFG, ready,
|
||||
ready & DPS310_COEF_RDY, 10000, 40000);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = dps310_get_coefs(data);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
return dps310_temp_workaround(data);
|
||||
}
|
||||
|
||||
static int dps310_get_pres_precision(struct dps310_data *data)
|
||||
{
|
||||
int rc;
|
||||
@ -297,11 +394,69 @@ static int dps310_get_temp_k(struct dps310_data *data)
|
||||
return scale_factors[ilog2(rc)];
|
||||
}
|
||||
|
||||
static int dps310_reset_wait(struct dps310_data *data)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = regmap_write(data->regmap, DPS310_RESET, DPS310_RESET_MAGIC);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/* Wait for device chip access: 2.5ms in specification */
|
||||
usleep_range(2500, 12000);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dps310_reset_reinit(struct dps310_data *data)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = dps310_reset_wait(data);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
return dps310_startup(data);
|
||||
}
|
||||
|
||||
static int dps310_ready_status(struct dps310_data *data, int ready_bit, int timeout)
|
||||
{
|
||||
int sleep = DPS310_POLL_SLEEP_US(timeout);
|
||||
int ready;
|
||||
|
||||
return regmap_read_poll_timeout(data->regmap, DPS310_MEAS_CFG, ready, ready & ready_bit,
|
||||
sleep, timeout);
|
||||
}
|
||||
|
||||
static int dps310_ready(struct dps310_data *data, int ready_bit, int timeout)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = dps310_ready_status(data, ready_bit, timeout);
|
||||
if (rc) {
|
||||
if (rc == -ETIMEDOUT && !data->timeout_recovery_failed) {
|
||||
/* Reset and reinitialize the chip. */
|
||||
if (dps310_reset_reinit(data)) {
|
||||
data->timeout_recovery_failed = true;
|
||||
} else {
|
||||
/* Try again to get sensor ready status. */
|
||||
if (dps310_ready_status(data, ready_bit, timeout))
|
||||
data->timeout_recovery_failed = true;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
data->timeout_recovery_failed = false;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dps310_read_pres_raw(struct dps310_data *data)
|
||||
{
|
||||
int rc;
|
||||
int rate;
|
||||
int ready;
|
||||
int timeout;
|
||||
s32 raw;
|
||||
u8 val[3];
|
||||
@ -313,9 +468,7 @@ static int dps310_read_pres_raw(struct dps310_data *data)
|
||||
timeout = DPS310_POLL_TIMEOUT_US(rate);
|
||||
|
||||
/* Poll for sensor readiness; base the timeout upon the sample rate. */
|
||||
rc = regmap_read_poll_timeout(data->regmap, DPS310_MEAS_CFG, ready,
|
||||
ready & DPS310_PRS_RDY,
|
||||
DPS310_POLL_SLEEP_US(timeout), timeout);
|
||||
rc = dps310_ready(data, DPS310_PRS_RDY, timeout);
|
||||
if (rc)
|
||||
goto done;
|
||||
|
||||
@ -352,7 +505,6 @@ static int dps310_read_temp_raw(struct dps310_data *data)
|
||||
{
|
||||
int rc;
|
||||
int rate;
|
||||
int ready;
|
||||
int timeout;
|
||||
|
||||
if (mutex_lock_interruptible(&data->lock))
|
||||
@ -362,10 +514,8 @@ static int dps310_read_temp_raw(struct dps310_data *data)
|
||||
timeout = DPS310_POLL_TIMEOUT_US(rate);
|
||||
|
||||
/* Poll for sensor readiness; base the timeout upon the sample rate. */
|
||||
rc = regmap_read_poll_timeout(data->regmap, DPS310_MEAS_CFG, ready,
|
||||
ready & DPS310_TMP_RDY,
|
||||
DPS310_POLL_SLEEP_US(timeout), timeout);
|
||||
if (rc < 0)
|
||||
rc = dps310_ready(data, DPS310_TMP_RDY, timeout);
|
||||
if (rc)
|
||||
goto done;
|
||||
|
||||
rc = dps310_read_temp_ready(data);
|
||||
@ -660,7 +810,7 @@ static void dps310_reset(void *action_data)
|
||||
{
|
||||
struct dps310_data *data = action_data;
|
||||
|
||||
regmap_write(data->regmap, DPS310_RESET, DPS310_RESET_MAGIC);
|
||||
dps310_reset_wait(data);
|
||||
}
|
||||
|
||||
static const struct regmap_config dps310_regmap_config = {
|
||||
@ -677,52 +827,12 @@ static const struct iio_info dps310_info = {
|
||||
.write_raw = dps310_write_raw,
|
||||
};
|
||||
|
||||
/*
|
||||
* Some verions of chip will read temperatures in the ~60C range when
|
||||
* its actually ~20C. This is the manufacturer recommended workaround
|
||||
* to correct the issue. The registers used below are undocumented.
|
||||
*/
|
||||
static int dps310_temp_workaround(struct dps310_data *data)
|
||||
{
|
||||
int rc;
|
||||
int reg;
|
||||
|
||||
rc = regmap_read(data->regmap, 0x32, ®);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/*
|
||||
* If bit 1 is set then the device is okay, and the workaround does not
|
||||
* need to be applied
|
||||
*/
|
||||
if (reg & BIT(1))
|
||||
return 0;
|
||||
|
||||
rc = regmap_write(data->regmap, 0x0e, 0xA5);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
rc = regmap_write(data->regmap, 0x0f, 0x96);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
rc = regmap_write(data->regmap, 0x62, 0x02);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
rc = regmap_write(data->regmap, 0x0e, 0x00);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
return regmap_write(data->regmap, 0x0f, 0x00);
|
||||
}
|
||||
|
||||
static int dps310_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct dps310_data *data;
|
||||
struct iio_dev *iio;
|
||||
int rc, ready;
|
||||
int rc;
|
||||
|
||||
iio = devm_iio_device_alloc(&client->dev, sizeof(*data));
|
||||
if (!iio)
|
||||
@ -748,54 +858,8 @@ static int dps310_probe(struct i2c_client *client,
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/*
|
||||
* Set up pressure sensor in single sample, one measurement per second
|
||||
* mode
|
||||
*/
|
||||
rc = regmap_write(data->regmap, DPS310_PRS_CFG, 0);
|
||||
|
||||
/*
|
||||
* Set up external (MEMS) temperature sensor in single sample, one
|
||||
* measurement per second mode
|
||||
*/
|
||||
rc = regmap_write(data->regmap, DPS310_TMP_CFG, DPS310_TMP_EXT);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* Temp and pressure shifts are disabled when PRC <= 8 */
|
||||
rc = regmap_write_bits(data->regmap, DPS310_CFG_REG,
|
||||
DPS310_PRS_SHIFT_EN | DPS310_TMP_SHIFT_EN, 0);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* MEAS_CFG doesn't update correctly unless first written with 0 */
|
||||
rc = regmap_write_bits(data->regmap, DPS310_MEAS_CFG,
|
||||
DPS310_MEAS_CTRL_BITS, 0);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* Turn on temperature and pressure measurement in the background */
|
||||
rc = regmap_write_bits(data->regmap, DPS310_MEAS_CFG,
|
||||
DPS310_MEAS_CTRL_BITS, DPS310_PRS_EN |
|
||||
DPS310_TEMP_EN | DPS310_BACKGROUND);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/*
|
||||
* Calibration coefficients required for reporting temperature.
|
||||
* They are available 40ms after the device has started
|
||||
*/
|
||||
rc = regmap_read_poll_timeout(data->regmap, DPS310_MEAS_CFG, ready,
|
||||
ready & DPS310_COEF_RDY, 10000, 40000);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
rc = dps310_get_coefs(data);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
rc = dps310_temp_workaround(data);
|
||||
if (rc < 0)
|
||||
rc = dps310_startup(data);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = devm_iio_device_register(&client->dev, iio);
|
||||
|
||||
@ -805,7 +805,9 @@ void rxe_qp_destroy(struct rxe_qp *qp)
|
||||
rxe_cleanup_task(&qp->comp.task);
|
||||
|
||||
/* flush out any receive wr's or pending requests */
|
||||
__rxe_do_task(&qp->req.task);
|
||||
if (qp->req.task.func)
|
||||
__rxe_do_task(&qp->req.task);
|
||||
|
||||
if (qp->sq.queue) {
|
||||
__rxe_do_task(&qp->comp.task);
|
||||
__rxe_do_task(&qp->req.task);
|
||||
@ -845,8 +847,10 @@ static void rxe_qp_do_cleanup(struct work_struct *work)
|
||||
|
||||
free_rd_atomic_resources(qp);
|
||||
|
||||
kernel_sock_shutdown(qp->sk, SHUT_RDWR);
|
||||
sock_release(qp->sk);
|
||||
if (qp->sk) {
|
||||
kernel_sock_shutdown(qp->sk, SHUT_RDWR);
|
||||
sock_release(qp->sk);
|
||||
}
|
||||
}
|
||||
|
||||
/* called when the last reference to the qp is dropped */
|
||||
|
||||
@ -961,27 +961,28 @@ int siw_proc_terminate(struct siw_qp *qp)
|
||||
static int siw_get_trailer(struct siw_qp *qp, struct siw_rx_stream *srx)
|
||||
{
|
||||
struct sk_buff *skb = srx->skb;
|
||||
int avail = min(srx->skb_new, srx->fpdu_part_rem);
|
||||
u8 *tbuf = (u8 *)&srx->trailer.crc - srx->pad;
|
||||
__wsum crc_in, crc_own = 0;
|
||||
|
||||
siw_dbg_qp(qp, "expected %d, available %d, pad %u\n",
|
||||
srx->fpdu_part_rem, srx->skb_new, srx->pad);
|
||||
|
||||
if (srx->skb_new < srx->fpdu_part_rem)
|
||||
skb_copy_bits(skb, srx->skb_offset, tbuf, avail);
|
||||
|
||||
srx->skb_new -= avail;
|
||||
srx->skb_offset += avail;
|
||||
srx->skb_copied += avail;
|
||||
srx->fpdu_part_rem -= avail;
|
||||
|
||||
if (srx->fpdu_part_rem)
|
||||
return -EAGAIN;
|
||||
|
||||
skb_copy_bits(skb, srx->skb_offset, tbuf, srx->fpdu_part_rem);
|
||||
|
||||
if (srx->mpa_crc_hd && srx->pad)
|
||||
crypto_shash_update(srx->mpa_crc_hd, tbuf, srx->pad);
|
||||
|
||||
srx->skb_new -= srx->fpdu_part_rem;
|
||||
srx->skb_offset += srx->fpdu_part_rem;
|
||||
srx->skb_copied += srx->fpdu_part_rem;
|
||||
|
||||
if (!srx->mpa_crc_hd)
|
||||
return 0;
|
||||
|
||||
if (srx->pad)
|
||||
crypto_shash_update(srx->mpa_crc_hd, tbuf, srx->pad);
|
||||
/*
|
||||
* CRC32 is computed, transmitted and received directly in NBO,
|
||||
* so there's never a reason to convert byte order.
|
||||
@ -1083,10 +1084,9 @@ static int siw_get_hdr(struct siw_rx_stream *srx)
|
||||
* completely received.
|
||||
*/
|
||||
if (iwarp_pktinfo[opcode].hdr_len > sizeof(struct iwarp_ctrl_tagged)) {
|
||||
bytes = iwarp_pktinfo[opcode].hdr_len - MIN_DDP_HDR;
|
||||
int hdrlen = iwarp_pktinfo[opcode].hdr_len;
|
||||
|
||||
if (srx->skb_new < bytes)
|
||||
return -EAGAIN;
|
||||
bytes = min_t(int, hdrlen - MIN_DDP_HDR, srx->skb_new);
|
||||
|
||||
skb_copy_bits(skb, srx->skb_offset,
|
||||
(char *)c_hdr + srx->fpdu_part_rcvd, bytes);
|
||||
@ -1096,6 +1096,9 @@ static int siw_get_hdr(struct siw_rx_stream *srx)
|
||||
srx->skb_new -= bytes;
|
||||
srx->skb_offset += bytes;
|
||||
srx->skb_copied += bytes;
|
||||
|
||||
if (srx->fpdu_part_rcvd < hdrlen)
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
@ -32,12 +32,12 @@ static inline bool is_omap_iommu_detached(struct omap_iommu *obj)
|
||||
ssize_t bytes; \
|
||||
const char *str = "%20s: %08x\n"; \
|
||||
const int maxcol = 32; \
|
||||
bytes = snprintf(p, maxcol, str, __stringify(name), \
|
||||
if (len < maxcol) \
|
||||
goto out; \
|
||||
bytes = scnprintf(p, maxcol, str, __stringify(name), \
|
||||
iommu_read_reg(obj, MMU_##name)); \
|
||||
p += bytes; \
|
||||
len -= bytes; \
|
||||
if (len < maxcol) \
|
||||
goto out; \
|
||||
} while (0)
|
||||
|
||||
static ssize_t
|
||||
|
||||
@ -59,6 +59,7 @@ struct l1oip {
|
||||
int bundle; /* bundle channels in one frm */
|
||||
int codec; /* codec to use for transmis. */
|
||||
int limit; /* limit number of bchannels */
|
||||
bool shutdown; /* if card is released */
|
||||
|
||||
/* timer */
|
||||
struct timer_list keep_tl;
|
||||
|
||||
@ -275,7 +275,7 @@ l1oip_socket_send(struct l1oip *hc, u8 localcodec, u8 channel, u32 chanmask,
|
||||
p = frame;
|
||||
|
||||
/* restart timer */
|
||||
if (time_before(hc->keep_tl.expires, jiffies + 5 * HZ))
|
||||
if (time_before(hc->keep_tl.expires, jiffies + 5 * HZ) && !hc->shutdown)
|
||||
mod_timer(&hc->keep_tl, jiffies + L1OIP_KEEPALIVE * HZ);
|
||||
else
|
||||
hc->keep_tl.expires = jiffies + L1OIP_KEEPALIVE * HZ;
|
||||
@ -601,7 +601,9 @@ l1oip_socket_parse(struct l1oip *hc, struct sockaddr_in *sin, u8 *buf, int len)
|
||||
goto multiframe;
|
||||
|
||||
/* restart timer */
|
||||
if (time_before(hc->timeout_tl.expires, jiffies + 5 * HZ) || !hc->timeout_on) {
|
||||
if ((time_before(hc->timeout_tl.expires, jiffies + 5 * HZ) ||
|
||||
!hc->timeout_on) &&
|
||||
!hc->shutdown) {
|
||||
hc->timeout_on = 1;
|
||||
mod_timer(&hc->timeout_tl, jiffies + L1OIP_TIMEOUT * HZ);
|
||||
} else /* only adjust timer */
|
||||
@ -1232,11 +1234,10 @@ release_card(struct l1oip *hc)
|
||||
{
|
||||
int ch;
|
||||
|
||||
if (timer_pending(&hc->keep_tl))
|
||||
del_timer(&hc->keep_tl);
|
||||
hc->shutdown = true;
|
||||
|
||||
if (timer_pending(&hc->timeout_tl))
|
||||
del_timer(&hc->timeout_tl);
|
||||
del_timer_sync(&hc->keep_tl);
|
||||
del_timer_sync(&hc->timeout_tl);
|
||||
|
||||
cancel_work_sync(&hc->workq);
|
||||
|
||||
|
||||
@ -632,15 +632,15 @@ static int flexrm_spu_dma_map(struct device *dev, struct brcm_message *msg)
|
||||
|
||||
rc = dma_map_sg(dev, msg->spu.src, sg_nents(msg->spu.src),
|
||||
DMA_TO_DEVICE);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
if (!rc)
|
||||
return -EIO;
|
||||
|
||||
rc = dma_map_sg(dev, msg->spu.dst, sg_nents(msg->spu.dst),
|
||||
DMA_FROM_DEVICE);
|
||||
if (rc < 0) {
|
||||
if (!rc) {
|
||||
dma_unmap_sg(dev, msg->spu.src, sg_nents(msg->spu.src),
|
||||
DMA_TO_DEVICE);
|
||||
return rc;
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
@ -119,27 +119,61 @@ static void __update_writeback_rate(struct cached_dev *dc)
|
||||
dc->writeback_rate_target = target;
|
||||
}
|
||||
|
||||
static bool idle_counter_exceeded(struct cache_set *c)
|
||||
{
|
||||
int counter, dev_nr;
|
||||
|
||||
/*
|
||||
* If c->idle_counter is overflow (idel for really long time),
|
||||
* reset as 0 and not set maximum rate this time for code
|
||||
* simplicity.
|
||||
*/
|
||||
counter = atomic_inc_return(&c->idle_counter);
|
||||
if (counter <= 0) {
|
||||
atomic_set(&c->idle_counter, 0);
|
||||
return false;
|
||||
}
|
||||
|
||||
dev_nr = atomic_read(&c->attached_dev_nr);
|
||||
if (dev_nr == 0)
|
||||
return false;
|
||||
|
||||
/*
|
||||
* c->idle_counter is increased by writeback thread of all
|
||||
* attached backing devices, in order to represent a rough
|
||||
* time period, counter should be divided by dev_nr.
|
||||
* Otherwise the idle time cannot be larger with more backing
|
||||
* device attached.
|
||||
* The following calculation equals to checking
|
||||
* (counter / dev_nr) < (dev_nr * 6)
|
||||
*/
|
||||
if (counter < (dev_nr * dev_nr * 6))
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/*
|
||||
* Idle_counter is increased every time when update_writeback_rate() is
|
||||
* called. If all backing devices attached to the same cache set have
|
||||
* identical dc->writeback_rate_update_seconds values, it is about 6
|
||||
* rounds of update_writeback_rate() on each backing device before
|
||||
* c->at_max_writeback_rate is set to 1, and then max wrteback rate set
|
||||
* to each dc->writeback_rate.rate.
|
||||
* In order to avoid extra locking cost for counting exact dirty cached
|
||||
* devices number, c->attached_dev_nr is used to calculate the idle
|
||||
* throushold. It might be bigger if not all cached device are in write-
|
||||
* back mode, but it still works well with limited extra rounds of
|
||||
* update_writeback_rate().
|
||||
*/
|
||||
static bool set_at_max_writeback_rate(struct cache_set *c,
|
||||
struct cached_dev *dc)
|
||||
{
|
||||
/* Don't set max writeback rate if gc is running */
|
||||
if (!c->gc_mark_valid)
|
||||
return false;
|
||||
/*
|
||||
* Idle_counter is increased everytime when update_writeback_rate() is
|
||||
* called. If all backing devices attached to the same cache set have
|
||||
* identical dc->writeback_rate_update_seconds values, it is about 6
|
||||
* rounds of update_writeback_rate() on each backing device before
|
||||
* c->at_max_writeback_rate is set to 1, and then max wrteback rate set
|
||||
* to each dc->writeback_rate.rate.
|
||||
* In order to avoid extra locking cost for counting exact dirty cached
|
||||
* devices number, c->attached_dev_nr is used to calculate the idle
|
||||
* throushold. It might be bigger if not all cached device are in write-
|
||||
* back mode, but it still works well with limited extra rounds of
|
||||
* update_writeback_rate().
|
||||
*/
|
||||
if (atomic_inc_return(&c->idle_counter) <
|
||||
atomic_read(&c->attached_dev_nr) * 6)
|
||||
|
||||
if (!idle_counter_exceeded(c))
|
||||
return false;
|
||||
|
||||
if (atomic_read(&c->at_max_writeback_rate) != 1)
|
||||
@ -153,13 +187,10 @@ static bool set_at_max_writeback_rate(struct cache_set *c,
|
||||
dc->writeback_rate_change = 0;
|
||||
|
||||
/*
|
||||
* Check c->idle_counter and c->at_max_writeback_rate agagain in case
|
||||
* new I/O arrives during before set_at_max_writeback_rate() returns.
|
||||
* Then the writeback rate is set to 1, and its new value should be
|
||||
* decided via __update_writeback_rate().
|
||||
* In case new I/O arrives during before
|
||||
* set_at_max_writeback_rate() returns.
|
||||
*/
|
||||
if ((atomic_read(&c->idle_counter) <
|
||||
atomic_read(&c->attached_dev_nr) * 6) ||
|
||||
if (!idle_counter_exceeded(c) ||
|
||||
!atomic_read(&c->at_max_writeback_rate))
|
||||
return false;
|
||||
|
||||
|
||||
@ -63,8 +63,8 @@ static void dump_zones(struct mddev *mddev)
|
||||
int len = 0;
|
||||
|
||||
for (k = 0; k < conf->strip_zone[j].nb_dev; k++)
|
||||
len += snprintf(line+len, 200-len, "%s%s", k?"/":"",
|
||||
bdevname(conf->devlist[j*raid_disks
|
||||
len += scnprintf(line+len, 200-len, "%s%s", k?"/":"",
|
||||
bdevname(conf->devlist[j*raid_disks
|
||||
+ k]->bdev, b));
|
||||
pr_debug("md: zone%d=[%s]\n", j, line);
|
||||
|
||||
|
||||
@ -36,6 +36,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/blkdev.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/raid/pq.h>
|
||||
#include <linux/async_tx.h>
|
||||
@ -3728,7 +3729,7 @@ static void handle_stripe_fill(struct stripe_head *sh,
|
||||
* back cache (prexor with orig_page, and then xor with
|
||||
* page) in the read path
|
||||
*/
|
||||
if (s->injournal && s->failed) {
|
||||
if (s->to_read && s->injournal && s->failed) {
|
||||
if (test_bit(STRIPE_R5C_CACHING, &sh->state))
|
||||
r5c_make_stripe_write_out(sh);
|
||||
goto out;
|
||||
@ -6334,7 +6335,18 @@ static void raid5d(struct md_thread *thread)
|
||||
spin_unlock_irq(&conf->device_lock);
|
||||
md_check_recovery(mddev);
|
||||
spin_lock_irq(&conf->device_lock);
|
||||
|
||||
/*
|
||||
* Waiting on MD_SB_CHANGE_PENDING below may deadlock
|
||||
* seeing md_check_recovery() is needed to clear
|
||||
* the flag when using mdmon.
|
||||
*/
|
||||
continue;
|
||||
}
|
||||
|
||||
wait_event_lock_irq(mddev->sb_wait,
|
||||
!test_bit(MD_SB_CHANGE_PENDING, &mddev->sb_flags),
|
||||
conf->device_lock);
|
||||
}
|
||||
pr_debug("%d stripes handled\n", handled);
|
||||
|
||||
|
||||
@ -144,11 +144,10 @@ static int buffer_prepare(struct vb2_buffer *vb)
|
||||
return -EINVAL;
|
||||
vb2_set_plane_payload(vb, 0, size);
|
||||
|
||||
cx88_risc_buffer(dev->pci, &buf->risc, sgt->sgl,
|
||||
0, VBI_LINE_LENGTH * lines,
|
||||
VBI_LINE_LENGTH, 0,
|
||||
lines);
|
||||
return 0;
|
||||
return cx88_risc_buffer(dev->pci, &buf->risc, sgt->sgl,
|
||||
0, VBI_LINE_LENGTH * lines,
|
||||
VBI_LINE_LENGTH, 0,
|
||||
lines);
|
||||
}
|
||||
|
||||
static void buffer_finish(struct vb2_buffer *vb)
|
||||
|
||||
@ -433,6 +433,7 @@ static int queue_setup(struct vb2_queue *q,
|
||||
|
||||
static int buffer_prepare(struct vb2_buffer *vb)
|
||||
{
|
||||
int ret;
|
||||
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
|
||||
struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
|
||||
struct cx88_core *core = dev->core;
|
||||
@ -447,35 +448,35 @@ static int buffer_prepare(struct vb2_buffer *vb)
|
||||
|
||||
switch (core->field) {
|
||||
case V4L2_FIELD_TOP:
|
||||
cx88_risc_buffer(dev->pci, &buf->risc,
|
||||
sgt->sgl, 0, UNSET,
|
||||
buf->bpl, 0, core->height);
|
||||
ret = cx88_risc_buffer(dev->pci, &buf->risc,
|
||||
sgt->sgl, 0, UNSET,
|
||||
buf->bpl, 0, core->height);
|
||||
break;
|
||||
case V4L2_FIELD_BOTTOM:
|
||||
cx88_risc_buffer(dev->pci, &buf->risc,
|
||||
sgt->sgl, UNSET, 0,
|
||||
buf->bpl, 0, core->height);
|
||||
ret = cx88_risc_buffer(dev->pci, &buf->risc,
|
||||
sgt->sgl, UNSET, 0,
|
||||
buf->bpl, 0, core->height);
|
||||
break;
|
||||
case V4L2_FIELD_SEQ_TB:
|
||||
cx88_risc_buffer(dev->pci, &buf->risc,
|
||||
sgt->sgl,
|
||||
0, buf->bpl * (core->height >> 1),
|
||||
buf->bpl, 0,
|
||||
core->height >> 1);
|
||||
ret = cx88_risc_buffer(dev->pci, &buf->risc,
|
||||
sgt->sgl,
|
||||
0, buf->bpl * (core->height >> 1),
|
||||
buf->bpl, 0,
|
||||
core->height >> 1);
|
||||
break;
|
||||
case V4L2_FIELD_SEQ_BT:
|
||||
cx88_risc_buffer(dev->pci, &buf->risc,
|
||||
sgt->sgl,
|
||||
buf->bpl * (core->height >> 1), 0,
|
||||
buf->bpl, 0,
|
||||
core->height >> 1);
|
||||
ret = cx88_risc_buffer(dev->pci, &buf->risc,
|
||||
sgt->sgl,
|
||||
buf->bpl * (core->height >> 1), 0,
|
||||
buf->bpl, 0,
|
||||
core->height >> 1);
|
||||
break;
|
||||
case V4L2_FIELD_INTERLACED:
|
||||
default:
|
||||
cx88_risc_buffer(dev->pci, &buf->risc,
|
||||
sgt->sgl, 0, buf->bpl,
|
||||
buf->bpl, buf->bpl,
|
||||
core->height >> 1);
|
||||
ret = cx88_risc_buffer(dev->pci, &buf->risc,
|
||||
sgt->sgl, 0, buf->bpl,
|
||||
buf->bpl, buf->bpl,
|
||||
core->height >> 1);
|
||||
break;
|
||||
}
|
||||
dprintk(2,
|
||||
@ -483,7 +484,7 @@ static int buffer_prepare(struct vb2_buffer *vb)
|
||||
buf, buf->vb.vb2_buf.index, __func__,
|
||||
core->width, core->height, dev->fmt->depth, dev->fmt->fourcc,
|
||||
(unsigned long)buf->risc.dma);
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void buffer_finish(struct vb2_buffer *vb)
|
||||
|
||||
@ -214,6 +214,7 @@ static int fimc_is_register_subdevs(struct fimc_is *is)
|
||||
|
||||
if (ret < 0 || index >= FIMC_IS_SENSORS_NUM) {
|
||||
of_node_put(child);
|
||||
of_node_put(i2c_bus);
|
||||
return ret;
|
||||
}
|
||||
index++;
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user