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[ARM] 5204/1: Trizeps4 SOM update

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- use MFP-API for GPIO
- support TRIZEPS4WL module
- cleanups

Signed-off-by: Jrgen Schindele <linux@schindele.name>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Jürgen Schindele
2008-08-18 21:45:03 +01:00
committed by Russell King
parent b8e6c91c74
commit 642aa6637e
3 changed files with 422 additions and 245 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
arch/arm/mach-pxa/Kconfig
View File

@ -170,13 +170,41 @@ config MACH_E800
Say Y here if you intend to run this kernel on a Toshiba Say Y here if you intend to run this kernel on a Toshiba
e800 family PDA. e800 family PDA.
config TRIZEPS_PXA
bool "PXA based Keith und Koep Trizeps DIMM-Modules"
config MACH_TRIZEPS4 config MACH_TRIZEPS4
bool "Keith und Koep Trizeps4 DIMM-Module" bool "Keith und Koep Trizeps4 DIMM-Module"
depends on TRIZEPS_PXA
select TRIZEPS_PCMCIA
select PXA27x select PXA27x
config MACH_TRIZEPS4_CONXS config MACH_TRIZEPS4WL
bool "Keith und Koep Trizeps4-WL DIMM-Module"
depends on TRIZEPS_PXA
select TRIZEPS_PCMCIA
select PXA27x
select PXA_SSP
choice
prompt "Select base board for Trizeps module"
depends on TRIZEPS_PXA
config MACH_TRIZEPS_CONXS
bool "ConXS Eval Board" bool "ConXS Eval Board"
depends on MACH_TRIZEPS4
config MACH_TRIZEPS_UCONXS
bool "uConXS Eval Board"
config MACH_TRIZEPS_ANY
bool "another Board"
endchoice
config TRIZEPS_PCMCIA
bool
help
Enable PCMCIA support for Trizeps modules
config MACH_EM_X270 config MACH_EM_X270
bool "CompuLab EM-x270 platform" bool "CompuLab EM-x270 platform"

84
arch/arm/mach-pxa/include/mach/trizeps4.h
View File

@ -17,11 +17,16 @@
#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ #define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */
#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ #define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */
#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board CSFR register */ /* Logic on ConXS-board CSFR register*/
#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) /* Logic chip on ConXS-Board BOCR register */ #define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS)
#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) /* Logic chip on ConXS-Board IRCR register*/ /* Logic on ConXS-board BOCR register*/
#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) /* Logic chip on ConXS-Board UPSR register*/ #define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000)
#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) /* Logic chip on ConXS-Board DICR register*/ /* Logic on ConXS-board IRCR register*/
#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000)
/* Logic on ConXS-board UPSR register*/
#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000)
/* Logic on ConXS-board DICR register*/
#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000)
/* virtual memory regions */ /* virtual memory regions */
#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ #define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */
@ -54,6 +59,15 @@
#define GPIO_MMC_DET 12 #define GPIO_MMC_DET 12
#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) #define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET)
/* DOC NAND chip */
#define GPIO_DOC_LOCK 94
#define GPIO_DOC_IRQ 93
#define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ)
/* SPI interface */
#define GPIO_SPI 53
#define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI)
/* LEDS using tx2 / rx2 */ /* LEDS using tx2 / rx2 */
#define GPIO_SYS_BUSY_LED 46 #define GPIO_SYS_BUSY_LED 46
#define GPIO_HEARTBEAT_LED 47 #define GPIO_HEARTBEAT_LED 47
@ -62,24 +76,66 @@
#define GPIO_PIC 0 #define GPIO_PIC 0
#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) #define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC)
#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) #ifdef CONFIG_MACH_TRIZEPS_CONXS
#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) /* for CONXS base board define these registers */
#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT)
#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS)
#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) #define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT)
#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) #define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS)
#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) #define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT)
#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) #define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS)
#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT)
#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS)
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#define ConXS_CFSR (*((volatile unsigned short *)CFSR_P2V(0x0C000000))) static inline unsigned short CFSR_readw(void)
#define ConXS_BCR (*((volatile unsigned short *)BCR_P2V(0x0E000000))) {
#define ConXS_DCR (*((volatile unsigned short *)DCR_P2V(0x0F800000))) /* [Compact Flash Status Register] is read only */
return *((unsigned short *)CFSR_P2V(0x0C000000));
}
static inline void BCR_writew(unsigned short value)
{
/* [Board Control Regsiter] is write only */
*((unsigned short *)BCR_P2V(0x0E000000)) = value;
}
static inline void DCR_writew(unsigned short value)
{
/* [Display Control Register] is write only */
*((unsigned short *)DCR_P2V(0x0E000000)) = value;
}
static inline void IRCR_writew(unsigned short value)
{
/* [InfraRed data Control Register] is write only */
*((unsigned short *)IRCR_P2V(0x0E000000)) = value;
}
#else #else
#define ConXS_CFSR CFSR_P2V(0x0C000000) #define ConXS_CFSR CFSR_P2V(0x0C000000)
#define ConXS_BCR BCR_P2V(0x0E000000) #define ConXS_BCR BCR_P2V(0x0E000000)
#define ConXS_DCR DCR_P2V(0x0F800000) #define ConXS_DCR DCR_P2V(0x0F800000)
#define ConXS_IRCR IRCR_P2V(0x0F800000)
#endif #endif
#else
/* for whatever baseboard define function registers */
static inline unsigned short CFSR_readw(void)
{
return 0;
}
static inline void BCR_writew(unsigned short value)
{
;
}
static inline void DCR_writew(unsigned short value)
{
;
}
static inline void IRCR_writew(unsigned short value)
{
;
}
#endif /* CONFIG_MACH_TRIZEPS_CONXS */
#define ConXS_CFSR_BVD_MASK 0x0003 #define ConXS_CFSR_BVD_MASK 0x0003
#define ConXS_CFSR_BVD1 (1 << 0) #define ConXS_CFSR_BVD1 (1 << 0)

551
arch/arm/mach-pxa/trizeps4.c
View File

@ -22,8 +22,8 @@
#include <linux/fb.h> #include <linux/fb.h>
#include <linux/ioport.h> #include <linux/ioport.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/serial_8250.h> #include <linux/gpio.h>
#include <linux/mtd/mtd.h> #include <linux/dm9000.h>
#include <linux/mtd/physmap.h> #include <linux/mtd/physmap.h>
#include <linux/mtd/partitions.h> #include <linux/mtd/partitions.h>
@ -31,7 +31,6 @@
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/memory.h> #include <asm/memory.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/sizes.h> #include <asm/sizes.h>
@ -40,41 +39,148 @@
#include <asm/mach/irq.h> #include <asm/mach/irq.h>
#include <asm/mach/flash.h> #include <asm/mach/flash.h>
#include <mach/hardware.h>
#include <mach/pxa-regs.h> #include <mach/pxa-regs.h>
#include <mach/pxa2xx-regs.h> #include <mach/pxa2xx-regs.h>
#include <mach/pxa2xx-gpio.h> #include <mach/mfp-pxa27x.h>
#include <mach/pxa2xx_spi.h>
#include <mach/trizeps4.h> #include <mach/trizeps4.h>
#include <mach/audio.h> #include <mach/audio.h>
#include <mach/pxafb.h> #include <mach/pxafb.h>
#include <mach/mmc.h> #include <mach/mmc.h>
#include <mach/irda.h> #include <mach/irda.h>
#include <mach/ohci.h> #include <mach/ohci.h>
#include <mach/i2c.h>
#include "generic.h" #include "generic.h"
#include "devices.h" #include "devices.h"
/******************************************************************************************** /* comment out the following line if you want to use the
* Standard UART from PXA for serial / irda transmission
* and acivate it if you have status leds connected */
#define STATUS_LEDS_ON_STUART_PINS 1
/*****************************************************************************
* MultiFunctionPins of CPU
*****************************************************************************/
static unsigned long trizeps4_pin_config[] __initdata = {
/* Chip Selects */
GPIO15_nCS_1, /* DiskOnChip CS */
GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */
GPIO94_GPIO, /* DOC lock */
GPIO78_nCS_2, /* DM9000 CS */
GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */
GPIO79_nCS_3, /* Logic CS */
GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */
/* LCD - 16bpp Active TFT */
GPIO58_LCD_LDD_0,
GPIO59_LCD_LDD_1,
GPIO60_LCD_LDD_2,
GPIO61_LCD_LDD_3,
GPIO62_LCD_LDD_4,
GPIO63_LCD_LDD_5,
GPIO64_LCD_LDD_6,
GPIO65_LCD_LDD_7,
GPIO66_LCD_LDD_8,
GPIO67_LCD_LDD_9,
GPIO68_LCD_LDD_10,
GPIO69_LCD_LDD_11,
GPIO70_LCD_LDD_12,
GPIO71_LCD_LDD_13,
GPIO72_LCD_LDD_14,
GPIO73_LCD_LDD_15,
GPIO74_LCD_FCLK,
GPIO75_LCD_LCLK,
GPIO76_LCD_PCLK,
GPIO77_LCD_BIAS,
/* UART */
GPIO9_FFUART_CTS,
GPIO10_FFUART_DCD,
GPIO16_FFUART_TXD,
GPIO33_FFUART_DSR,
GPIO38_FFUART_RI,
GPIO82_FFUART_DTR,
GPIO83_FFUART_RTS,
GPIO96_FFUART_RXD,
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
#ifdef STATUS_LEDS_ON_STUART_PINS
GPIO46_GPIO,
GPIO47_GPIO,
#else
GPIO46_STUART_RXD,
GPIO47_STUART_TXD,
#endif
/* PCMCIA */
GPIO11_GPIO, /* TRIZEPS4_CD_IRQ */
GPIO13_GPIO, /* TRIZEPS4_READY_NINT */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO54_nPCE_2,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
GPIO102_nPCE_1,
GPIO104_PSKTSEL,
/* MultiMediaCard */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO12_GPIO, /* TRIZEPS4_MMC_IRQ */
/* USB OHCI */
GPIO88_USBH1_PWR, /* USBHPWR1 */
GPIO89_USBH1_PEN, /* USBHPEN1 */
/* I2C */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
};
static unsigned long trizeps4wl_pin_config[] __initdata = {
/* SSP 2 */
GPIO14_SSP2_SFRM,
GPIO19_SSP2_SCLK,
GPIO53_GPIO, /* TRIZEPS4_SPI_IRQ */
GPIO86_SSP2_RXD,
GPIO87_SSP2_TXD,
};
/****************************************************************************
* ONBOARD FLASH * ONBOARD FLASH
********************************************************************************************/ ****************************************************************************/
static struct mtd_partition trizeps4_partitions[] = { static struct mtd_partition trizeps4_partitions[] = {
{ {
.name = "Bootloader", .name = "Bootloader",
.offset = 0x00000000, .offset = 0x00000000,
.size = 0x00040000, .size = 0x00040000,
.mask_flags = MTD_WRITEABLE /* force read-only */ .mask_flags = MTD_WRITEABLE /* force read-only */
},{ }, {
.name = "Backup", .name = "Backup",
.offset = 0x00040000, .offset = 0x00040000,
.size = 0x00040000, .size = 0x00040000,
},{ }, {
.name = "Image", .name = "Image",
.offset = 0x00080000, .offset = 0x00080000,
.size = 0x01080000, .size = 0x01080000,
},{ }, {
.name = "IPSM", .name = "IPSM",
.offset = 0x01100000, .offset = 0x01100000,
.size = 0x00e00000, .size = 0x00e00000,
},{ }, {
.name = "Registry", .name = "Registry",
.offset = 0x01f00000, .offset = 0x01f00000,
.size = MTDPART_SIZ_FULL, .size = MTDPART_SIZ_FULL,
@ -105,9 +211,9 @@ static struct platform_device flash_device = {
.num_resources = 1, .num_resources = 1,
}; };
/******************************************************************************************** /****************************************************************************
* DAVICOM DM9000 Ethernet * DAVICOM DM9000 Ethernet
********************************************************************************************/ ****************************************************************************/
static struct resource dm9000_resources[] = { static struct resource dm9000_resources[] = {
[0] = { [0] = {
.start = TRIZEPS4_ETH_PHYS+0x300, .start = TRIZEPS4_ETH_PHYS+0x300,
@ -122,67 +228,68 @@ static struct resource dm9000_resources[] = {
[2] = { [2] = {
.start = TRIZEPS4_ETH_IRQ, .start = TRIZEPS4_ETH_IRQ,
.end = TRIZEPS4_ETH_IRQ, .end = TRIZEPS4_ETH_IRQ,
.flags = (IORESOURCE_IRQ | IRQ_TYPE_EDGE_RISING), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}, },
}; };
static struct dm9000_plat_data tri_dm9000_platdata = {
.flags = DM9000_PLATF_32BITONLY,
};
static struct platform_device dm9000_device = { static struct platform_device dm9000_device = {
.name = "dm9000", .name = "dm9000",
.id = -1, .id = -1,
.num_resources = ARRAY_SIZE(dm9000_resources), .num_resources = ARRAY_SIZE(dm9000_resources),
.resource = dm9000_resources, .resource = dm9000_resources,
.dev = {
.platform_data = &tri_dm9000_platdata,
}
}; };
/******************************************************************************************** /****************************************************************************
* PXA270 serial ports * LED's on GPIO pins of PXA
********************************************************************************************/ ****************************************************************************/
static struct plat_serial8250_port tri_serial_ports[] = { static struct gpio_led trizeps4_led[] = {
#ifdef CONFIG_SERIAL_PXA #ifdef STATUS_LEDS_ON_STUART_PINS
/* this uses the own PXA driver */
{ {
0, .name = "led0:orange:heartbeat", /* */
}, .default_trigger = "heartbeat",
#else .gpio = GPIO_HEARTBEAT_LED,
/* this uses the generic 8520 driver */ .active_low = 1,
[0] = {
.membase = (void *)&FFUART,
.irq = IRQ_FFUART,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM32,
.regshift = 2,
.uartclk = (921600*16),
},
[1] = {
.membase = (void *)&BTUART,
.irq = IRQ_BTUART,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM32,
.regshift = 2,
.uartclk = (921600*16),
}, },
{ {
0, .name = "led1:yellow:cpubusy", /* */
.default_trigger = "cpu-busy",
.gpio = GPIO_SYS_BUSY_LED,
.active_low = 1,
}, },
#endif #endif
}; };
static struct platform_device uart_devices = { static struct gpio_led_platform_data trizeps4_led_data = {
.name = "serial8250", .leds = trizeps4_led,
.id = 0, .num_leds = ARRAY_SIZE(trizeps4_led),
};
static struct platform_device leds_devices = {
.name = "leds-gpio",
.id = -1,
.dev = { .dev = {
.platform_data = tri_serial_ports, .platform_data = &trizeps4_led_data,
}, },
.num_resources = 0,
.resource = NULL,
}; };
static struct platform_device * trizeps4_devices[] __initdata = { static struct platform_device *trizeps4_devices[] __initdata = {
&flash_device, &flash_device,
&uart_devices,
&dm9000_device, &dm9000_device,
&leds_devices,
};
static struct platform_device *trizeps4wl_devices[] __initdata = {
&flash_device,
&leds_devices,
}; };
#ifdef CONFIG_MACH_TRIZEPS4_CONXS
static short trizeps_conxs_bcr; static short trizeps_conxs_bcr;
/* PCCARD power switching supports only 3,3V */ /* PCCARD power switching supports only 3,3V */
@ -192,108 +299,63 @@ void board_pcmcia_power(int power)
/* switch power on, put in reset and enable buffers */ /* switch power on, put in reset and enable buffers */
trizeps_conxs_bcr |= power; trizeps_conxs_bcr |= power;
trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN); trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN;
ConXS_BCR = trizeps_conxs_bcr; BCR_writew(trizeps_conxs_bcr);
/* wait a little */ /* wait a little */
udelay(2000); udelay(2000);
/* take reset away */ /* take reset away */
trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET); trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET;
ConXS_BCR = trizeps_conxs_bcr; BCR_writew(trizeps_conxs_bcr);
udelay(2000); udelay(2000);
} else { } else {
/* put in reset */ /* put in reset */
trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
ConXS_BCR = trizeps_conxs_bcr; BCR_writew(trizeps_conxs_bcr);
udelay(1000); udelay(1000);
/* switch power off */ /* switch power off */
trizeps_conxs_bcr &= ~(0xf); trizeps_conxs_bcr &= ~0xf;
ConXS_BCR = trizeps_conxs_bcr; BCR_writew(trizeps_conxs_bcr);
} }
pr_debug("%s: o%s 0x%x\n", __func__, power ? "n": "ff", trizeps_conxs_bcr); pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff",
trizeps_conxs_bcr);
} }
EXPORT_SYMBOL(board_pcmcia_power);
/* backlight power switching for LCD panel */ /* backlight power switching for LCD panel */
static void board_backlight_power(int on) static void board_backlight_power(int on)
{ {
if (on) { if (on)
trizeps_conxs_bcr |= ConXS_BCR_L_DISP; trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
} else { else
trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP; trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
}
pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", trizeps_conxs_bcr); pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff",
ConXS_BCR = trizeps_conxs_bcr; trizeps_conxs_bcr);
BCR_writew(trizeps_conxs_bcr);
} }
/* Powersupply for MMC/SD cardslot */ /* a I2C based RTC is known on CONXS board */
static void board_mci_power(struct device *dev, unsigned int vdd) static struct i2c_board_info trizeps4_i2c_devices[] __initdata = {
{ { I2C_BOARD_INFO("rtc-pcf8593", 0x51) }
struct pxamci_platform_data* p_d = dev->platform_data; };
if (( 1 << vdd) & p_d->ocr_mask) { /****************************************************************************
pr_debug("%s: on\n", __func__); * MMC card slot external to module
/* FIXME fill in values here */ ****************************************************************************/
} else { static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int,
pr_debug("%s: off\n", __func__); void *data)
/* FIXME fill in values here */
}
}
static short trizeps_conxs_ircr;
/* Switch modes and Power for IRDA receiver */
static void board_irda_mode(struct device *dev, int mode)
{
unsigned long flags;
local_irq_save(flags);
if (mode & IR_SIRMODE) {
/* Slow mode */
trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
} else if (mode & IR_FIRMODE) {
/* Fast mode */
trizeps_conxs_ircr |= ConXS_IRCR_MODE;
}
pxa2xx_transceiver_mode(dev, mode);
if (mode & IR_OFF) {
trizeps_conxs_ircr |= ConXS_IRCR_SD;
} else {
trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
}
/* FIXME write values to register */
local_irq_restore(flags);
}
#else
/* for other baseboards define dummies */
void board_pcmcia_power(int power) {;}
#define board_backlight_power NULL
#define board_mci_power NULL
#define board_irda_mode NULL
#endif /* CONFIG_MACH_TRIZEPS4_CONXS */
EXPORT_SYMBOL(board_pcmcia_power);
static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data)
{ {
int err; int err;
/* setup GPIO for PXA27x MMC controller */
pxa_gpio_mode(GPIO32_MMCCLK_MD);
pxa_gpio_mode(GPIO112_MMCCMD_MD);
pxa_gpio_mode(GPIO92_MMCDAT0_MD);
pxa_gpio_mode(GPIO109_MMCDAT1_MD);
pxa_gpio_mode(GPIO110_MMCDAT2_MD);
pxa_gpio_mode(GPIO111_MMCDAT3_MD);
pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
IRQF_DISABLED | IRQF_TRIGGER_RISING, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_SAMPLE_RANDOM,
"MMC card detect", data); "MMC card detect", data);
if (err) if (err) {
printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request"
"MMC card detect IRQ\n");
return err; return -1;
}
return 0;
} }
static void trizeps4_mci_exit(struct device *dev, void *data) static void trizeps4_mci_exit(struct device *dev, void *data)
@ -303,22 +365,68 @@ static void trizeps4_mci_exit(struct device *dev, void *data)
static struct pxamci_platform_data trizeps4_mci_platform_data = { static struct pxamci_platform_data trizeps4_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.detect_delay = 1,
.init = trizeps4_mci_init, .init = trizeps4_mci_init,
.exit = trizeps4_mci_exit, .exit = trizeps4_mci_exit,
.setpower = board_mci_power, .get_ro = NULL, /* write-protection not supported */
.setpower = NULL, /* power-switching not supported */
}; };
/****************************************************************************
* IRDA mode switching on stuart
****************************************************************************/
#ifndef STATUS_LEDS_ON_STUART_PINS
static short trizeps_conxs_ircr;
static int trizeps4_irda_startup(struct device *dev)
{
trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
IRCR_writew(trizeps_conxs_ircr);
return 0;
}
static void trizeps4_irda_shutdown(struct device *dev)
{
trizeps_conxs_ircr |= ConXS_IRCR_SD;
IRCR_writew(trizeps_conxs_ircr);
}
static void trizeps4_irda_transceiver_mode(struct device *dev, int mode)
{
unsigned long flags;
local_irq_save(flags);
/* Switch mode */
if (mode & IR_SIRMODE)
trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */
else if (mode & IR_FIRMODE) {
trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */
/* Switch power */
if (mode & IR_OFF)
trizeps_conxs_ircr |= ConXS_IRCR_SD;
else
trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
IRCR_writew(trizeps_conxs_ircr);
local_irq_restore(flags);
pxa2xx_transceiver_mode(dev, mode);
}
static struct pxaficp_platform_data trizeps4_ficp_platform_data = { static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
.transceiver_mode = board_irda_mode, .transceiver_mode = trizeps4_irda_transceiver_mode,
.startup = trizeps4_irda_startup,
.shutdown = trizeps4_irda_shutdown,
}; };
#endif
/****************************************************************************
* OHCI USB port
****************************************************************************/
static int trizeps4_ohci_init(struct device *dev) static int trizeps4_ohci_init(struct device *dev)
{ {
/* setup Port1 GPIO pin. */
pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
/* Set the Power Control Polarity Low and Power Sense /* Set the Power Control Polarity Low and Power Sense
Polarity Low to active low. */ Polarity Low to active low. */
UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
@ -327,15 +435,9 @@ static int trizeps4_ohci_init(struct device *dev)
return 0; return 0;
} }
static void trizeps4_ohci_exit(struct device *dev)
{
;
}
static struct pxaohci_platform_data trizeps4_ohci_platform_data = { static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
.port_mode = PMM_PERPORT_MODE, .port_mode = PMM_PERPORT_MODE,
.init = trizeps4_ohci_init, .init = trizeps4_ohci_init,
.exit = trizeps4_ohci_exit,
}; };
static struct map_desc trizeps4_io_desc[] __initdata = { static struct map_desc trizeps4_io_desc[] __initdata = {
@ -372,105 +474,80 @@ static struct map_desc trizeps4_io_desc[] __initdata = {
}; };
static struct pxafb_mode_info sharp_lcd_mode = { static struct pxafb_mode_info sharp_lcd_mode = {
.pixclock = 78000, .pixclock = 78000,
.xres = 640, .xres = 640,
.yres = 480, .yres = 480,
.bpp = 8, .bpp = 8,
.hsync_len = 4, .hsync_len = 4,
.left_margin = 4, .left_margin = 4,
.right_margin = 4, .right_margin = 4,
.vsync_len = 2, .vsync_len = 2,
.upper_margin = 0, .upper_margin = 0,
.lower_margin = 0, .lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.cmap_greyscale = 0, .cmap_greyscale = 0,
}; };
static struct pxafb_mach_info sharp_lcd = { static struct pxafb_mach_info sharp_lcd = {
.modes = &sharp_lcd_mode, .modes = &sharp_lcd_mode,
.num_modes = 1, .num_modes = 1,
.cmap_inverse = 0, .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL,
.cmap_static = 0, .cmap_inverse = 0,
.lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual, .cmap_static = 0,
.lccr3 = 0x0340ff02, .pxafb_backlight_power = board_backlight_power,
.pxafb_backlight_power = board_backlight_power,
}; };
static struct pxafb_mode_info toshiba_lcd_mode = { static struct pxafb_mode_info toshiba_lcd_mode = {
.pixclock = 39720, .pixclock = 39720,
.xres = 640, .xres = 640,
.yres = 480, .yres = 480,
.bpp = 8, .bpp = 8,
.hsync_len = 63, .hsync_len = 63,
.left_margin = 12, .left_margin = 12,
.right_margin = 12, .right_margin = 12,
.vsync_len = 4, .vsync_len = 4,
.upper_margin = 32, .upper_margin = 32,
.lower_margin = 10, .lower_margin = 10,
.sync = 0, .sync = 0,
.cmap_greyscale = 0, .cmap_greyscale = 0,
}; };
static struct pxafb_mach_info toshiba_lcd = { static struct pxafb_mach_info toshiba_lcd = {
.modes = &toshiba_lcd_mode, .modes = &toshiba_lcd_mode,
.num_modes = 1, .num_modes = 1,
.cmap_inverse = 0, .lcd_conn = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL),
.cmap_static = 0, .cmap_inverse = 0,
.lccr0 = LCCR0_Color | LCCR0_Act, .cmap_static = 0,
.lccr3 = 0x03400002, .pxafb_backlight_power = board_backlight_power,
.pxafb_backlight_power = board_backlight_power,
}; };
static void __init trizeps4_init(void) static void __init trizeps4_init(void)
{ {
platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices)); pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4_pin_config));
if (machine_is_trizeps4wl()) {
pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4wl_pin_config));
platform_add_devices(trizeps4wl_devices,
ARRAY_SIZE(trizeps4wl_devices));
} else {
platform_add_devices(trizeps4_devices,
ARRAY_SIZE(trizeps4_devices));
}
/* set_pxa_fb_info(&sharp_lcd); */ if (0) /* dont know how to determine LCD */
set_pxa_fb_info(&toshiba_lcd); set_pxa_fb_info(&sharp_lcd);
else
set_pxa_fb_info(&toshiba_lcd);
pxa_set_mci_info(&trizeps4_mci_platform_data); pxa_set_mci_info(&trizeps4_mci_platform_data);
#ifndef STATUS_LEDS_ON_STUART_PINS
pxa_set_ficp_info(&trizeps4_ficp_platform_data); pxa_set_ficp_info(&trizeps4_ficp_platform_data);
#endif
pxa_set_ohci_info(&trizeps4_ohci_platform_data); pxa_set_ohci_info(&trizeps4_ohci_platform_data);
pxa_set_ac97_info(NULL); pxa_set_ac97_info(NULL);
} pxa_set_i2c_info(NULL);
i2c_register_board_info(0, trizeps4_i2c_devices,
ARRAY_SIZE(trizeps4_i2c_devices));
static void __init trizeps4_map_io(void)
{
pxa_map_io();
iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
/* for DiskOnChip */
pxa_gpio_mode(GPIO15_nCS_1_MD);
/* for off-module PIC on ConXS board */
pxa_gpio_mode(GPIO_PIC | GPIO_IN);
/* UCB1400 irq */
pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
/* for DM9000 LAN */
pxa_gpio_mode(GPIO78_nCS_2_MD);
pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
/* for PCMCIA device */
pxa_gpio_mode(GPIO_PCD | GPIO_IN);
pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
/* for I2C adapter */
pxa_gpio_mode(GPIO117_I2CSCL_MD);
pxa_gpio_mode(GPIO118_I2CSDA_MD);
/* MMC_DET s.o. */
pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
/* whats that for ??? */
pxa_gpio_mode(GPIO79_nCS_3_MD);
#ifdef CONFIG_LEDS
pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
#endif
#ifdef CONFIG_MACH_TRIZEPS4_CONXS
#ifdef CONFIG_IDE_PXA_CF #ifdef CONFIG_IDE_PXA_CF
/* if boot direct from compact flash dont disable power */ /* if boot direct from compact flash dont disable power */
trizeps_conxs_bcr = 0x0009; trizeps_conxs_bcr = 0x0009;
@ -478,18 +555,24 @@ static void __init trizeps4_map_io(void)
/* this is the reset value */ /* this is the reset value */
trizeps_conxs_bcr = 0x00A0; trizeps_conxs_bcr = 0x00A0;
#endif #endif
ConXS_BCR = trizeps_conxs_bcr; BCR_writew(trizeps_conxs_bcr);
#endif board_backlight_power(1);
}
#warning FIXME - accessing PM registers directly is deprecated static void __init trizeps4_map_io(void)
PWER = 0x00000002; {
PFER = 0x00000000; pxa_map_io();
PRER = 0x00000002; iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
PGSR0 = 0x0158C000;
PGSR1 = 0x00FF0080; if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) {
PGSR2 = 0x0001C004; /* if flash is 16 bit wide its a Trizeps4 WL */
/* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ __machine_arch_type = MACH_TYPE_TRIZEPS4WL;
PCFR |= PCFR_OPDE; trizeps4_flash_data[0].width = 2;
} else {
/* if flash is 32 bit wide its a Trizeps4 */
__machine_arch_type = MACH_TYPE_TRIZEPS4;
trizeps4_flash_data[0].width = 4;
}
} }
MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
@ -503,3 +586,13 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
.timer = &pxa_timer, .timer = &pxa_timer,
MACHINE_END MACHINE_END
MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
/* MAINTAINER("Jürgen Schindele") */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
.init_machine = trizeps4_init,
.map_io = trizeps4_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
MACHINE_END