[PATCH] sky2: use device iomem to access PCI config
To avoid problems with PCI config access without ACPI (or busted ACPI tables), use the device's window into PCI config space. I know this probably will upset the purists, but I would rather have users than ACPI testers. It also generates less code. Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
This commit is contained in:
Stephen Hemminger
Francois Romieu
parent
9a6d343188
commit
56a645cc1b
@ -195,11 +195,11 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
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pr_debug("sky2_set_power_state %d\n", state);
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sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
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pci_read_config_word(hw->pdev, hw->pm_cap + PCI_PM_PMC, &power_control);
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power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_PMC);
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vaux = (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL) &&
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(power_control & PCI_PM_CAP_PME_D3cold);
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pci_read_config_word(hw->pdev, hw->pm_cap + PCI_PM_CTRL, &power_control);
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power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_CTRL);
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power_control |= PCI_PM_CTRL_PME_STATUS;
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power_control &= ~(PCI_PM_CTRL_STATE_MASK);
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@ -223,7 +223,7 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
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sky2_write8(hw, B2_Y2_CLK_GATE, 0);
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/* Turn off phy power saving */
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pci_read_config_dword(hw->pdev, PCI_DEV_REG1, ®1);
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reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
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reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
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/* looks like this XL is back asswards .. */
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@ -234,26 +234,26 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
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}
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if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
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pci_write_config_dword(hw->pdev, PCI_DEV_REG3, 0);
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pci_read_config_dword(hw->pdev, PCI_DEV_REG4, ®1);
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sky2_pci_write32(hw, PCI_DEV_REG3, 0);
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reg1 = sky2_pci_read32(hw, PCI_DEV_REG4);
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reg1 &= P_ASPM_CONTROL_MSK;
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pci_write_config_dword(hw->pdev, PCI_DEV_REG4, reg1);
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pci_write_config_dword(hw->pdev, PCI_DEV_REG5, 0);
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sky2_pci_write32(hw, PCI_DEV_REG4, reg1);
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sky2_pci_write32(hw, PCI_DEV_REG5, 0);
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}
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pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1);
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sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
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break;
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case PCI_D3hot:
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case PCI_D3cold:
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/* Turn on phy power saving */
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pci_read_config_dword(hw->pdev, PCI_DEV_REG1, ®1);
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reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
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if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
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reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
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else
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reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
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pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1);
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sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
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if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
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sky2_write8(hw, B2_Y2_CLK_GATE, 0);
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@ -275,7 +275,7 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
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ret = -1;
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}
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pci_write_config_byte(hw->pdev, hw->pm_cap + PCI_PM_CTRL, power_control);
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sky2_pci_write16(hw, hw->pm_cap + PCI_PM_CTRL, power_control);
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sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
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return ret;
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}
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@ -2059,13 +2059,13 @@ static void sky2_hw_intr(struct sky2_hw *hw)
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if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
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u16 pci_err;
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pci_read_config_word(hw->pdev, PCI_STATUS, &pci_err);
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pci_err = sky2_pci_read16(hw, PCI_STATUS);
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if (net_ratelimit())
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printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n",
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pci_name(hw->pdev), pci_err);
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sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
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pci_write_config_word(hw->pdev, PCI_STATUS,
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sky2_pci_write16(hw, PCI_STATUS,
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pci_err | PCI_STATUS_ERROR_BITS);
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sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
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}
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@ -2074,7 +2074,7 @@ static void sky2_hw_intr(struct sky2_hw *hw)
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/* PCI-Express uncorrectable Error occurred */
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u32 pex_err;
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pci_read_config_dword(hw->pdev, PEX_UNC_ERR_STAT, &pex_err);
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pex_err = sky2_pci_read32(hw, PEX_UNC_ERR_STAT);
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if (net_ratelimit())
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printk(KERN_ERR PFX "%s: pci express error (0x%x)\n",
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@ -2082,7 +2082,7 @@ static void sky2_hw_intr(struct sky2_hw *hw)
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/* clear the interrupt */
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sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
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pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT,
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sky2_pci_write32(hw, PEX_UNC_ERR_STAT,
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0xffffffffUL);
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sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
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@ -2212,7 +2212,7 @@ static int sky2_reset(struct sky2_hw *hw)
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{
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u16 status;
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u8 t8, pmd_type;
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int i, err;
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int i;
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sky2_write8(hw, B0_CTST, CS_RST_CLR);
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@ -2234,25 +2234,18 @@ static int sky2_reset(struct sky2_hw *hw)
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sky2_write8(hw, B0_CTST, CS_RST_CLR);
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/* clear PCI errors, if any */
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err = pci_read_config_word(hw->pdev, PCI_STATUS, &status);
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if (err)
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goto pci_err;
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status = sky2_pci_read16(hw, PCI_STATUS);
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sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
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err = pci_write_config_word(hw->pdev, PCI_STATUS,
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status | PCI_STATUS_ERROR_BITS);
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if (err)
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goto pci_err;
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sky2_pci_write16(hw, PCI_STATUS, status | PCI_STATUS_ERROR_BITS);
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sky2_write8(hw, B0_CTST, CS_MRST_CLR);
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/* clear any PEX errors */
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if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP)) {
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err = pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT,
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0xffffffffUL);
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if (err)
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goto pci_err;
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}
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if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
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sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL);
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pmd_type = sky2_read8(hw, B2_PMD_TYP);
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hw->copper = !(pmd_type == 'L' || pmd_type == 'S');
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@ -2362,14 +2355,6 @@ static int sky2_reset(struct sky2_hw *hw)
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sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
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return 0;
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pci_err:
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/* This is to catch a BIOS bug workaround where
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* mmconfig table doesn't have other buses.
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*/
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printk(KERN_ERR PFX "%s: can't access PCI config space\n",
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pci_name(hw->pdev));
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return err;
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}
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static u32 sky2_supported_modes(const struct sky2_hw *hw)
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@ -3239,17 +3224,6 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
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}
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}
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#ifdef __BIG_ENDIAN
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/* byte swap descriptors in hardware */
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{
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u32 reg;
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pci_read_config_dword(pdev, PCI_DEV_REG2, ®);
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reg |= PCI_REV_DESC;
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pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
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}
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#endif
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err = -ENOMEM;
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hw = kzalloc(sizeof(*hw), GFP_KERNEL);
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if (!hw) {
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@ -3268,6 +3242,17 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
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}
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hw->pm_cap = pm_cap;
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#ifdef __BIG_ENDIAN
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/* byte swap descriptors in hardware */
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{
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u32 reg;
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reg = sky2_pci_read32(hw, PCI_DEV_REG2);
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reg |= PCI_REV_DESC;
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sky2_pci_write32(hw, PCI_DEV_REG2, reg);
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}
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#endif
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/* ring for status responses */
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hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES,
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&hw->st_dma);
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@ -1951,4 +1951,25 @@ static inline void gma_set_addr(struct sky2_hw *hw, unsigned port, unsigned reg,
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gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8));
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gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8));
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}
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/* PCI config space access */
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static inline u32 sky2_pci_read32(const struct sky2_hw *hw, unsigned reg)
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{
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return sky2_read32(hw, Y2_CFG_SPC + reg);
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}
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static inline u16 sky2_pci_read16(const struct sky2_hw *hw, unsigned reg)
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{
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return sky2_read16(hw, Y2_CFG_SPC + reg);
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}
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static inline void sky2_pci_write32(struct sky2_hw *hw, unsigned reg, u32 val)
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{
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sky2_write32(hw, Y2_CFG_SPC + reg, val);
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}
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static inline void sky2_pci_write16(struct sky2_hw *hw, unsigned reg, u16 val)
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{
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sky2_write16(hw, Y2_CFG_SPC + reg, val);
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}
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#endif
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