net: dsa: mv88e6xxx: Abstract supported PTP filters
The 6165 only supports layer L2 PTP, where as the more modern devices also support UDP and UDPv6, i.e. L4. Abstract the supported receive filters. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -503,6 +503,7 @@ struct mv88e6xxx_ptp_ops {
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int arr0_sts_reg;
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int arr1_sts_reg;
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int dep_sts_reg;
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u32 rx_filters;
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};
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#define STATS_TYPE_PORT BIT(0)
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@ -61,7 +61,11 @@ static int mv88e6xxx_ptp_write(struct mv88e6xxx_chip *chip, int addr,
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int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,
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struct ethtool_ts_info *info)
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{
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struct mv88e6xxx_chip *chip = ds->priv;
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const struct mv88e6xxx_ptp_ops *ptp_ops;
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struct mv88e6xxx_chip *chip;
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chip = ds->priv;
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ptp_ops = chip->info->ops->ptp_ops;
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if (!chip->info->ptp_support)
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return -EOPNOTSUPP;
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@ -74,17 +78,7 @@ int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,
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info->tx_types =
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(1 << HWTSTAMP_TX_OFF) |
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(1 << HWTSTAMP_TX_ON);
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info->rx_filters =
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(1 << HWTSTAMP_FILTER_NONE) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
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(1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
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(1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
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(1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
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info->rx_filters = ptp_ops->rx_filters;
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return 0;
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}
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@ -119,6 +113,14 @@ static int mv88e6xxx_set_hwtstamp_config(struct mv88e6xxx_chip *chip, int port,
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/* The switch supports timestamping both L2 and L4; one cannot be
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* disabled independently of the other.
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*/
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if (!(BIT(config->rx_filter) & ptp_ops->rx_filters)) {
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config->rx_filter = HWTSTAMP_FILTER_NONE;
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dev_dbg(chip->dev, "Unsupported rx_filter %d\n",
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config->rx_filter);
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return -ERANGE;
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}
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switch (config->rx_filter) {
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case HWTSTAMP_FILTER_NONE:
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tstamp_enable = false;
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@ -325,6 +325,16 @@ const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops = {
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.arr0_sts_reg = MV88E6XXX_PORT_PTP_ARR0_STS,
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.arr1_sts_reg = MV88E6XXX_PORT_PTP_ARR1_STS,
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.dep_sts_reg = MV88E6XXX_PORT_PTP_DEP_STS,
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.rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
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(1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
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(1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
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(1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
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(1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ),
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};
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const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops = {
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