Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (85 commits) Blackfin char driver for Blackfin on-chip OTP memory (v3) Blackfin Serial Driver: fix bug - use mod_timer to replace only add_timer. Blackfin Serial Driver: the uart break anomaly has been given its own number, so switch to it Blackfin Serial Driver: use BFIN_UART_NR_PORTS to help SIR driver in uart port. Blackfin Serial Driver: Fix bug - kernel hangs when accessing uart 0 on bf537 when booting u-boot and linux on uart 1 Blackfin Serial Driver: punt unused lsr variable Blackfin Serial Driver: Enable IR function when user application (irattach /dev/ttyBFx -s) call TIOCSETD ioctl with line discipline N_IRDA [Blackfin] arch: add include/boot .gitignore files [Blackfin] arch: Functional power management support: Add support for cpu frequency scaling [Blackfin] arch: Functional power management support: Remove broken cpu frequency scaling drivers [Blackfin] arch: Equalize include files: Add PLL_DIV Masks [Blackfin] arch: Add a warning about the value of CLKIN. [Blackfin] arch: take DDR DEVWD into consideration as well for BF548 [Blackfin] arch: Remove the circular buffering mechanism for exceptions [Blackfin] arch: lose unnecessary dependency on CONFIG_BFIN_ICACHE for MPU [Blackfin] arch: fix bug - before assign new channel to the map register, need clear the bits first. [Blackfin] arch: add Blackfin on-chip SIR IrDA driver support [Blackfin] arch: BF54x memsizes are in mbits, not mbytes [Blackfin] arch: try to remove condition that causes double fault, by checking current before it gets dereferenced [Blackfin] arch: Update anomaly list. ...
This commit is contained in:
Linus Torvalds
commit
346ad4b7fe
@ -47,10 +47,6 @@ config GENERIC_IRQ_PROBE
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bool
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default y
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config GENERIC_TIME
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bool
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default n
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config GENERIC_GPIO
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bool
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default y
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@ -224,16 +220,6 @@ config BF54x
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depends on (BF542 || BF544 || BF547 || BF548 || BF549)
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default y
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config BFIN_DUAL_CORE
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bool
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depends on (BF561)
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default y
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config BFIN_SINGLE_CORE
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bool
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depends on !BFIN_DUAL_CORE
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default y
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config MEM_GENERIC_BOARD
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bool
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depends on GENERIC_BOARD
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@ -263,7 +249,7 @@ config MEM_MT48LC8M32B2B5_7
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config MEM_MT48LC32M16A2TG_75
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bool
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depends on (BFIN527_EZKIT)
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depends on (BFIN527_EZKIT || BFIN532_IP0X)
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default y
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source "arch/blackfin/mach-bf527/Kconfig"
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@ -286,17 +272,34 @@ config CMDLINE
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to the kernel, you may specify one here. As a minimum, you should specify
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the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
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config BOOT_LOAD
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hex "Kernel load address for booting"
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default "0x1000"
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range 0x1000 0x20000000
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help
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This option allows you to set the load address of the kernel.
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This can be useful if you are on a board which has a small amount
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of memory or you wish to reserve some memory at the beginning of
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the address space.
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Note that you need to keep this value above 4k (0x1000) as this
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memory region is used to capture NULL pointer references as well
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as some core kernel functions.
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comment "Clock/PLL Setup"
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config CLKIN_HZ
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int "Crystal Frequency in Hz"
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int "Frequency of the crystal on the board in Hz"
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default "11059200" if BFIN533_STAMP
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default "27000000" if BFIN533_EZKIT
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default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS)
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default "30000000" if BFIN561_EZKIT
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default "24576000" if PNAV10
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default "10000000" if BFIN532_IP0X
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help
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The frequency of CLKIN crystal oscillator on the board in Hz.
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Warning: This value should match the crystal on the board. Otherwise,
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peripherals won't work properly.
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config BFIN_KERNEL_CLOCK
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bool "Re-program Clocks while Kernel boots?"
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@ -307,6 +310,25 @@ config BFIN_KERNEL_CLOCK
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are also not changed, and the Bootloader does 100% of the hardware
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configuration.
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config MEM_SIZE
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int "SDRAM Memory Size in MBytes"
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depends on BFIN_KERNEL_CLOCK
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default 64
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config MEM_ADD_WIDTH
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int "Memory Address Width"
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depends on BFIN_KERNEL_CLOCK
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depends on (!BF54x)
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range 8 11
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default 9 if BFIN533_EZKIT
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default 9 if BFIN561_EZKIT
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default 9 if H8606_HVSISTEMAS
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default 10 if BFIN527_EZKIT
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default 10 if BFIN537_STAMP
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default 11 if BFIN533_STAMP
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default 10 if PNAV10
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default 10 if BFIN532_IP0X
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config PLL_BYPASS
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bool "Bypass PLL"
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depends on BFIN_KERNEL_CLOCK
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@ -325,7 +347,7 @@ config VCO_MULT
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range 1 64
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default "22" if BFIN533_EZKIT
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default "45" if BFIN533_STAMP
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default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT)
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default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM)
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default "22" if BFIN533_BLUETECHNIX_CM
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default "20" if BFIN537_BLUETECHNIX_CM
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default "20" if BFIN561_BLUETECHNIX_CM
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@ -360,19 +382,33 @@ config SCLK_DIV
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int "System Clock Divider"
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depends on BFIN_KERNEL_CLOCK
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range 1 15
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default 5 if BFIN533_EZKIT
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default 5 if BFIN533_STAMP
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default 4 if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT)
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default 5 if BFIN533_BLUETECHNIX_CM
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default 4 if BFIN537_BLUETECHNIX_CM
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default 4 if BFIN561_BLUETECHNIX_CM
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default 5 if BFIN561_EZKIT
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default 3 if H8606_HVSISTEMAS
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default 5
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help
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This sets the frequency of the system clock (including SDRAM or DDR).
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This can be between 1 and 15
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System Clock = (PLL frequency) / (this setting)
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config MAX_MEM_SIZE
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int "Max SDRAM Memory Size in MBytes"
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depends on !BFIN_KERNEL_CLOCK && !MPU
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default 512
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help
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This is the max memory size that the kernel will create CPLB
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tables for. Your system will not be able to handle any more.
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choice
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prompt "DDR SDRAM Chip Type"
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depends on BFIN_KERNEL_CLOCK
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depends on BF54x
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default MEM_MT46V32M16_5B
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config MEM_MT46V32M16_6T
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bool "MT46V32M16_6T"
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config MEM_MT46V32M16_5B
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bool "MT46V32M16_5B"
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endchoice
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#
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# Max & Min Speeds for various Chips
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#
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@ -415,42 +451,33 @@ comment "Kernel Timer/Scheduler"
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source kernel/Kconfig.hz
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config GENERIC_TIME
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bool "Generic time"
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default y
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config GENERIC_CLOCKEVENTS
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bool "Generic clock events"
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depends on GENERIC_TIME
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default y
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config CYCLES_CLOCKSOURCE
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bool "Use 'CYCLES' as a clocksource (EXPERIMENTAL)"
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depends on EXPERIMENTAL
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depends on GENERIC_CLOCKEVENTS
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depends on !BFIN_SCRATCH_REG_CYCLES
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default n
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help
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If you say Y here, you will enable support for using the 'cycles'
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registers as a clock source. Doing so means you will be unable to
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safely write to the 'cycles' register during runtime. You will
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still be able to read it (such as for performance monitoring), but
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writing the registers will most likely crash the kernel.
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source kernel/time/Kconfig
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comment "Memory Setup"
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config MEM_SIZE
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int "SDRAM Memory Size in MBytes"
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default 32 if BFIN533_EZKIT
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default 64 if BFIN527_EZKIT
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default 64 if BFIN537_STAMP
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default 64 if BFIN548_EZKIT
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default 64 if BFIN561_EZKIT
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default 128 if BFIN533_STAMP
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default 64 if PNAV10
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default 32 if H8606_HVSISTEMAS
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config MEM_ADD_WIDTH
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int "SDRAM Memory Address Width"
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depends on (!BF54x)
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default 9 if BFIN533_EZKIT
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default 9 if BFIN561_EZKIT
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default 9 if H8606_HVSISTEMAS
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default 10 if BFIN527_EZKIT
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default 10 if BFIN537_STAMP
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default 11 if BFIN533_STAMP
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default 10 if PNAV10
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choice
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prompt "DDR SDRAM Chip Type"
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depends on BFIN548_EZKIT
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default MEM_MT46V32M16_5B
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config MEM_MT46V32M16_6T
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bool "MT46V32M16_6T"
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config MEM_MT46V32M16_5B
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bool "MT46V32M16_5B"
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endchoice
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comment "Misc"
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config ENET_FLASH_PIN
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int "PF port/pin used for flash and ethernet sharing"
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@ -462,20 +489,6 @@ config ENET_FLASH_PIN
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code.
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For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
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config BOOT_LOAD
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hex "Kernel load address for booting"
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default "0x1000"
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range 0x1000 0x20000000
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help
|
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This option allows you to set the load address of the kernel.
|
||||
This can be useful if you are on a board which has a small amount
|
||||
of memory or you wish to reserve some memory at the beginning of
|
||||
the address space.
|
||||
|
||||
Note that you need to keep this value above 4k (0x1000) as this
|
||||
memory region is used to capture NULL pointer references as well
|
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as some core kernel functions.
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choice
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prompt "Blackfin Exception Scratch Register"
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default BFIN_SCRATCH_REG_RETN
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@ -661,14 +674,6 @@ endchoice
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source "mm/Kconfig"
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config LARGE_ALLOCS
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bool "Allow allocating large blocks (> 1MB) of memory"
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help
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Allow the slab memory allocator to keep chains for very large
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memory sizes - upto 32MB. You may need this if your system has
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a lot of RAM, and you need to able to allocate very large
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contiguous chunks. If unsure, say N.
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config BFIN_GPTIMERS
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tristate "Enable Blackfin General Purpose Timers API"
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default n
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@ -72,6 +72,11 @@ rev-$(CONFIG_BF_REV_ANY) := any
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KBUILD_CFLAGS += -mcpu=$(cpu-y)-$(rev-y)
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KBUILD_AFLAGS += -mcpu=$(cpu-y)-$(rev-y)
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# - we utilize the silicon rev from the toolchain, so move it over to the checkflags
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# - the l1_text attribute is Blackfin specific, so fake it out as used to kill warnings
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CHECKFLAGS_SILICON = $(shell echo "" | $(CPP) $(KBUILD_CFLAGS) -dD - 2>/dev/null | awk '$$2 == "__SILICON_REVISION__" { print $$3 }')
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CHECKFLAGS += -D__SILICON_REVISION__=$(CHECKFLAGS_SILICON) -Dl1_text=__used__
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head-y := arch/$(ARCH)/mach-$(MACHINE)/head.o arch/$(ARCH)/kernel/init_task.o
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core-y += arch/$(ARCH)/kernel/ arch/$(ARCH)/mm/ arch/$(ARCH)/mach-common/
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1
arch/blackfin/boot/.gitignore
vendored
Normal file
1
arch/blackfin/boot/.gitignore
vendored
Normal file
@ -0,0 +1 @@
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+vmImage
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@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
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CONFIG_GENERIC_HWEIGHT=y
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CONFIG_GENERIC_HARDIRQS=y
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CONFIG_GENERIC_IRQ_PROBE=y
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# CONFIG_GENERIC_TIME is not set
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CONFIG_GENERIC_TIME=y
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CONFIG_GENERIC_GPIO=y
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CONFIG_FORCE_MAX_ZONEORDER=14
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CONFIG_GENERIC_CALIBRATE_DELAY=y
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@ -250,7 +250,7 @@ CONFIG_HZ=250
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#
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# Memory Setup
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#
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CONFIG_MEM_SIZE=64
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CONFIG_MAX_MEM_SIZE=512
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CONFIG_MEM_ADD_WIDTH=10
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CONFIG_BOOT_LOAD=0x1000
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CONFIG_BFIN_SCRATCH_REG_RETN=y
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@ -720,8 +720,8 @@ CONFIG_BFIN_OTP=y
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#
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CONFIG_SERIAL_BFIN=y
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CONFIG_SERIAL_BFIN_CONSOLE=y
|
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# CONFIG_SERIAL_BFIN_DMA is not set
|
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CONFIG_SERIAL_BFIN_PIO=y
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CONFIG_SERIAL_BFIN_DMA=y
|
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# CONFIG_SERIAL_BFIN_PIO is not set
|
||||
# CONFIG_SERIAL_BFIN_UART0 is not set
|
||||
CONFIG_SERIAL_BFIN_UART1=y
|
||||
# CONFIG_BFIN_UART1_CTSRTS is not set
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||||
|
||||
@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
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||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
# CONFIG_GENERIC_TIME is not set
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
@ -212,7 +212,7 @@ CONFIG_HZ=250
|
||||
#
|
||||
# Memory Setup
|
||||
#
|
||||
CONFIG_MEM_SIZE=32
|
||||
CONFIG_MAX_MEM_SIZE=512
|
||||
CONFIG_MEM_ADD_WIDTH=9
|
||||
CONFIG_BOOT_LOAD=0x1000
|
||||
CONFIG_BFIN_SCRATCH_REG_RETN=y
|
||||
|
||||
@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
# CONFIG_GENERIC_TIME is not set
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
@ -212,7 +212,7 @@ CONFIG_HZ=250
|
||||
#
|
||||
# Memory Setup
|
||||
#
|
||||
CONFIG_MEM_SIZE=128
|
||||
CONFIG_MAX_MEM_SIZE=512
|
||||
CONFIG_MEM_ADD_WIDTH=11
|
||||
CONFIG_ENET_FLASH_PIN=0
|
||||
CONFIG_BOOT_LOAD=0x1000
|
||||
|
||||
@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
# CONFIG_GENERIC_TIME is not set
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
@ -220,7 +220,7 @@ CONFIG_HZ=250
|
||||
#
|
||||
# Memory Setup
|
||||
#
|
||||
CONFIG_MEM_SIZE=64
|
||||
CONFIG_MAX_MEM_SIZE=512
|
||||
CONFIG_MEM_ADD_WIDTH=10
|
||||
CONFIG_BOOT_LOAD=0x1000
|
||||
CONFIG_BFIN_SCRATCH_REG_RETN=y
|
||||
|
||||
@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
# CONFIG_GENERIC_TIME is not set
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
@ -285,7 +285,7 @@ CONFIG_HZ=250
|
||||
#
|
||||
# Memory Setup
|
||||
#
|
||||
CONFIG_MEM_SIZE=64
|
||||
CONFIG_MAX_MEM_SIZE=512
|
||||
# CONFIG_MEM_MT46V32M16_6T is not set
|
||||
CONFIG_MEM_MT46V32M16_5B=y
|
||||
CONFIG_BOOT_LOAD=0x1000
|
||||
@ -813,8 +813,8 @@ CONFIG_HW_CONSOLE=y
|
||||
#
|
||||
CONFIG_SERIAL_BFIN=y
|
||||
CONFIG_SERIAL_BFIN_CONSOLE=y
|
||||
# CONFIG_SERIAL_BFIN_DMA is not set
|
||||
CONFIG_SERIAL_BFIN_PIO=y
|
||||
CONFIG_SERIAL_BFIN_DMA=y
|
||||
# CONFIG_SERIAL_BFIN_PIO is not set
|
||||
# CONFIG_SERIAL_BFIN_UART0 is not set
|
||||
CONFIG_SERIAL_BFIN_UART1=y
|
||||
# CONFIG_BFIN_UART1_CTSRTS is not set
|
||||
|
||||
@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
# CONFIG_GENERIC_TIME is not set
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
@ -256,7 +256,7 @@ CONFIG_HZ=250
|
||||
#
|
||||
# Memory Setup
|
||||
#
|
||||
CONFIG_MEM_SIZE=64
|
||||
CONFIG_MAX_MEM_SIZE=512
|
||||
CONFIG_MEM_ADD_WIDTH=9
|
||||
CONFIG_BOOT_LOAD=0x1000
|
||||
CONFIG_BFIN_SCRATCH_REG_RETN=y
|
||||
|
||||
912
arch/blackfin/configs/CM-BF533_defconfig
Normal file
912
arch/blackfin/configs/CM-BF533_defconfig
Normal file
@ -0,0 +1,912 @@
|
||||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.22.16
|
||||
#
|
||||
# CONFIG_MMU is not set
|
||||
# CONFIG_FPU is not set
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
|
||||
CONFIG_BLACKFIN=y
|
||||
CONFIG_ZONE_DMA=y
|
||||
CONFIG_SEMAPHORE_SLEEPERS=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
CONFIG_INIT_ENV_ARG_LIMIT=32
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_LOCALVERSION_AUTO=y
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_IPC_NS is not set
|
||||
CONFIG_SYSVIPC_SYSCTL=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
# CONFIG_RELAY is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_UID16 is not set
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
# CONFIG_HOTPLUG is not set
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
|
||||
# CONFIG_NP2 is not set
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_SLUB is not set
|
||||
# CONFIG_SLOB is not set
|
||||
CONFIG_RT_MUTEXES=y
|
||||
CONFIG_TINY_SHMEM=y
|
||||
CONFIG_BASE_SMALL=0
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
#
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
|
||||
#
|
||||
# Block layer
|
||||
#
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_LSF is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
# CONFIG_IOSCHED_AS is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_DEFAULT_AS is not set
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
# CONFIG_DEFAULT_CFQ is not set
|
||||
CONFIG_DEFAULT_NOOP=y
|
||||
CONFIG_DEFAULT_IOSCHED="noop"
|
||||
CONFIG_PREEMPT_NONE=y
|
||||
# CONFIG_PREEMPT_VOLUNTARY is not set
|
||||
# CONFIG_PREEMPT is not set
|
||||
|
||||
#
|
||||
# Blackfin Processor Options
|
||||
#
|
||||
|
||||
#
|
||||
# Processor and Board Settings
|
||||
#
|
||||
# CONFIG_BF522 is not set
|
||||
# CONFIG_BF523 is not set
|
||||
# CONFIG_BF524 is not set
|
||||
# CONFIG_BF525 is not set
|
||||
# CONFIG_BF526 is not set
|
||||
# CONFIG_BF527 is not set
|
||||
# CONFIG_BF531 is not set
|
||||
# CONFIG_BF532 is not set
|
||||
CONFIG_BF533=y
|
||||
# CONFIG_BF534 is not set
|
||||
# CONFIG_BF536 is not set
|
||||
# CONFIG_BF537 is not set
|
||||
# CONFIG_BF542 is not set
|
||||
# CONFIG_BF544 is not set
|
||||
# CONFIG_BF547 is not set
|
||||
# CONFIG_BF548 is not set
|
||||
# CONFIG_BF549 is not set
|
||||
# CONFIG_BF561 is not set
|
||||
# CONFIG_BF_REV_0_0 is not set
|
||||
# CONFIG_BF_REV_0_1 is not set
|
||||
# CONFIG_BF_REV_0_2 is not set
|
||||
CONFIG_BF_REV_0_3=y
|
||||
# CONFIG_BF_REV_0_4 is not set
|
||||
# CONFIG_BF_REV_0_5 is not set
|
||||
# CONFIG_BF_REV_ANY is not set
|
||||
# CONFIG_BF_REV_NONE is not set
|
||||
CONFIG_BF53x=y
|
||||
CONFIG_BFIN_SINGLE_CORE=y
|
||||
CONFIG_MEM_MT48LC16M16A2TG_75=y
|
||||
# CONFIG_BFIN533_EZKIT is not set
|
||||
# CONFIG_BFIN533_STAMP is not set
|
||||
CONFIG_BFIN533_BLUETECHNIX_CM=y
|
||||
# CONFIG_H8606_HVSISTEMAS is not set
|
||||
# CONFIG_GENERIC_BF533_BOARD is not set
|
||||
|
||||
#
|
||||
# BF533/2/1 Specific Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# Interrupt Priority Assignment
|
||||
#
|
||||
|
||||
#
|
||||
# Priority
|
||||
#
|
||||
CONFIG_UART_ERROR=7
|
||||
CONFIG_SPORT0_ERROR=7
|
||||
CONFIG_SPI_ERROR=7
|
||||
CONFIG_SPORT1_ERROR=7
|
||||
CONFIG_PPI_ERROR=7
|
||||
CONFIG_DMA_ERROR=7
|
||||
CONFIG_PLLWAKE_ERROR=7
|
||||
CONFIG_RTC_ERROR=8
|
||||
CONFIG_DMA0_PPI=8
|
||||
CONFIG_DMA1_SPORT0RX=9
|
||||
CONFIG_DMA2_SPORT0TX=9
|
||||
CONFIG_DMA3_SPORT1RX=9
|
||||
CONFIG_DMA4_SPORT1TX=9
|
||||
CONFIG_DMA5_SPI=10
|
||||
CONFIG_DMA6_UARTRX=10
|
||||
CONFIG_DMA7_UARTTX=10
|
||||
CONFIG_TIMER0=11
|
||||
CONFIG_TIMER1=11
|
||||
CONFIG_TIMER2=11
|
||||
CONFIG_PFA=12
|
||||
CONFIG_PFB=12
|
||||
CONFIG_MEMDMA0=13
|
||||
CONFIG_MEMDMA1=13
|
||||
CONFIG_WDTIMER=13
|
||||
|
||||
#
|
||||
# Board customizations
|
||||
#
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
|
||||
#
|
||||
# Clock/PLL Setup
|
||||
#
|
||||
CONFIG_CLKIN_HZ=25000000
|
||||
# CONFIG_BFIN_KERNEL_CLOCK is not set
|
||||
CONFIG_MAX_VCO_HZ=750000000
|
||||
CONFIG_MIN_VCO_HZ=50000000
|
||||
CONFIG_MAX_SCLK_HZ=133333333
|
||||
CONFIG_MIN_SCLK_HZ=27000000
|
||||
|
||||
#
|
||||
# Kernel Timer/Scheduler
|
||||
#
|
||||
# CONFIG_HZ_100 is not set
|
||||
CONFIG_HZ_250=y
|
||||
# CONFIG_HZ_300 is not set
|
||||
# CONFIG_HZ_1000 is not set
|
||||
CONFIG_HZ=250
|
||||
|
||||
#
|
||||
# Memory Setup
|
||||
#
|
||||
CONFIG_MAX_MEM_SIZE=32
|
||||
CONFIG_MEM_ADD_WIDTH=9
|
||||
CONFIG_BOOT_LOAD=0x1000
|
||||
CONFIG_BFIN_SCRATCH_REG_RETN=y
|
||||
# CONFIG_BFIN_SCRATCH_REG_RETE is not set
|
||||
# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
|
||||
|
||||
#
|
||||
# Blackfin Kernel Optimizations
|
||||
#
|
||||
|
||||
#
|
||||
# Memory Optimizations
|
||||
#
|
||||
CONFIG_I_ENTRY_L1=y
|
||||
CONFIG_EXCPT_IRQ_SYSC_L1=y
|
||||
CONFIG_DO_IRQ_L1=y
|
||||
CONFIG_CORE_TIMER_IRQ_L1=y
|
||||
CONFIG_IDLE_L1=y
|
||||
CONFIG_SCHEDULE_L1=y
|
||||
CONFIG_ARITHMETIC_OPS_L1=y
|
||||
CONFIG_ACCESS_OK_L1=y
|
||||
CONFIG_MEMSET_L1=y
|
||||
CONFIG_MEMCPY_L1=y
|
||||
CONFIG_SYS_BFIN_SPINLOCK_L1=y
|
||||
CONFIG_IP_CHECKSUM_L1=y
|
||||
CONFIG_CACHELINE_ALIGNED_L1=y
|
||||
CONFIG_SYSCALL_TAB_L1=y
|
||||
CONFIG_CPLB_SWITCH_TAB_L1=y
|
||||
CONFIG_RAMKERNEL=y
|
||||
# CONFIG_ROMKERNEL is not set
|
||||
CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_DISCONTIGMEM_MANUAL is not set
|
||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_LARGE_ALLOCS=y
|
||||
# CONFIG_BFIN_GPTIMERS is not set
|
||||
CONFIG_BFIN_DMA_5XX=y
|
||||
# CONFIG_DMA_UNCACHED_2M is not set
|
||||
CONFIG_DMA_UNCACHED_1M=y
|
||||
# CONFIG_DMA_UNCACHED_NONE is not set
|
||||
|
||||
#
|
||||
# Cache Support
|
||||
#
|
||||
CONFIG_BFIN_ICACHE=y
|
||||
CONFIG_BFIN_DCACHE=y
|
||||
# CONFIG_BFIN_DCACHE_BANKA is not set
|
||||
# CONFIG_BFIN_ICACHE_LOCK is not set
|
||||
CONFIG_BFIN_WB=y
|
||||
# CONFIG_BFIN_WT is not set
|
||||
CONFIG_L1_MAX_PIECE=16
|
||||
# CONFIG_MPU is not set
|
||||
|
||||
#
|
||||
# Asynchonous Memory Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# EBIU_AMGCTL Global Control
|
||||
#
|
||||
CONFIG_C_AMCKEN=y
|
||||
CONFIG_C_CDPRIO=y
|
||||
# CONFIG_C_AMBEN is not set
|
||||
# CONFIG_C_AMBEN_B0 is not set
|
||||
# CONFIG_C_AMBEN_B0_B1 is not set
|
||||
# CONFIG_C_AMBEN_B0_B1_B2 is not set
|
||||
CONFIG_C_AMBEN_ALL=y
|
||||
|
||||
#
|
||||
# EBIU_AMBCTL Control
|
||||
#
|
||||
CONFIG_BANK_0=0x7BB0
|
||||
CONFIG_BANK_1=0x7BB0
|
||||
CONFIG_BANK_2=0x7BB0
|
||||
CONFIG_BANK_3=0xFFC3
|
||||
|
||||
#
|
||||
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
|
||||
#
|
||||
# CONFIG_PCI is not set
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
#
|
||||
|
||||
#
|
||||
# Executable file formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF_FDPIC=y
|
||||
CONFIG_BINFMT_FLAT=y
|
||||
CONFIG_BINFMT_ZFLAT=y
|
||||
CONFIG_BINFMT_SHARED_FLAT=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
|
||||
#
|
||||
# Power management options
|
||||
#
|
||||
# CONFIG_PM is not set
|
||||
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
||||
|
||||
#
|
||||
# CPU Frequency scaling
|
||||
#
|
||||
# CONFIG_CPU_FREQ is not set
|
||||
|
||||
#
|
||||
# Networking
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_PACKET=y
|
||||
# CONFIG_PACKET_MMAP is not set
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM=y
|
||||
# CONFIG_XFRM_USER is not set
|
||||
# CONFIG_XFRM_SUB_POLICY is not set
|
||||
# CONFIG_XFRM_MIGRATE is not set
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IP_MULTICAST is not set
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_FIB_HASH=y
|
||||
# CONFIG_IP_PNP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=y
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=y
|
||||
CONFIG_INET_XFRM_MODE_BEET=y
|
||||
CONFIG_INET_DIAG=y
|
||||
CONFIG_INET_TCP_DIAG=y
|
||||
# CONFIG_TCP_CONG_ADVANCED is not set
|
||||
CONFIG_TCP_CONG_CUBIC=y
|
||||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||
# CONFIG_TCP_MD5SIG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_INET6_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET6_TUNNEL is not set
|
||||
# CONFIG_NETLABEL is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
# CONFIG_IP_DCCP is not set
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
|
||||
#
|
||||
# Wireless
|
||||
#
|
||||
# CONFIG_CFG80211 is not set
|
||||
# CONFIG_WIRELESS_EXT is not set
|
||||
# CONFIG_MAC80211 is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
|
||||
#
|
||||
# Connector - unified userspace <-> kernelspace linker
|
||||
#
|
||||
# CONFIG_CONNECTOR is not set
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
# CONFIG_MTD_CMDLINE_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
# CONFIG_SSFDC is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
# CONFIG_MTD_CFI is not set
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
CONFIG_MTD_RAM=y
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_UCLINUX=y
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
# CONFIG_MTD_NAND is not set
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
# CONFIG_PARPORT is not set
|
||||
|
||||
#
|
||||
# Plug and Play support
|
||||
#
|
||||
# CONFIG_PNPACPI is not set
|
||||
|
||||
#
|
||||
# Block devices
|
||||
#
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
# CONFIG_BLK_DEV_LOOP is not set
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
# CONFIG_SCSI is not set
|
||||
# CONFIG_SCSI_NETLINK is not set
|
||||
# CONFIG_ATA is not set
|
||||
|
||||
#
|
||||
# Multi-device support (RAID and LVM)
|
||||
#
|
||||
# CONFIG_MD is not set
|
||||
|
||||
#
|
||||
# Network device support
|
||||
#
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
# CONFIG_PHYLIB is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SMC91X=y
|
||||
# CONFIG_SMSC911X is not set
|
||||
# CONFIG_DM9000 is not set
|
||||
CONFIG_NETDEV_1000=y
|
||||
# CONFIG_AX88180 is not set
|
||||
CONFIG_NETDEV_10000=y
|
||||
|
||||
#
|
||||
# Wireless LAN
|
||||
#
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
#
|
||||
# CONFIG_ISDN is not set
|
||||
|
||||
#
|
||||
# Telephony Support
|
||||
#
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
# CONFIG_INPUT is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
# CONFIG_AD9960 is not set
|
||||
# CONFIG_SPI_ADC_BF533 is not set
|
||||
# CONFIG_BF5xx_PFLAGS is not set
|
||||
# CONFIG_BF5xx_PPIFCD is not set
|
||||
# CONFIG_BFIN_SIMPLE_TIMER is not set
|
||||
# CONFIG_BF5xx_PPI is not set
|
||||
CONFIG_BFIN_SPORT=y
|
||||
# CONFIG_BFIN_TIMER_LATENCY is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
CONFIG_SERIAL_BFIN=y
|
||||
CONFIG_SERIAL_BFIN_CONSOLE=y
|
||||
CONFIG_SERIAL_BFIN_DMA=y
|
||||
# CONFIG_SERIAL_BFIN_PIO is not set
|
||||
CONFIG_SERIAL_BFIN_UART0=y
|
||||
# CONFIG_BFIN_UART0_CTSRTS is not set
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_BFIN_SPORT is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# CAN, the car bus and industrial fieldbus
|
||||
#
|
||||
# CONFIG_CAN4LINUX is not set
|
||||
|
||||
#
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_GEN_RTC is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
# CONFIG_I2C is not set
|
||||
|
||||
#
|
||||
# SPI support
|
||||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
|
||||
#
|
||||
# Dallas's 1-wire bus
|
||||
#
|
||||
# CONFIG_W1 is not set
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_SENSORS_ABITUGURU is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
CONFIG_DAB=y
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Display device support
|
||||
#
|
||||
# CONFIG_DISPLAY_SUPPORT is not set
|
||||
# CONFIG_VGASTATE is not set
|
||||
# CONFIG_FB is not set
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
# CONFIG_USB_ARCH_HAS_OHCI is not set
|
||||
# CONFIG_USB_ARCH_HAS_EHCI is not set
|
||||
# CONFIG_USB is not set
|
||||
|
||||
#
|
||||
# Enable Host or Gadget support to see Inventra options
|
||||
#
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
#
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# LED devices
|
||||
#
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
|
||||
#
|
||||
# LED drivers
|
||||
#
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
#
|
||||
|
||||
#
|
||||
# InfiniBand support
|
||||
#
|
||||
|
||||
#
|
||||
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
|
||||
#
|
||||
|
||||
#
|
||||
# Real Time Clock
|
||||
#
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
|
||||
#
|
||||
# DMA Engine support
|
||||
#
|
||||
# CONFIG_DMA_ENGINE is not set
|
||||
|
||||
#
|
||||
# DMA Clients
|
||||
#
|
||||
|
||||
#
|
||||
# DMA Devices
|
||||
#
|
||||
|
||||
#
|
||||
# PBX support
|
||||
#
|
||||
# CONFIG_PBX is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
# CONFIG_EXT2_FS_POSIX_ACL is not set
|
||||
# CONFIG_EXT2_FS_SECURITY is not set
|
||||
# CONFIG_EXT3_FS is not set
|
||||
# CONFIG_EXT4DEV_FS is not set
|
||||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_SYSFS=y
|
||||
# CONFIG_TMPFS is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_YAFFS_FS is not set
|
||||
# CONFIG_JFFS2_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
# CONFIG_NFS_FS is not set
|
||||
# CONFIG_NFSD is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
# CONFIG_CIFS is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
# CONFIG_9P_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
# CONFIG_NLS is not set
|
||||
|
||||
#
|
||||
# Distributed Lock Manager
|
||||
#
|
||||
# CONFIG_DLM is not set
|
||||
|
||||
#
|
||||
# Profiling support
|
||||
#
|
||||
# CONFIG_PROFILING is not set
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
# CONFIG_MAGIC_SYSRQ is not set
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
# CONFIG_DEBUG_MMRS is not set
|
||||
CONFIG_DEBUG_HUNT_FOR_ZERO=y
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
|
||||
# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
|
||||
# CONFIG_EARLY_PRINTK is not set
|
||||
CONFIG_CPLB_INFO=y
|
||||
CONFIG_ACCESS_CHECK=y
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
CONFIG_SECURITY=y
|
||||
# CONFIG_SECURITY_NETWORK is not set
|
||||
CONFIG_SECURITY_CAPABILITIES=y
|
||||
|
||||
#
|
||||
# Cryptographic options
|
||||
#
|
||||
# CONFIG_CRYPTO is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
CONFIG_CRC_CCITT=m
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
940
arch/blackfin/configs/CM-BF537E_defconfig
Normal file
940
arch/blackfin/configs/CM-BF537E_defconfig
Normal file
@ -0,0 +1,940 @@
|
||||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.22.16
|
||||
#
|
||||
# CONFIG_MMU is not set
|
||||
# CONFIG_FPU is not set
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
|
||||
CONFIG_BLACKFIN=y
|
||||
CONFIG_ZONE_DMA=y
|
||||
CONFIG_SEMAPHORE_SLEEPERS=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
CONFIG_INIT_ENV_ARG_LIMIT=32
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_LOCALVERSION_AUTO=y
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_IPC_NS is not set
|
||||
CONFIG_SYSVIPC_SYSCTL=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
# CONFIG_RELAY is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_UID16 is not set
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
# CONFIG_HOTPLUG is not set
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
|
||||
# CONFIG_NP2 is not set
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_SLUB is not set
|
||||
# CONFIG_SLOB is not set
|
||||
CONFIG_RT_MUTEXES=y
|
||||
CONFIG_TINY_SHMEM=y
|
||||
CONFIG_BASE_SMALL=0
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
#
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
|
||||
#
|
||||
# Block layer
|
||||
#
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_LSF is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
# CONFIG_IOSCHED_AS is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_DEFAULT_AS is not set
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
# CONFIG_DEFAULT_CFQ is not set
|
||||
CONFIG_DEFAULT_NOOP=y
|
||||
CONFIG_DEFAULT_IOSCHED="noop"
|
||||
CONFIG_PREEMPT_NONE=y
|
||||
# CONFIG_PREEMPT_VOLUNTARY is not set
|
||||
# CONFIG_PREEMPT is not set
|
||||
|
||||
#
|
||||
# Blackfin Processor Options
|
||||
#
|
||||
|
||||
#
|
||||
# Processor and Board Settings
|
||||
#
|
||||
# CONFIG_BF522 is not set
|
||||
# CONFIG_BF523 is not set
|
||||
# CONFIG_BF524 is not set
|
||||
# CONFIG_BF525 is not set
|
||||
# CONFIG_BF526 is not set
|
||||
# CONFIG_BF527 is not set
|
||||
# CONFIG_BF531 is not set
|
||||
# CONFIG_BF532 is not set
|
||||
# CONFIG_BF533 is not set
|
||||
# CONFIG_BF534 is not set
|
||||
# CONFIG_BF536 is not set
|
||||
CONFIG_BF537=y
|
||||
# CONFIG_BF542 is not set
|
||||
# CONFIG_BF544 is not set
|
||||
# CONFIG_BF547 is not set
|
||||
# CONFIG_BF548 is not set
|
||||
# CONFIG_BF549 is not set
|
||||
# CONFIG_BF561 is not set
|
||||
# CONFIG_BF_REV_0_0 is not set
|
||||
# CONFIG_BF_REV_0_1 is not set
|
||||
CONFIG_BF_REV_0_2=y
|
||||
# CONFIG_BF_REV_0_3 is not set
|
||||
# CONFIG_BF_REV_0_4 is not set
|
||||
# CONFIG_BF_REV_0_5 is not set
|
||||
# CONFIG_BF_REV_ANY is not set
|
||||
# CONFIG_BF_REV_NONE is not set
|
||||
CONFIG_BF53x=y
|
||||
CONFIG_BFIN_SINGLE_CORE=y
|
||||
CONFIG_MEM_MT48LC16M16A2TG_75=y
|
||||
CONFIG_IRQ_PLL_WAKEUP=7
|
||||
CONFIG_IRQ_RTC=8
|
||||
CONFIG_IRQ_PPI=8
|
||||
CONFIG_IRQ_SPORT0_RX=9
|
||||
CONFIG_IRQ_SPORT0_TX=9
|
||||
CONFIG_IRQ_SPORT1_RX=9
|
||||
CONFIG_IRQ_SPORT1_TX=9
|
||||
CONFIG_IRQ_TWI=10
|
||||
CONFIG_IRQ_SPI=10
|
||||
CONFIG_IRQ_UART0_RX=10
|
||||
CONFIG_IRQ_UART0_TX=10
|
||||
CONFIG_IRQ_UART1_RX=10
|
||||
CONFIG_IRQ_UART1_TX=10
|
||||
CONFIG_IRQ_MAC_RX=11
|
||||
CONFIG_IRQ_MAC_TX=11
|
||||
CONFIG_IRQ_TMR0=12
|
||||
CONFIG_IRQ_TMR1=12
|
||||
CONFIG_IRQ_TMR2=12
|
||||
CONFIG_IRQ_TMR3=12
|
||||
CONFIG_IRQ_TMR4=12
|
||||
CONFIG_IRQ_TMR5=12
|
||||
CONFIG_IRQ_TMR6=12
|
||||
CONFIG_IRQ_TMR7=12
|
||||
CONFIG_IRQ_PORTG_INTB=12
|
||||
CONFIG_IRQ_MEM_DMA0=13
|
||||
CONFIG_IRQ_MEM_DMA1=13
|
||||
CONFIG_IRQ_WATCH=13
|
||||
# CONFIG_BFIN537_STAMP is not set
|
||||
CONFIG_BFIN537_BLUETECHNIX_CM=y
|
||||
# CONFIG_PNAV10 is not set
|
||||
# CONFIG_CAMSIG_MINOTAUR is not set
|
||||
# CONFIG_GENERIC_BF537_BOARD is not set
|
||||
|
||||
#
|
||||
# BF537 Specific Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# Interrupt Priority Assignment
|
||||
#
|
||||
|
||||
#
|
||||
# Priority
|
||||
#
|
||||
CONFIG_IRQ_DMA_ERROR=7
|
||||
CONFIG_IRQ_ERROR=7
|
||||
CONFIG_IRQ_CAN_RX=11
|
||||
CONFIG_IRQ_CAN_TX=11
|
||||
CONFIG_IRQ_PROG_INTA=12
|
||||
|
||||
#
|
||||
# Board customizations
|
||||
#
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
|
||||
#
|
||||
# Clock/PLL Setup
|
||||
#
|
||||
CONFIG_CLKIN_HZ=25000000
|
||||
# CONFIG_BFIN_KERNEL_CLOCK is not set
|
||||
CONFIG_MAX_VCO_HZ=600000000
|
||||
CONFIG_MIN_VCO_HZ=50000000
|
||||
CONFIG_MAX_SCLK_HZ=133333333
|
||||
CONFIG_MIN_SCLK_HZ=27000000
|
||||
|
||||
#
|
||||
# Kernel Timer/Scheduler
|
||||
#
|
||||
# CONFIG_HZ_100 is not set
|
||||
CONFIG_HZ_250=y
|
||||
# CONFIG_HZ_300 is not set
|
||||
# CONFIG_HZ_1000 is not set
|
||||
CONFIG_HZ=250
|
||||
|
||||
#
|
||||
# Memory Setup
|
||||
#
|
||||
CONFIG_MAX_MEM_SIZE=32
|
||||
CONFIG_MEM_ADD_WIDTH=9
|
||||
CONFIG_BOOT_LOAD=0x1000
|
||||
CONFIG_BFIN_SCRATCH_REG_RETN=y
|
||||
# CONFIG_BFIN_SCRATCH_REG_RETE is not set
|
||||
# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
|
||||
|
||||
#
|
||||
# Blackfin Kernel Optimizations
|
||||
#
|
||||
|
||||
#
|
||||
# Memory Optimizations
|
||||
#
|
||||
CONFIG_I_ENTRY_L1=y
|
||||
CONFIG_EXCPT_IRQ_SYSC_L1=y
|
||||
CONFIG_DO_IRQ_L1=y
|
||||
CONFIG_CORE_TIMER_IRQ_L1=y
|
||||
CONFIG_IDLE_L1=y
|
||||
CONFIG_SCHEDULE_L1=y
|
||||
CONFIG_ARITHMETIC_OPS_L1=y
|
||||
CONFIG_ACCESS_OK_L1=y
|
||||
CONFIG_MEMSET_L1=y
|
||||
CONFIG_MEMCPY_L1=y
|
||||
CONFIG_SYS_BFIN_SPINLOCK_L1=y
|
||||
CONFIG_IP_CHECKSUM_L1=y
|
||||
CONFIG_CACHELINE_ALIGNED_L1=y
|
||||
CONFIG_SYSCALL_TAB_L1=y
|
||||
CONFIG_CPLB_SWITCH_TAB_L1=y
|
||||
CONFIG_RAMKERNEL=y
|
||||
# CONFIG_ROMKERNEL is not set
|
||||
CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_DISCONTIGMEM_MANUAL is not set
|
||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_LARGE_ALLOCS=y
|
||||
# CONFIG_BFIN_GPTIMERS is not set
|
||||
CONFIG_BFIN_DMA_5XX=y
|
||||
# CONFIG_DMA_UNCACHED_2M is not set
|
||||
CONFIG_DMA_UNCACHED_1M=y
|
||||
# CONFIG_DMA_UNCACHED_NONE is not set
|
||||
|
||||
#
|
||||
# Cache Support
|
||||
#
|
||||
CONFIG_BFIN_ICACHE=y
|
||||
CONFIG_BFIN_DCACHE=y
|
||||
# CONFIG_BFIN_DCACHE_BANKA is not set
|
||||
# CONFIG_BFIN_ICACHE_LOCK is not set
|
||||
CONFIG_BFIN_WB=y
|
||||
# CONFIG_BFIN_WT is not set
|
||||
CONFIG_L1_MAX_PIECE=16
|
||||
# CONFIG_MPU is not set
|
||||
|
||||
#
|
||||
# Asynchonous Memory Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# EBIU_AMGCTL Global Control
|
||||
#
|
||||
CONFIG_C_AMCKEN=y
|
||||
CONFIG_C_CDPRIO=y
|
||||
# CONFIG_C_AMBEN is not set
|
||||
# CONFIG_C_AMBEN_B0 is not set
|
||||
# CONFIG_C_AMBEN_B0_B1 is not set
|
||||
# CONFIG_C_AMBEN_B0_B1_B2 is not set
|
||||
CONFIG_C_AMBEN_ALL=y
|
||||
|
||||
#
|
||||
# EBIU_AMBCTL Control
|
||||
#
|
||||
CONFIG_BANK_0=0x7BB0
|
||||
CONFIG_BANK_1=0x7BB0
|
||||
CONFIG_BANK_2=0x7BB0
|
||||
CONFIG_BANK_3=0xFFC3
|
||||
|
||||
#
|
||||
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
|
||||
#
|
||||
# CONFIG_PCI is not set
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
#
|
||||
|
||||
#
|
||||
# Executable file formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF_FDPIC=y
|
||||
CONFIG_BINFMT_FLAT=y
|
||||
CONFIG_BINFMT_ZFLAT=y
|
||||
CONFIG_BINFMT_SHARED_FLAT=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
|
||||
#
|
||||
# Power management options
|
||||
#
|
||||
# CONFIG_PM is not set
|
||||
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
||||
|
||||
#
|
||||
# CPU Frequency scaling
|
||||
#
|
||||
# CONFIG_CPU_FREQ is not set
|
||||
|
||||
#
|
||||
# Networking
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_PACKET=y
|
||||
# CONFIG_PACKET_MMAP is not set
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM=y
|
||||
# CONFIG_XFRM_USER is not set
|
||||
# CONFIG_XFRM_SUB_POLICY is not set
|
||||
# CONFIG_XFRM_MIGRATE is not set
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IP_MULTICAST is not set
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_FIB_HASH=y
|
||||
# CONFIG_IP_PNP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=y
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=y
|
||||
CONFIG_INET_XFRM_MODE_BEET=y
|
||||
CONFIG_INET_DIAG=y
|
||||
CONFIG_INET_TCP_DIAG=y
|
||||
# CONFIG_TCP_CONG_ADVANCED is not set
|
||||
CONFIG_TCP_CONG_CUBIC=y
|
||||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||
# CONFIG_TCP_MD5SIG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_INET6_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET6_TUNNEL is not set
|
||||
# CONFIG_NETLABEL is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
# CONFIG_IP_DCCP is not set
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
|
||||
#
|
||||
# Wireless
|
||||
#
|
||||
# CONFIG_CFG80211 is not set
|
||||
# CONFIG_WIRELESS_EXT is not set
|
||||
# CONFIG_MAC80211 is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
|
||||
#
|
||||
# Connector - unified userspace <-> kernelspace linker
|
||||
#
|
||||
# CONFIG_CONNECTOR is not set
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
# CONFIG_MTD_CMDLINE_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
# CONFIG_SSFDC is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
# CONFIG_MTD_CFI is not set
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
CONFIG_MTD_RAM=y
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_UCLINUX=y
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
# CONFIG_MTD_NAND is not set
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
# CONFIG_PARPORT is not set
|
||||
|
||||
#
|
||||
# Plug and Play support
|
||||
#
|
||||
# CONFIG_PNPACPI is not set
|
||||
|
||||
#
|
||||
# Block devices
|
||||
#
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
# CONFIG_BLK_DEV_LOOP is not set
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
# CONFIG_SCSI is not set
|
||||
# CONFIG_SCSI_NETLINK is not set
|
||||
# CONFIG_ATA is not set
|
||||
|
||||
#
|
||||
# Multi-device support (RAID and LVM)
|
||||
#
|
||||
# CONFIG_MD is not set
|
||||
|
||||
#
|
||||
# Network device support
|
||||
#
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
CONFIG_PHYLIB=y
|
||||
|
||||
#
|
||||
# MII PHY device drivers
|
||||
#
|
||||
# CONFIG_MARVELL_PHY is not set
|
||||
# CONFIG_DAVICOM_PHY is not set
|
||||
# CONFIG_QSEMI_PHY is not set
|
||||
# CONFIG_LXT_PHY is not set
|
||||
# CONFIG_CICADA_PHY is not set
|
||||
# CONFIG_VITESSE_PHY is not set
|
||||
# CONFIG_SMSC_PHY is not set
|
||||
# CONFIG_BROADCOM_PHY is not set
|
||||
# CONFIG_FIXED_PHY is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
# CONFIG_SMC91X is not set
|
||||
CONFIG_BFIN_MAC=y
|
||||
CONFIG_BFIN_MAC_USE_L1=y
|
||||
CONFIG_BFIN_TX_DESC_NUM=10
|
||||
CONFIG_BFIN_RX_DESC_NUM=20
|
||||
# CONFIG_BFIN_MAC_RMII is not set
|
||||
# CONFIG_SMSC911X is not set
|
||||
# CONFIG_DM9000 is not set
|
||||
CONFIG_NETDEV_1000=y
|
||||
# CONFIG_AX88180 is not set
|
||||
CONFIG_NETDEV_10000=y
|
||||
|
||||
#
|
||||
# Wireless LAN
|
||||
#
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
#
|
||||
# CONFIG_ISDN is not set
|
||||
|
||||
#
|
||||
# Telephony Support
|
||||
#
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
# CONFIG_INPUT is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
# CONFIG_AD9960 is not set
|
||||
# CONFIG_SPI_ADC_BF533 is not set
|
||||
# CONFIG_BF5xx_PFLAGS is not set
|
||||
# CONFIG_BF5xx_PPIFCD is not set
|
||||
# CONFIG_BFIN_SIMPLE_TIMER is not set
|
||||
# CONFIG_BF5xx_PPI is not set
|
||||
CONFIG_BFIN_SPORT=y
|
||||
# CONFIG_BFIN_TIMER_LATENCY is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
CONFIG_SERIAL_BFIN=y
|
||||
CONFIG_SERIAL_BFIN_CONSOLE=y
|
||||
CONFIG_SERIAL_BFIN_DMA=y
|
||||
# CONFIG_SERIAL_BFIN_PIO is not set
|
||||
CONFIG_SERIAL_BFIN_UART0=y
|
||||
# CONFIG_BFIN_UART0_CTSRTS is not set
|
||||
CONFIG_SERIAL_BFIN_UART1=y
|
||||
# CONFIG_BFIN_UART1_CTSRTS is not set
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_BFIN_SPORT is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# CAN, the car bus and industrial fieldbus
|
||||
#
|
||||
# CONFIG_CAN4LINUX is not set
|
||||
|
||||
#
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_GEN_RTC is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
# CONFIG_I2C is not set
|
||||
|
||||
#
|
||||
# SPI support
|
||||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
|
||||
#
|
||||
# Dallas's 1-wire bus
|
||||
#
|
||||
# CONFIG_W1 is not set
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_SENSORS_ABITUGURU is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
CONFIG_DAB=y
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Display device support
|
||||
#
|
||||
# CONFIG_DISPLAY_SUPPORT is not set
|
||||
# CONFIG_VGASTATE is not set
|
||||
# CONFIG_FB is not set
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
# CONFIG_USB_ARCH_HAS_OHCI is not set
|
||||
# CONFIG_USB_ARCH_HAS_EHCI is not set
|
||||
# CONFIG_USB is not set
|
||||
|
||||
#
|
||||
# Enable Host or Gadget support to see Inventra options
|
||||
#
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
#
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# LED devices
|
||||
#
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
|
||||
#
|
||||
# LED drivers
|
||||
#
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
#
|
||||
|
||||
#
|
||||
# InfiniBand support
|
||||
#
|
||||
|
||||
#
|
||||
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
|
||||
#
|
||||
|
||||
#
|
||||
# Real Time Clock
|
||||
#
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
|
||||
#
|
||||
# DMA Engine support
|
||||
#
|
||||
# CONFIG_DMA_ENGINE is not set
|
||||
|
||||
#
|
||||
# DMA Clients
|
||||
#
|
||||
|
||||
#
|
||||
# DMA Devices
|
||||
#
|
||||
|
||||
#
|
||||
# PBX support
|
||||
#
|
||||
# CONFIG_PBX is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
# CONFIG_EXT2_FS_POSIX_ACL is not set
|
||||
# CONFIG_EXT2_FS_SECURITY is not set
|
||||
# CONFIG_EXT3_FS is not set
|
||||
# CONFIG_EXT4DEV_FS is not set
|
||||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_SYSFS=y
|
||||
# CONFIG_TMPFS is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_YAFFS_FS is not set
|
||||
# CONFIG_JFFS2_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
# CONFIG_NFS_FS is not set
|
||||
# CONFIG_NFSD is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
# CONFIG_CIFS is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
# CONFIG_9P_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
# CONFIG_NLS is not set
|
||||
|
||||
#
|
||||
# Distributed Lock Manager
|
||||
#
|
||||
# CONFIG_DLM is not set
|
||||
|
||||
#
|
||||
# Profiling support
|
||||
#
|
||||
# CONFIG_PROFILING is not set
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
# CONFIG_MAGIC_SYSRQ is not set
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
# CONFIG_DEBUG_MMRS is not set
|
||||
# CONFIG_DEBUG_HUNT_FOR_ZERO is not set
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
|
||||
# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
|
||||
# CONFIG_EARLY_PRINTK is not set
|
||||
CONFIG_CPLB_INFO=y
|
||||
CONFIG_ACCESS_CHECK=y
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
CONFIG_SECURITY=y
|
||||
# CONFIG_SECURITY_NETWORK is not set
|
||||
CONFIG_SECURITY_CAPABILITIES=y
|
||||
|
||||
#
|
||||
# Cryptographic options
|
||||
#
|
||||
# CONFIG_CRYPTO is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
CONFIG_CRC_CCITT=m
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
940
arch/blackfin/configs/CM-BF537U_defconfig
Normal file
940
arch/blackfin/configs/CM-BF537U_defconfig
Normal file
@ -0,0 +1,940 @@
|
||||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.22.16
|
||||
#
|
||||
# CONFIG_MMU is not set
|
||||
# CONFIG_FPU is not set
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
|
||||
CONFIG_BLACKFIN=y
|
||||
CONFIG_ZONE_DMA=y
|
||||
CONFIG_SEMAPHORE_SLEEPERS=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
CONFIG_INIT_ENV_ARG_LIMIT=32
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_LOCALVERSION_AUTO=y
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_IPC_NS is not set
|
||||
CONFIG_SYSVIPC_SYSCTL=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
# CONFIG_RELAY is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_UID16 is not set
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
# CONFIG_HOTPLUG is not set
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
|
||||
# CONFIG_NP2 is not set
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_SLUB is not set
|
||||
# CONFIG_SLOB is not set
|
||||
CONFIG_RT_MUTEXES=y
|
||||
CONFIG_TINY_SHMEM=y
|
||||
CONFIG_BASE_SMALL=0
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
#
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
|
||||
#
|
||||
# Block layer
|
||||
#
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_LSF is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
# CONFIG_IOSCHED_AS is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_DEFAULT_AS is not set
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
# CONFIG_DEFAULT_CFQ is not set
|
||||
CONFIG_DEFAULT_NOOP=y
|
||||
CONFIG_DEFAULT_IOSCHED="noop"
|
||||
CONFIG_PREEMPT_NONE=y
|
||||
# CONFIG_PREEMPT_VOLUNTARY is not set
|
||||
# CONFIG_PREEMPT is not set
|
||||
|
||||
#
|
||||
# Blackfin Processor Options
|
||||
#
|
||||
|
||||
#
|
||||
# Processor and Board Settings
|
||||
#
|
||||
# CONFIG_BF522 is not set
|
||||
# CONFIG_BF523 is not set
|
||||
# CONFIG_BF524 is not set
|
||||
# CONFIG_BF525 is not set
|
||||
# CONFIG_BF526 is not set
|
||||
# CONFIG_BF527 is not set
|
||||
# CONFIG_BF531 is not set
|
||||
# CONFIG_BF532 is not set
|
||||
# CONFIG_BF533 is not set
|
||||
# CONFIG_BF534 is not set
|
||||
# CONFIG_BF536 is not set
|
||||
CONFIG_BF537=y
|
||||
# CONFIG_BF542 is not set
|
||||
# CONFIG_BF544 is not set
|
||||
# CONFIG_BF547 is not set
|
||||
# CONFIG_BF548 is not set
|
||||
# CONFIG_BF549 is not set
|
||||
# CONFIG_BF561 is not set
|
||||
# CONFIG_BF_REV_0_0 is not set
|
||||
# CONFIG_BF_REV_0_1 is not set
|
||||
CONFIG_BF_REV_0_2=y
|
||||
# CONFIG_BF_REV_0_3 is not set
|
||||
# CONFIG_BF_REV_0_4 is not set
|
||||
# CONFIG_BF_REV_0_5 is not set
|
||||
# CONFIG_BF_REV_ANY is not set
|
||||
# CONFIG_BF_REV_NONE is not set
|
||||
CONFIG_BF53x=y
|
||||
CONFIG_BFIN_SINGLE_CORE=y
|
||||
CONFIG_MEM_MT48LC16M16A2TG_75=y
|
||||
CONFIG_IRQ_PLL_WAKEUP=7
|
||||
CONFIG_IRQ_RTC=8
|
||||
CONFIG_IRQ_PPI=8
|
||||
CONFIG_IRQ_SPORT0_RX=9
|
||||
CONFIG_IRQ_SPORT0_TX=9
|
||||
CONFIG_IRQ_SPORT1_RX=9
|
||||
CONFIG_IRQ_SPORT1_TX=9
|
||||
CONFIG_IRQ_TWI=10
|
||||
CONFIG_IRQ_SPI=10
|
||||
CONFIG_IRQ_UART0_RX=10
|
||||
CONFIG_IRQ_UART0_TX=10
|
||||
CONFIG_IRQ_UART1_RX=10
|
||||
CONFIG_IRQ_UART1_TX=10
|
||||
CONFIG_IRQ_MAC_RX=11
|
||||
CONFIG_IRQ_MAC_TX=11
|
||||
CONFIG_IRQ_TMR0=12
|
||||
CONFIG_IRQ_TMR1=12
|
||||
CONFIG_IRQ_TMR2=12
|
||||
CONFIG_IRQ_TMR3=12
|
||||
CONFIG_IRQ_TMR4=12
|
||||
CONFIG_IRQ_TMR5=12
|
||||
CONFIG_IRQ_TMR6=12
|
||||
CONFIG_IRQ_TMR7=12
|
||||
CONFIG_IRQ_PORTG_INTB=12
|
||||
CONFIG_IRQ_MEM_DMA0=13
|
||||
CONFIG_IRQ_MEM_DMA1=13
|
||||
CONFIG_IRQ_WATCH=13
|
||||
# CONFIG_BFIN537_STAMP is not set
|
||||
CONFIG_BFIN537_BLUETECHNIX_CM=y
|
||||
# CONFIG_PNAV10 is not set
|
||||
# CONFIG_CAMSIG_MINOTAUR is not set
|
||||
# CONFIG_GENERIC_BF537_BOARD is not set
|
||||
|
||||
#
|
||||
# BF537 Specific Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# Interrupt Priority Assignment
|
||||
#
|
||||
|
||||
#
|
||||
# Priority
|
||||
#
|
||||
CONFIG_IRQ_DMA_ERROR=7
|
||||
CONFIG_IRQ_ERROR=7
|
||||
CONFIG_IRQ_CAN_RX=11
|
||||
CONFIG_IRQ_CAN_TX=11
|
||||
CONFIG_IRQ_PROG_INTA=12
|
||||
|
||||
#
|
||||
# Board customizations
|
||||
#
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
|
||||
#
|
||||
# Clock/PLL Setup
|
||||
#
|
||||
CONFIG_CLKIN_HZ=30000000
|
||||
# CONFIG_BFIN_KERNEL_CLOCK is not set
|
||||
CONFIG_MAX_VCO_HZ=600000000
|
||||
CONFIG_MIN_VCO_HZ=50000000
|
||||
CONFIG_MAX_SCLK_HZ=133333333
|
||||
CONFIG_MIN_SCLK_HZ=27000000
|
||||
|
||||
#
|
||||
# Kernel Timer/Scheduler
|
||||
#
|
||||
# CONFIG_HZ_100 is not set
|
||||
CONFIG_HZ_250=y
|
||||
# CONFIG_HZ_300 is not set
|
||||
# CONFIG_HZ_1000 is not set
|
||||
CONFIG_HZ=250
|
||||
|
||||
#
|
||||
# Memory Setup
|
||||
#
|
||||
CONFIG_MAX_MEM_SIZE=32
|
||||
CONFIG_MEM_ADD_WIDTH=9
|
||||
CONFIG_BOOT_LOAD=0x1000
|
||||
CONFIG_BFIN_SCRATCH_REG_RETN=y
|
||||
# CONFIG_BFIN_SCRATCH_REG_RETE is not set
|
||||
# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
|
||||
|
||||
#
|
||||
# Blackfin Kernel Optimizations
|
||||
#
|
||||
|
||||
#
|
||||
# Memory Optimizations
|
||||
#
|
||||
CONFIG_I_ENTRY_L1=y
|
||||
CONFIG_EXCPT_IRQ_SYSC_L1=y
|
||||
CONFIG_DO_IRQ_L1=y
|
||||
CONFIG_CORE_TIMER_IRQ_L1=y
|
||||
CONFIG_IDLE_L1=y
|
||||
CONFIG_SCHEDULE_L1=y
|
||||
CONFIG_ARITHMETIC_OPS_L1=y
|
||||
CONFIG_ACCESS_OK_L1=y
|
||||
CONFIG_MEMSET_L1=y
|
||||
CONFIG_MEMCPY_L1=y
|
||||
CONFIG_SYS_BFIN_SPINLOCK_L1=y
|
||||
CONFIG_IP_CHECKSUM_L1=y
|
||||
CONFIG_CACHELINE_ALIGNED_L1=y
|
||||
CONFIG_SYSCALL_TAB_L1=y
|
||||
CONFIG_CPLB_SWITCH_TAB_L1=y
|
||||
CONFIG_RAMKERNEL=y
|
||||
# CONFIG_ROMKERNEL is not set
|
||||
CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_DISCONTIGMEM_MANUAL is not set
|
||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_LARGE_ALLOCS=y
|
||||
# CONFIG_BFIN_GPTIMERS is not set
|
||||
CONFIG_BFIN_DMA_5XX=y
|
||||
# CONFIG_DMA_UNCACHED_2M is not set
|
||||
CONFIG_DMA_UNCACHED_1M=y
|
||||
# CONFIG_DMA_UNCACHED_NONE is not set
|
||||
|
||||
#
|
||||
# Cache Support
|
||||
#
|
||||
CONFIG_BFIN_ICACHE=y
|
||||
CONFIG_BFIN_DCACHE=y
|
||||
# CONFIG_BFIN_DCACHE_BANKA is not set
|
||||
# CONFIG_BFIN_ICACHE_LOCK is not set
|
||||
CONFIG_BFIN_WB=y
|
||||
# CONFIG_BFIN_WT is not set
|
||||
CONFIG_L1_MAX_PIECE=16
|
||||
# CONFIG_MPU is not set
|
||||
|
||||
#
|
||||
# Asynchonous Memory Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# EBIU_AMGCTL Global Control
|
||||
#
|
||||
CONFIG_C_AMCKEN=y
|
||||
CONFIG_C_CDPRIO=y
|
||||
# CONFIG_C_AMBEN is not set
|
||||
# CONFIG_C_AMBEN_B0 is not set
|
||||
# CONFIG_C_AMBEN_B0_B1 is not set
|
||||
# CONFIG_C_AMBEN_B0_B1_B2 is not set
|
||||
CONFIG_C_AMBEN_ALL=y
|
||||
|
||||
#
|
||||
# EBIU_AMBCTL Control
|
||||
#
|
||||
CONFIG_BANK_0=0x7BB0
|
||||
CONFIG_BANK_1=0x7BB0
|
||||
CONFIG_BANK_2=0xFFC3
|
||||
CONFIG_BANK_3=0xFFC3
|
||||
|
||||
#
|
||||
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
|
||||
#
|
||||
# CONFIG_PCI is not set
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
#
|
||||
|
||||
#
|
||||
# Executable file formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF_FDPIC=y
|
||||
CONFIG_BINFMT_FLAT=y
|
||||
CONFIG_BINFMT_ZFLAT=y
|
||||
CONFIG_BINFMT_SHARED_FLAT=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
|
||||
#
|
||||
# Power management options
|
||||
#
|
||||
# CONFIG_PM is not set
|
||||
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
||||
|
||||
#
|
||||
# CPU Frequency scaling
|
||||
#
|
||||
# CONFIG_CPU_FREQ is not set
|
||||
|
||||
#
|
||||
# Networking
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_PACKET=y
|
||||
# CONFIG_PACKET_MMAP is not set
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM=y
|
||||
# CONFIG_XFRM_USER is not set
|
||||
# CONFIG_XFRM_SUB_POLICY is not set
|
||||
# CONFIG_XFRM_MIGRATE is not set
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IP_MULTICAST is not set
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_FIB_HASH=y
|
||||
# CONFIG_IP_PNP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=y
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=y
|
||||
CONFIG_INET_XFRM_MODE_BEET=y
|
||||
CONFIG_INET_DIAG=y
|
||||
CONFIG_INET_TCP_DIAG=y
|
||||
# CONFIG_TCP_CONG_ADVANCED is not set
|
||||
CONFIG_TCP_CONG_CUBIC=y
|
||||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||
# CONFIG_TCP_MD5SIG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_INET6_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET6_TUNNEL is not set
|
||||
# CONFIG_NETLABEL is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
# CONFIG_IP_DCCP is not set
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
|
||||
#
|
||||
# Wireless
|
||||
#
|
||||
# CONFIG_CFG80211 is not set
|
||||
# CONFIG_WIRELESS_EXT is not set
|
||||
# CONFIG_MAC80211 is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
|
||||
#
|
||||
# Connector - unified userspace <-> kernelspace linker
|
||||
#
|
||||
# CONFIG_CONNECTOR is not set
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
# CONFIG_MTD_CMDLINE_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
# CONFIG_SSFDC is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
# CONFIG_MTD_CFI is not set
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
CONFIG_MTD_RAM=y
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_UCLINUX=y
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
# CONFIG_MTD_NAND is not set
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
# CONFIG_PARPORT is not set
|
||||
|
||||
#
|
||||
# Plug and Play support
|
||||
#
|
||||
# CONFIG_PNPACPI is not set
|
||||
|
||||
#
|
||||
# Block devices
|
||||
#
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
# CONFIG_BLK_DEV_LOOP is not set
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
# CONFIG_SCSI is not set
|
||||
# CONFIG_SCSI_NETLINK is not set
|
||||
# CONFIG_ATA is not set
|
||||
|
||||
#
|
||||
# Multi-device support (RAID and LVM)
|
||||
#
|
||||
# CONFIG_MD is not set
|
||||
|
||||
#
|
||||
# Network device support
|
||||
#
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
# CONFIG_PHYLIB is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SMC91X=y
|
||||
# CONFIG_BFIN_MAC is not set
|
||||
# CONFIG_SMSC911X is not set
|
||||
# CONFIG_DM9000 is not set
|
||||
CONFIG_NETDEV_1000=y
|
||||
# CONFIG_AX88180 is not set
|
||||
CONFIG_NETDEV_10000=y
|
||||
|
||||
#
|
||||
# Wireless LAN
|
||||
#
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
#
|
||||
# CONFIG_ISDN is not set
|
||||
|
||||
#
|
||||
# Telephony Support
|
||||
#
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
# CONFIG_INPUT is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
# CONFIG_AD9960 is not set
|
||||
# CONFIG_SPI_ADC_BF533 is not set
|
||||
# CONFIG_BF5xx_PFLAGS is not set
|
||||
# CONFIG_BF5xx_PPIFCD is not set
|
||||
# CONFIG_BFIN_SIMPLE_TIMER is not set
|
||||
# CONFIG_BF5xx_PPI is not set
|
||||
CONFIG_BFIN_SPORT=y
|
||||
# CONFIG_BFIN_TIMER_LATENCY is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
CONFIG_SERIAL_BFIN=y
|
||||
CONFIG_SERIAL_BFIN_CONSOLE=y
|
||||
CONFIG_SERIAL_BFIN_DMA=y
|
||||
# CONFIG_SERIAL_BFIN_PIO is not set
|
||||
CONFIG_SERIAL_BFIN_UART0=y
|
||||
# CONFIG_BFIN_UART0_CTSRTS is not set
|
||||
CONFIG_SERIAL_BFIN_UART1=y
|
||||
# CONFIG_BFIN_UART1_CTSRTS is not set
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_BFIN_SPORT is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# CAN, the car bus and industrial fieldbus
|
||||
#
|
||||
# CONFIG_CAN4LINUX is not set
|
||||
|
||||
#
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_GEN_RTC is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
# CONFIG_I2C is not set
|
||||
|
||||
#
|
||||
# SPI support
|
||||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
|
||||
#
|
||||
# Dallas's 1-wire bus
|
||||
#
|
||||
# CONFIG_W1 is not set
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_SENSORS_ABITUGURU is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
CONFIG_DAB=y
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Display device support
|
||||
#
|
||||
# CONFIG_DISPLAY_SUPPORT is not set
|
||||
# CONFIG_VGASTATE is not set
|
||||
# CONFIG_FB is not set
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
# CONFIG_USB_ARCH_HAS_OHCI is not set
|
||||
# CONFIG_USB_ARCH_HAS_EHCI is not set
|
||||
# CONFIG_USB is not set
|
||||
# CONFIG_USB_MUSB_HDRC is not set
|
||||
# CONFIG_USB_GADGET_MUSB_HDRC is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
#
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
CONFIG_USB_GADGET=y
|
||||
# CONFIG_USB_GADGET_DEBUG_FILES is not set
|
||||
CONFIG_USB_GADGET_SELECTED=y
|
||||
# CONFIG_USB_GADGET_FSL_USB2 is not set
|
||||
CONFIG_USB_GADGET_NET2272=y
|
||||
CONFIG_USB_NET2272=y
|
||||
# CONFIG_USB_GADGET_NET2280 is not set
|
||||
# CONFIG_USB_GADGET_PXA2XX is not set
|
||||
# CONFIG_USB_GADGET_GOKU is not set
|
||||
# CONFIG_USB_GADGET_LH7A40X is not set
|
||||
# CONFIG_USB_GADGET_OMAP is not set
|
||||
# CONFIG_USB_GADGET_AT91 is not set
|
||||
# CONFIG_USB_GADGET_DUMMY_HCD is not set
|
||||
CONFIG_USB_GADGET_DUALSPEED=y
|
||||
# CONFIG_USB_ZERO is not set
|
||||
# CONFIG_USB_ETH is not set
|
||||
# CONFIG_USB_GADGETFS is not set
|
||||
# CONFIG_USB_FILE_STORAGE is not set
|
||||
# CONFIG_USB_G_SERIAL is not set
|
||||
# CONFIG_USB_MIDI_GADGET is not set
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# LED devices
|
||||
#
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
|
||||
#
|
||||
# LED drivers
|
||||
#
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
#
|
||||
|
||||
#
|
||||
# InfiniBand support
|
||||
#
|
||||
|
||||
#
|
||||
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
|
||||
#
|
||||
|
||||
#
|
||||
# Real Time Clock
|
||||
#
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
|
||||
#
|
||||
# DMA Engine support
|
||||
#
|
||||
# CONFIG_DMA_ENGINE is not set
|
||||
|
||||
#
|
||||
# DMA Clients
|
||||
#
|
||||
|
||||
#
|
||||
# DMA Devices
|
||||
#
|
||||
|
||||
#
|
||||
# PBX support
|
||||
#
|
||||
# CONFIG_PBX is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
# CONFIG_EXT2_FS_POSIX_ACL is not set
|
||||
# CONFIG_EXT2_FS_SECURITY is not set
|
||||
# CONFIG_EXT3_FS is not set
|
||||
# CONFIG_EXT4DEV_FS is not set
|
||||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_SYSFS=y
|
||||
# CONFIG_TMPFS is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_YAFFS_FS is not set
|
||||
# CONFIG_JFFS2_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
# CONFIG_NFS_FS is not set
|
||||
# CONFIG_NFSD is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
# CONFIG_CIFS is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
# CONFIG_9P_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
# CONFIG_NLS is not set
|
||||
|
||||
#
|
||||
# Distributed Lock Manager
|
||||
#
|
||||
# CONFIG_DLM is not set
|
||||
|
||||
#
|
||||
# Profiling support
|
||||
#
|
||||
# CONFIG_PROFILING is not set
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
# CONFIG_MAGIC_SYSRQ is not set
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
# CONFIG_DEBUG_MMRS is not set
|
||||
# CONFIG_DEBUG_HUNT_FOR_ZERO is not set
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
|
||||
# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
|
||||
# CONFIG_EARLY_PRINTK is not set
|
||||
CONFIG_CPLB_INFO=y
|
||||
CONFIG_ACCESS_CHECK=y
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
CONFIG_SECURITY=y
|
||||
# CONFIG_SECURITY_NETWORK is not set
|
||||
CONFIG_SECURITY_CAPABILITIES=y
|
||||
|
||||
#
|
||||
# Cryptographic options
|
||||
#
|
||||
# CONFIG_CRYPTO is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
CONFIG_CRC_CCITT=m
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
1373
arch/blackfin/configs/CM-BF548_defconfig
Normal file
1373
arch/blackfin/configs/CM-BF548_defconfig
Normal file
File diff suppressed because it is too large
Load Diff
876
arch/blackfin/configs/CM-BF561_defconfig
Normal file
876
arch/blackfin/configs/CM-BF561_defconfig
Normal file
@ -0,0 +1,876 @@
|
||||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.24.4
|
||||
# Tue Apr 1 10:50:11 2008
|
||||
#
|
||||
# CONFIG_MMU is not set
|
||||
# CONFIG_FPU is not set
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
|
||||
CONFIG_BLACKFIN=y
|
||||
CONFIG_ZONE_DMA=y
|
||||
CONFIG_SEMAPHORE_SLEEPERS=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
CONFIG_INIT_ENV_ARG_LIMIT=32
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_LOCALVERSION_AUTO=y
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_SYSVIPC_SYSCTL=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_USER_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
# CONFIG_CGROUPS is not set
|
||||
CONFIG_FAIR_GROUP_SCHED=y
|
||||
CONFIG_FAIR_USER_SCHED=y
|
||||
# CONFIG_FAIR_CGROUP_SCHED is not set
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
# CONFIG_RELAY is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_UID16 is not set
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
# CONFIG_HOTPLUG is not set
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
|
||||
# CONFIG_NP2 is not set
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_SLUB is not set
|
||||
# CONFIG_SLOB is not set
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
CONFIG_TINY_SHMEM=y
|
||||
CONFIG_BASE_SMALL=0
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_LSF is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
# CONFIG_IOSCHED_AS is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_DEFAULT_AS is not set
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
# CONFIG_DEFAULT_CFQ is not set
|
||||
CONFIG_DEFAULT_NOOP=y
|
||||
CONFIG_DEFAULT_IOSCHED="noop"
|
||||
CONFIG_PREEMPT_NONE=y
|
||||
# CONFIG_PREEMPT_VOLUNTARY is not set
|
||||
# CONFIG_PREEMPT is not set
|
||||
|
||||
#
|
||||
# Blackfin Processor Options
|
||||
#
|
||||
|
||||
#
|
||||
# Processor and Board Settings
|
||||
#
|
||||
# CONFIG_BF522 is not set
|
||||
# CONFIG_BF523 is not set
|
||||
# CONFIG_BF524 is not set
|
||||
# CONFIG_BF525 is not set
|
||||
# CONFIG_BF526 is not set
|
||||
# CONFIG_BF527 is not set
|
||||
# CONFIG_BF531 is not set
|
||||
# CONFIG_BF532 is not set
|
||||
# CONFIG_BF533 is not set
|
||||
# CONFIG_BF534 is not set
|
||||
# CONFIG_BF536 is not set
|
||||
# CONFIG_BF537 is not set
|
||||
# CONFIG_BF542 is not set
|
||||
# CONFIG_BF544 is not set
|
||||
# CONFIG_BF547 is not set
|
||||
# CONFIG_BF548 is not set
|
||||
# CONFIG_BF549 is not set
|
||||
CONFIG_BF561=y
|
||||
# CONFIG_BF_REV_0_0 is not set
|
||||
# CONFIG_BF_REV_0_1 is not set
|
||||
# CONFIG_BF_REV_0_2 is not set
|
||||
CONFIG_BF_REV_0_3=y
|
||||
# CONFIG_BF_REV_0_4 is not set
|
||||
# CONFIG_BF_REV_0_5 is not set
|
||||
# CONFIG_BF_REV_ANY is not set
|
||||
# CONFIG_BF_REV_NONE is not set
|
||||
CONFIG_BFIN_DUAL_CORE=y
|
||||
CONFIG_MEM_MT48LC8M32B2B5_7=y
|
||||
CONFIG_IRQ_PLL_WAKEUP=7
|
||||
CONFIG_IRQ_SPORT0_ERROR=7
|
||||
CONFIG_IRQ_SPORT1_ERROR=7
|
||||
CONFIG_IRQ_SPI_ERROR=7
|
||||
# CONFIG_BFIN561_EZKIT is not set
|
||||
# CONFIG_BFIN561_TEPLA is not set
|
||||
CONFIG_BFIN561_BLUETECHNIX_CM=y
|
||||
# CONFIG_GENERIC_BF561_BOARD is not set
|
||||
|
||||
#
|
||||
# BF561 Specific Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# Core B Support
|
||||
#
|
||||
|
||||
#
|
||||
# Core B Support
|
||||
#
|
||||
CONFIG_BF561_COREB=y
|
||||
# CONFIG_BF561_COREB_RESET is not set
|
||||
|
||||
#
|
||||
# Interrupt Priority Assignment
|
||||
#
|
||||
|
||||
#
|
||||
# Priority
|
||||
#
|
||||
CONFIG_IRQ_DMA1_ERROR=7
|
||||
CONFIG_IRQ_DMA2_ERROR=7
|
||||
CONFIG_IRQ_IMDMA_ERROR=7
|
||||
CONFIG_IRQ_PPI0_ERROR=7
|
||||
CONFIG_IRQ_PPI1_ERROR=7
|
||||
CONFIG_IRQ_UART_ERROR=7
|
||||
CONFIG_IRQ_RESERVED_ERROR=7
|
||||
CONFIG_IRQ_DMA1_0=8
|
||||
CONFIG_IRQ_DMA1_1=8
|
||||
CONFIG_IRQ_DMA1_2=8
|
||||
CONFIG_IRQ_DMA1_3=8
|
||||
CONFIG_IRQ_DMA1_4=8
|
||||
CONFIG_IRQ_DMA1_5=8
|
||||
CONFIG_IRQ_DMA1_6=8
|
||||
CONFIG_IRQ_DMA1_7=8
|
||||
CONFIG_IRQ_DMA1_8=8
|
||||
CONFIG_IRQ_DMA1_9=8
|
||||
CONFIG_IRQ_DMA1_10=8
|
||||
CONFIG_IRQ_DMA1_11=8
|
||||
CONFIG_IRQ_DMA2_0=9
|
||||
CONFIG_IRQ_DMA2_1=9
|
||||
CONFIG_IRQ_DMA2_2=9
|
||||
CONFIG_IRQ_DMA2_3=9
|
||||
CONFIG_IRQ_DMA2_4=9
|
||||
CONFIG_IRQ_DMA2_5=9
|
||||
CONFIG_IRQ_DMA2_6=9
|
||||
CONFIG_IRQ_DMA2_7=9
|
||||
CONFIG_IRQ_DMA2_8=9
|
||||
CONFIG_IRQ_DMA2_9=9
|
||||
CONFIG_IRQ_DMA2_10=9
|
||||
CONFIG_IRQ_DMA2_11=9
|
||||
CONFIG_IRQ_TIMER0=10
|
||||
CONFIG_IRQ_TIMER1=10
|
||||
CONFIG_IRQ_TIMER2=10
|
||||
CONFIG_IRQ_TIMER3=10
|
||||
CONFIG_IRQ_TIMER4=10
|
||||
CONFIG_IRQ_TIMER5=10
|
||||
CONFIG_IRQ_TIMER6=10
|
||||
CONFIG_IRQ_TIMER7=10
|
||||
CONFIG_IRQ_TIMER8=10
|
||||
CONFIG_IRQ_TIMER9=10
|
||||
CONFIG_IRQ_TIMER10=10
|
||||
CONFIG_IRQ_TIMER11=10
|
||||
CONFIG_IRQ_PROG0_INTA=11
|
||||
CONFIG_IRQ_PROG0_INTB=11
|
||||
CONFIG_IRQ_PROG1_INTA=11
|
||||
CONFIG_IRQ_PROG1_INTB=11
|
||||
CONFIG_IRQ_PROG2_INTA=11
|
||||
CONFIG_IRQ_PROG2_INTB=11
|
||||
CONFIG_IRQ_DMA1_WRRD0=8
|
||||
CONFIG_IRQ_DMA1_WRRD1=8
|
||||
CONFIG_IRQ_DMA2_WRRD0=9
|
||||
CONFIG_IRQ_DMA2_WRRD1=9
|
||||
CONFIG_IRQ_IMDMA_WRRD0=12
|
||||
CONFIG_IRQ_IMDMA_WRRD1=12
|
||||
CONFIG_IRQ_WDTIMER=13
|
||||
|
||||
#
|
||||
# Board customizations
|
||||
#
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
|
||||
#
|
||||
# Clock/PLL Setup
|
||||
#
|
||||
CONFIG_CLKIN_HZ=25000000
|
||||
# CONFIG_BFIN_KERNEL_CLOCK is not set
|
||||
CONFIG_MAX_VCO_HZ=600000000
|
||||
CONFIG_MIN_VCO_HZ=50000000
|
||||
CONFIG_MAX_SCLK_HZ=133333333
|
||||
CONFIG_MIN_SCLK_HZ=27000000
|
||||
|
||||
#
|
||||
# Kernel Timer/Scheduler
|
||||
#
|
||||
# CONFIG_HZ_100 is not set
|
||||
CONFIG_HZ_250=y
|
||||
# CONFIG_HZ_300 is not set
|
||||
# CONFIG_HZ_1000 is not set
|
||||
CONFIG_HZ=250
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
# CONFIG_CYCLES_CLOCKSOURCE is not set
|
||||
# CONFIG_TICK_ONESHOT is not set
|
||||
# CONFIG_NO_HZ is not set
|
||||
# CONFIG_HIGH_RES_TIMERS is not set
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
|
||||
#
|
||||
# Memory Setup
|
||||
#
|
||||
CONFIG_MAX_MEM_SIZE=32
|
||||
CONFIG_BOOT_LOAD=0x1000
|
||||
CONFIG_BFIN_SCRATCH_REG_RETN=y
|
||||
# CONFIG_BFIN_SCRATCH_REG_RETE is not set
|
||||
# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
|
||||
|
||||
#
|
||||
# Blackfin Kernel Optimizations
|
||||
#
|
||||
|
||||
#
|
||||
# Memory Optimizations
|
||||
#
|
||||
CONFIG_I_ENTRY_L1=y
|
||||
CONFIG_EXCPT_IRQ_SYSC_L1=y
|
||||
CONFIG_DO_IRQ_L1=y
|
||||
CONFIG_CORE_TIMER_IRQ_L1=y
|
||||
CONFIG_IDLE_L1=y
|
||||
CONFIG_SCHEDULE_L1=y
|
||||
CONFIG_ARITHMETIC_OPS_L1=y
|
||||
CONFIG_ACCESS_OK_L1=y
|
||||
CONFIG_MEMSET_L1=y
|
||||
CONFIG_MEMCPY_L1=y
|
||||
CONFIG_SYS_BFIN_SPINLOCK_L1=y
|
||||
CONFIG_IP_CHECKSUM_L1=y
|
||||
CONFIG_CACHELINE_ALIGNED_L1=y
|
||||
CONFIG_SYSCALL_TAB_L1=y
|
||||
CONFIG_CPLB_SWITCH_TAB_L1=y
|
||||
CONFIG_RAMKERNEL=y
|
||||
# CONFIG_ROMKERNEL is not set
|
||||
CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_DISCONTIGMEM_MANUAL is not set
|
||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_LARGE_ALLOCS=y
|
||||
# CONFIG_BFIN_GPTIMERS is not set
|
||||
CONFIG_BFIN_DMA_5XX=y
|
||||
# CONFIG_DMA_UNCACHED_2M is not set
|
||||
CONFIG_DMA_UNCACHED_1M=y
|
||||
# CONFIG_DMA_UNCACHED_NONE is not set
|
||||
|
||||
#
|
||||
# Cache Support
|
||||
#
|
||||
CONFIG_BFIN_ICACHE=y
|
||||
CONFIG_BFIN_DCACHE=y
|
||||
# CONFIG_BFIN_DCACHE_BANKA is not set
|
||||
# CONFIG_BFIN_ICACHE_LOCK is not set
|
||||
CONFIG_BFIN_WB=y
|
||||
# CONFIG_BFIN_WT is not set
|
||||
CONFIG_L1_MAX_PIECE=16
|
||||
# CONFIG_MPU is not set
|
||||
|
||||
#
|
||||
# Asynchonous Memory Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# EBIU_AMGCTL Global Control
|
||||
#
|
||||
CONFIG_C_AMCKEN=y
|
||||
CONFIG_C_CDPRIO=y
|
||||
CONFIG_C_B0PEN=y
|
||||
CONFIG_C_B1PEN=y
|
||||
CONFIG_C_B2PEN=y
|
||||
# CONFIG_C_B3PEN is not set
|
||||
# CONFIG_C_AMBEN is not set
|
||||
# CONFIG_C_AMBEN_B0 is not set
|
||||
# CONFIG_C_AMBEN_B0_B1 is not set
|
||||
# CONFIG_C_AMBEN_B0_B1_B2 is not set
|
||||
CONFIG_C_AMBEN_ALL=y
|
||||
|
||||
#
|
||||
# EBIU_AMBCTL Control
|
||||
#
|
||||
CONFIG_BANK_0=0x7BB0
|
||||
CONFIG_BANK_1=0x7BB0
|
||||
CONFIG_BANK_2=0x7BB0
|
||||
CONFIG_BANK_3=0xFFC3
|
||||
|
||||
#
|
||||
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
|
||||
#
|
||||
# CONFIG_PCI is not set
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
|
||||
#
|
||||
# Executable file formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF_FDPIC=y
|
||||
CONFIG_BINFMT_FLAT=y
|
||||
CONFIG_BINFMT_ZFLAT=y
|
||||
CONFIG_BINFMT_SHARED_FLAT=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
|
||||
#
|
||||
# Power management options
|
||||
#
|
||||
# CONFIG_PM is not set
|
||||
CONFIG_SUSPEND_UP_POSSIBLE=y
|
||||
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
||||
|
||||
#
|
||||
# Networking
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_PACKET=y
|
||||
# CONFIG_PACKET_MMAP is not set
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM=y
|
||||
# CONFIG_XFRM_USER is not set
|
||||
# CONFIG_XFRM_SUB_POLICY is not set
|
||||
# CONFIG_XFRM_MIGRATE is not set
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IP_MULTICAST is not set
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_FIB_HASH=y
|
||||
# CONFIG_IP_PNP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=y
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=y
|
||||
CONFIG_INET_XFRM_MODE_BEET=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_INET_DIAG=y
|
||||
CONFIG_INET_TCP_DIAG=y
|
||||
# CONFIG_TCP_CONG_ADVANCED is not set
|
||||
CONFIG_TCP_CONG_CUBIC=y
|
||||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||
# CONFIG_TCP_MD5SIG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_INET6_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET6_TUNNEL is not set
|
||||
# CONFIG_NETLABEL is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
# CONFIG_IP_DCCP is not set
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
# CONFIG_NET_SCHED is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
|
||||
#
|
||||
# Wireless
|
||||
#
|
||||
# CONFIG_CFG80211 is not set
|
||||
# CONFIG_WIRELESS_EXT is not set
|
||||
# CONFIG_MAC80211 is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
# CONFIG_NET_9P is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
# CONFIG_CONNECTOR is not set
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
# CONFIG_MTD_CMDLINE_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
# CONFIG_SSFDC is not set
|
||||
# CONFIG_MTD_OOPS is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
# CONFIG_MTD_CFI is not set
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
CONFIG_MTD_RAM=y
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_UCLINUX=y
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
# CONFIG_MTD_NAND is not set
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
# CONFIG_PARPORT is not set
|
||||
CONFIG_BLK_DEV=y
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
# CONFIG_BLK_DEV_LOOP is not set
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
CONFIG_MISC_DEVICES=y
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
# CONFIG_IDE is not set
|
||||
# CONFIG_BFIN_IDE_ADDRESS_MAPPING_MODE0 is not set
|
||||
# CONFIG_BFIN_IDE_ADDRESS_MAPPING_MODE1 is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
# CONFIG_SCSI is not set
|
||||
# CONFIG_SCSI_DMA is not set
|
||||
# CONFIG_SCSI_NETLINK is not set
|
||||
# CONFIG_ATA is not set
|
||||
# CONFIG_MD is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_NETDEVICES_MULTIQUEUE is not set
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_MACVLAN is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
# CONFIG_VETH is not set
|
||||
# CONFIG_PHYLIB is not set
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SMC91X=y
|
||||
# CONFIG_SMSC911X is not set
|
||||
# CONFIG_DM9000 is not set
|
||||
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_TAH is not set
|
||||
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
|
||||
# CONFIG_B44 is not set
|
||||
CONFIG_NETDEV_1000=y
|
||||
# CONFIG_AX88180 is not set
|
||||
CONFIG_NETDEV_10000=y
|
||||
|
||||
#
|
||||
# Wireless LAN
|
||||
#
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
# CONFIG_ISDN is not set
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
# CONFIG_INPUT is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
# CONFIG_AD9960 is not set
|
||||
# CONFIG_SPI_ADC_BF533 is not set
|
||||
# CONFIG_BF5xx_PPIFCD is not set
|
||||
# CONFIG_BFIN_SIMPLE_TIMER is not set
|
||||
# CONFIG_BF5xx_PPI is not set
|
||||
# CONFIG_BFIN_SPORT is not set
|
||||
# CONFIG_BFIN_TIMER_LATENCY is not set
|
||||
# CONFIG_SIMPLE_GPIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
CONFIG_SERIAL_BFIN=y
|
||||
CONFIG_SERIAL_BFIN_CONSOLE=y
|
||||
CONFIG_SERIAL_BFIN_DMA=y
|
||||
# CONFIG_SERIAL_BFIN_PIO is not set
|
||||
CONFIG_SERIAL_BFIN_UART0=y
|
||||
# CONFIG_BFIN_UART0_CTSRTS is not set
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_BFIN_SPORT is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# CAN, the car bus and industrial fieldbus
|
||||
#
|
||||
# CONFIG_CAN4LINUX is not set
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_GEN_RTC is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
# CONFIG_TCG_TPM is not set
|
||||
# CONFIG_I2C is not set
|
||||
|
||||
#
|
||||
# SPI support
|
||||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
# CONFIG_W1 is not set
|
||||
# CONFIG_POWER_SUPPLY is not set
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_F71882FG is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_SENSORS_W83627EHF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
|
||||
#
|
||||
# Sonics Silicon Backplane
|
||||
#
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
# CONFIG_SSB is not set
|
||||
|
||||
#
|
||||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
CONFIG_DAB=y
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_VGASTATE is not set
|
||||
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
|
||||
# CONFIG_FB is not set
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Display device support
|
||||
#
|
||||
# CONFIG_DISPLAY_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
# CONFIG_USB_ARCH_HAS_OHCI is not set
|
||||
# CONFIG_USB_ARCH_HAS_EHCI is not set
|
||||
# CONFIG_USB is not set
|
||||
|
||||
#
|
||||
# Enable Host or Gadget support to see Inventra options
|
||||
#
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
#
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
# CONFIG_MMC is not set
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
|
||||
#
|
||||
# Userspace I/O
|
||||
#
|
||||
# CONFIG_UIO is not set
|
||||
|
||||
#
|
||||
# PBX support
|
||||
#
|
||||
# CONFIG_PBX is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
# CONFIG_EXT2_FS_POSIX_ACL is not set
|
||||
# CONFIG_EXT2_FS_SECURITY is not set
|
||||
# CONFIG_EXT3_FS is not set
|
||||
# CONFIG_EXT4DEV_FS is not set
|
||||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_SYSFS=y
|
||||
# CONFIG_TMPFS is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_YAFFS_FS is not set
|
||||
# CONFIG_JFFS2_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
CONFIG_NETWORK_FILESYSTEMS=y
|
||||
# CONFIG_NFS_FS is not set
|
||||
# CONFIG_NFSD is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
# CONFIG_CIFS is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
# CONFIG_NLS is not set
|
||||
# CONFIG_DLM is not set
|
||||
CONFIG_INSTRUMENTATION=y
|
||||
# CONFIG_PROFILING is not set
|
||||
# CONFIG_MARKERS is not set
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_WARN_DEPRECATED=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
# CONFIG_MAGIC_SYSRQ is not set
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
# CONFIG_DEBUG_MMRS is not set
|
||||
CONFIG_DEBUG_HUNT_FOR_ZERO=y
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
|
||||
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
|
||||
# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
|
||||
# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
|
||||
# CONFIG_EARLY_PRINTK is not set
|
||||
# CONFIG_DUAL_CORE_TEST_MODULE is not set
|
||||
CONFIG_CPLB_INFO=y
|
||||
CONFIG_ACCESS_CHECK=y
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
CONFIG_SECURITY=y
|
||||
# CONFIG_SECURITY_NETWORK is not set
|
||||
CONFIG_SECURITY_CAPABILITIES=y
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
# CONFIG_CRYPTO is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
CONFIG_CRC_CCITT=m
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_CRC7 is not set
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
# CONFIG_GENERIC_TIME is not set
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
@ -207,7 +207,7 @@ CONFIG_HZ=250
|
||||
#
|
||||
# Memory Setup
|
||||
#
|
||||
CONFIG_MEM_SIZE=32
|
||||
CONFIG_MAX_MEM_SIZE=32
|
||||
CONFIG_MEM_ADD_WIDTH=9
|
||||
CONFIG_BOOT_LOAD=0x1000
|
||||
CONFIG_BFIN_SCRATCH_REG_RETN=y
|
||||
|
||||
1252
arch/blackfin/configs/IP0X_defconfig
Normal file
1252
arch/blackfin/configs/IP0X_defconfig
Normal file
File diff suppressed because it is too large
Load Diff
@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
# CONFIG_GENERIC_TIME is not set
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
@ -214,7 +214,7 @@ CONFIG_HZ=250
|
||||
#
|
||||
# Memory Setup
|
||||
#
|
||||
CONFIG_MEM_SIZE=64
|
||||
CONFIG_MAX_MEM_SIZE=64
|
||||
CONFIG_MEM_ADD_WIDTH=10
|
||||
CONFIG_BOOT_LOAD=0x1000
|
||||
CONFIG_BFIN_SCRATCH_REG_RETN=y
|
||||
|
||||
1290
arch/blackfin/configs/SRV1_defconfig
Normal file
1290
arch/blackfin/configs/SRV1_defconfig
Normal file
File diff suppressed because it is too large
Load Diff
@ -6,9 +6,15 @@ extra-y := init_task.o vmlinux.lds
|
||||
|
||||
obj-y := \
|
||||
entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
|
||||
sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \
|
||||
sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \
|
||||
fixed_code.o reboot.o bfin_gpio.o
|
||||
|
||||
ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y)
|
||||
obj-y += time-ts.o
|
||||
else
|
||||
obj-y += time.o
|
||||
endif
|
||||
|
||||
obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
|
||||
obj-$(CONFIG_MODULES) += module.o
|
||||
obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o
|
||||
|
||||
@ -67,7 +67,7 @@ static int __init blackfin_dma_init(void)
|
||||
|
||||
for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) {
|
||||
dma_ch[i].chan_status = DMA_CHANNEL_FREE;
|
||||
dma_ch[i].regs = base_addr[i];
|
||||
dma_ch[i].regs = dma_io_base_addr[i];
|
||||
mutex_init(&(dma_ch[i].dmalock));
|
||||
}
|
||||
/* Mark MEMDMA Channel 0 as requested since we're using it internally */
|
||||
@ -106,12 +106,15 @@ int request_dma(unsigned int channel, char *device_id)
|
||||
|
||||
#ifdef CONFIG_BF54x
|
||||
if (channel >= CH_UART2_RX && channel <= CH_UART3_TX) {
|
||||
if (strncmp(device_id, "BFIN_UART", 9) == 0)
|
||||
if (strncmp(device_id, "BFIN_UART", 9) == 0) {
|
||||
dma_ch[channel].regs->peripheral_map &= 0x0FFF;
|
||||
dma_ch[channel].regs->peripheral_map |=
|
||||
(channel - CH_UART2_RX + 0xC);
|
||||
else
|
||||
((channel - CH_UART2_RX + 0xC)<<12);
|
||||
} else {
|
||||
dma_ch[channel].regs->peripheral_map &= 0x0FFF;
|
||||
dma_ch[channel].regs->peripheral_map |=
|
||||
(channel - CH_UART2_RX + 0x6);
|
||||
((channel - CH_UART2_RX + 0x6)<<12);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@ -95,14 +95,14 @@ enum {
|
||||
AWA_data_clear = SYSCR,
|
||||
AWA_data_set = SYSCR,
|
||||
AWA_toggle = SYSCR,
|
||||
AWA_maska = UART_SCR,
|
||||
AWA_maska_clear = UART_SCR,
|
||||
AWA_maska_set = UART_SCR,
|
||||
AWA_maska_toggle = UART_SCR,
|
||||
AWA_maskb = UART_GCTL,
|
||||
AWA_maskb_clear = UART_GCTL,
|
||||
AWA_maskb_set = UART_GCTL,
|
||||
AWA_maskb_toggle = UART_GCTL,
|
||||
AWA_maska = BFIN_UART_SCR,
|
||||
AWA_maska_clear = BFIN_UART_SCR,
|
||||
AWA_maska_set = BFIN_UART_SCR,
|
||||
AWA_maska_toggle = BFIN_UART_SCR,
|
||||
AWA_maskb = BFIN_UART_GCTL,
|
||||
AWA_maskb_clear = BFIN_UART_GCTL,
|
||||
AWA_maskb_set = BFIN_UART_GCTL,
|
||||
AWA_maskb_toggle = BFIN_UART_GCTL,
|
||||
AWA_dir = SPORT1_STAT,
|
||||
AWA_polar = SPORT1_STAT,
|
||||
AWA_edge = SPORT1_STAT,
|
||||
@ -348,11 +348,10 @@ static void portmux_setup(unsigned short per, unsigned short function)
|
||||
offset = port_mux_lut[y].offset;
|
||||
muxreg = bfin_read_PORT_MUX();
|
||||
|
||||
if (offset != 1) {
|
||||
if (offset != 1)
|
||||
muxreg &= ~(1 << offset);
|
||||
} else {
|
||||
else
|
||||
muxreg &= ~(3 << 1);
|
||||
}
|
||||
|
||||
muxreg |= (function << offset);
|
||||
bfin_write_PORT_MUX(muxreg);
|
||||
@ -396,39 +395,11 @@ inline void portmux_setup(unsigned short portno, unsigned short function)
|
||||
# define portmux_setup(...) do { } while (0)
|
||||
#endif
|
||||
|
||||
#ifndef BF548_FAMILY
|
||||
static void default_gpio(unsigned gpio)
|
||||
{
|
||||
unsigned short bank, bitmask;
|
||||
unsigned long flags;
|
||||
|
||||
bank = gpio_bank(gpio);
|
||||
bitmask = gpio_bit(gpio);
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
gpio_bankb[bank]->maska_clear = bitmask;
|
||||
gpio_bankb[bank]->maskb_clear = bitmask;
|
||||
SSYNC();
|
||||
gpio_bankb[bank]->inen &= ~bitmask;
|
||||
gpio_bankb[bank]->dir &= ~bitmask;
|
||||
gpio_bankb[bank]->polar &= ~bitmask;
|
||||
gpio_bankb[bank]->both &= ~bitmask;
|
||||
gpio_bankb[bank]->edge &= ~bitmask;
|
||||
AWA_DUMMY_READ(edge);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
#else
|
||||
# define default_gpio(...) do { } while (0)
|
||||
#endif
|
||||
|
||||
static int __init bfin_gpio_init(void)
|
||||
{
|
||||
|
||||
printk(KERN_INFO "Blackfin GPIO Controller\n");
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
arch_initcall(bfin_gpio_init);
|
||||
|
||||
@ -821,10 +792,10 @@ int peripheral_request(unsigned short per, const char *label)
|
||||
local_irq_save(flags);
|
||||
|
||||
if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
|
||||
dump_stack();
|
||||
printk(KERN_ERR
|
||||
"%s: Peripheral %d is already reserved as GPIO by %s !\n",
|
||||
__FUNCTION__, ident, get_label(ident));
|
||||
dump_stack();
|
||||
__func__, ident, get_label(ident));
|
||||
local_irq_restore(flags);
|
||||
return -EBUSY;
|
||||
}
|
||||
@ -833,31 +804,31 @@ int peripheral_request(unsigned short per, const char *label)
|
||||
|
||||
u16 funct = get_portmux(ident);
|
||||
|
||||
/*
|
||||
* Pin functions like AMC address strobes my
|
||||
* be requested and used by several drivers
|
||||
*/
|
||||
/*
|
||||
* Pin functions like AMC address strobes my
|
||||
* be requested and used by several drivers
|
||||
*/
|
||||
|
||||
if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
|
||||
|
||||
/*
|
||||
* Allow that the identical pin function can
|
||||
* be requested from the same driver twice
|
||||
*/
|
||||
/*
|
||||
* Allow that the identical pin function can
|
||||
* be requested from the same driver twice
|
||||
*/
|
||||
|
||||
if (cmp_label(ident, label) == 0)
|
||||
goto anyway;
|
||||
if (cmp_label(ident, label) == 0)
|
||||
goto anyway;
|
||||
|
||||
dump_stack();
|
||||
printk(KERN_ERR
|
||||
"%s: Peripheral %d function %d is already reserved by %s !\n",
|
||||
__FUNCTION__, ident, P_FUNCT2MUX(per), get_label(ident));
|
||||
dump_stack();
|
||||
__func__, ident, P_FUNCT2MUX(per), get_label(ident));
|
||||
local_irq_restore(flags);
|
||||
return -EBUSY;
|
||||
}
|
||||
}
|
||||
|
||||
anyway:
|
||||
anyway:
|
||||
reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
|
||||
|
||||
portmux_setup(ident, P_FUNCT2MUX(per));
|
||||
@ -890,47 +861,47 @@ int peripheral_request(unsigned short per, const char *label)
|
||||
|
||||
if (!check_gpio(ident)) {
|
||||
|
||||
if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
|
||||
printk(KERN_ERR
|
||||
"%s: Peripheral %d is already reserved as GPIO by %s !\n",
|
||||
__FUNCTION__, ident, get_label(ident));
|
||||
dump_stack();
|
||||
local_irq_restore(flags);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
|
||||
|
||||
/*
|
||||
* Pin functions like AMC address strobes my
|
||||
* be requested and used by several drivers
|
||||
*/
|
||||
|
||||
if (!(per & P_MAYSHARE)) {
|
||||
|
||||
/*
|
||||
* Allow that the identical pin function can
|
||||
* be requested from the same driver twice
|
||||
*/
|
||||
|
||||
if (cmp_label(ident, label) == 0)
|
||||
goto anyway;
|
||||
|
||||
printk(KERN_ERR
|
||||
"%s: Peripheral %d function %d is already"
|
||||
" reserved by %s !\n",
|
||||
__FUNCTION__, ident, P_FUNCT2MUX(per),
|
||||
get_label(ident));
|
||||
if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
|
||||
dump_stack();
|
||||
printk(KERN_ERR
|
||||
"%s: Peripheral %d is already reserved as GPIO by %s !\n",
|
||||
__func__, ident, get_label(ident));
|
||||
local_irq_restore(flags);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
anyway:
|
||||
if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
|
||||
|
||||
/*
|
||||
* Pin functions like AMC address strobes my
|
||||
* be requested and used by several drivers
|
||||
*/
|
||||
|
||||
if (!(per & P_MAYSHARE)) {
|
||||
|
||||
/*
|
||||
* Allow that the identical pin function can
|
||||
* be requested from the same driver twice
|
||||
*/
|
||||
|
||||
if (cmp_label(ident, label) == 0)
|
||||
goto anyway;
|
||||
|
||||
dump_stack();
|
||||
printk(KERN_ERR
|
||||
"%s: Peripheral %d function %d is already"
|
||||
" reserved by %s !\n",
|
||||
__func__, ident, P_FUNCT2MUX(per),
|
||||
get_label(ident));
|
||||
local_irq_restore(flags);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
anyway:
|
||||
portmux_setup(per, P_FUNCT2MUX(per));
|
||||
|
||||
port_setup(ident, PERIPHERAL_USAGE);
|
||||
@ -944,7 +915,7 @@ int peripheral_request(unsigned short per, const char *label)
|
||||
EXPORT_SYMBOL(peripheral_request);
|
||||
#endif
|
||||
|
||||
int peripheral_request_list(unsigned short per[], const char *label)
|
||||
int peripheral_request_list(const unsigned short per[], const char *label)
|
||||
{
|
||||
u16 cnt;
|
||||
int ret;
|
||||
@ -954,10 +925,10 @@ int peripheral_request_list(unsigned short per[], const char *label)
|
||||
ret = peripheral_request(per[cnt], label);
|
||||
|
||||
if (ret < 0) {
|
||||
for ( ; cnt > 0; cnt--) {
|
||||
for ( ; cnt > 0; cnt--)
|
||||
peripheral_free(per[cnt - 1]);
|
||||
}
|
||||
return ret;
|
||||
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
@ -981,15 +952,13 @@ void peripheral_free(unsigned short per)
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
if (unlikely(!(reserved_peri_map[gpio_bank(ident)]
|
||||
& gpio_bit(ident)))) {
|
||||
if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
|
||||
local_irq_restore(flags);
|
||||
return;
|
||||
}
|
||||
|
||||
if (!(per & P_MAYSHARE)) {
|
||||
if (!(per & P_MAYSHARE))
|
||||
port_setup(ident, GPIO_USAGE);
|
||||
}
|
||||
|
||||
reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
|
||||
|
||||
@ -999,14 +968,11 @@ void peripheral_free(unsigned short per)
|
||||
}
|
||||
EXPORT_SYMBOL(peripheral_free);
|
||||
|
||||
void peripheral_free_list(unsigned short per[])
|
||||
void peripheral_free_list(const unsigned short per[])
|
||||
{
|
||||
u16 cnt;
|
||||
|
||||
for (cnt = 0; per[cnt] != 0; cnt++) {
|
||||
for (cnt = 0; per[cnt] != 0; cnt++)
|
||||
peripheral_free(per[cnt]);
|
||||
}
|
||||
|
||||
}
|
||||
EXPORT_SYMBOL(peripheral_free_list);
|
||||
|
||||
@ -1046,17 +1012,17 @@ int gpio_request(unsigned gpio, const char *label)
|
||||
}
|
||||
|
||||
if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
|
||||
dump_stack();
|
||||
printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
|
||||
gpio, get_label(gpio));
|
||||
dump_stack();
|
||||
local_irq_restore(flags);
|
||||
return -EBUSY;
|
||||
}
|
||||
if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
|
||||
dump_stack();
|
||||
printk(KERN_ERR
|
||||
"bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
|
||||
gpio, get_label(gpio));
|
||||
dump_stack();
|
||||
local_irq_restore(flags);
|
||||
return -EBUSY;
|
||||
}
|
||||
@ -1082,14 +1048,12 @@ void gpio_free(unsigned gpio)
|
||||
local_irq_save(flags);
|
||||
|
||||
if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
|
||||
gpio_error(gpio);
|
||||
dump_stack();
|
||||
gpio_error(gpio);
|
||||
local_irq_restore(flags);
|
||||
return;
|
||||
}
|
||||
|
||||
default_gpio(gpio);
|
||||
|
||||
reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
|
||||
|
||||
set_label(gpio, "free");
|
||||
@ -1152,6 +1116,18 @@ int gpio_get_value(unsigned gpio)
|
||||
}
|
||||
EXPORT_SYMBOL(gpio_get_value);
|
||||
|
||||
void bfin_gpio_irq_prepare(unsigned gpio)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
port_setup(gpio, GPIO_USAGE);
|
||||
|
||||
local_irq_save(flags);
|
||||
gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
|
||||
gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
int gpio_direction_input(unsigned gpio)
|
||||
@ -1218,6 +1194,11 @@ void bfin_gpio_reset_spi0_ssel1(void)
|
||||
udelay(1);
|
||||
}
|
||||
|
||||
void bfin_gpio_irq_prepare(unsigned gpio)
|
||||
{
|
||||
port_setup(gpio, GPIO_USAGE);
|
||||
}
|
||||
|
||||
#endif /*BF548_FAMILY */
|
||||
|
||||
#if defined(CONFIG_PROC_FS)
|
||||
|
||||
@ -39,14 +39,6 @@
|
||||
#include <asm/cplbinit.h>
|
||||
#include <asm/blackfin.h>
|
||||
|
||||
#define CPLB_I 1
|
||||
#define CPLB_D 2
|
||||
|
||||
#define SYNC_SYS SSYNC()
|
||||
#define SYNC_CORE CSYNC()
|
||||
|
||||
#define CPLB_BIT_PAGESIZE 0x30000
|
||||
|
||||
static char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" };
|
||||
|
||||
static char *cplb_print_entry(char *buf, struct cplb_entry *tbl, int switched)
|
||||
|
||||
@ -43,13 +43,15 @@ void __init generate_cpl_tables(void)
|
||||
unsigned long d_data, i_data;
|
||||
unsigned long d_cache = 0, i_cache = 0;
|
||||
|
||||
printk(KERN_INFO "MPU: setting up cplb tables with memory protection\n");
|
||||
|
||||
#ifdef CONFIG_BFIN_ICACHE
|
||||
i_cache = CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BFIN_DCACHE
|
||||
d_cache = CPLB_L1_CHBL;
|
||||
#ifdef CONFIG_BLKFIN_WT
|
||||
#ifdef CONFIG_BFIN_WT
|
||||
d_cache |= CPLB_L1_AOW | CPLB_WT;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@ -24,8 +24,6 @@
|
||||
#include <asm/cplbinit.h>
|
||||
#include <asm/mmu_context.h>
|
||||
|
||||
#ifdef CONFIG_BFIN_ICACHE
|
||||
|
||||
#define FAULT_RW (1 << 16)
|
||||
#define FAULT_USERSUPV (1 << 17)
|
||||
|
||||
@ -143,30 +141,48 @@ static noinline int dcplb_miss(void)
|
||||
unsigned long d_data;
|
||||
|
||||
nr_dcplb_miss++;
|
||||
if (addr >= _ramend)
|
||||
return CPLB_PROT_VIOL;
|
||||
|
||||
d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
|
||||
#ifdef CONFIG_BFIN_DCACHE
|
||||
d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
|
||||
#ifdef CONFIG_BLKFIN_WT
|
||||
d_data |= CPLB_L1_AOW | CPLB_WT;
|
||||
if (addr < _ramend - DMA_UNCACHED_REGION ||
|
||||
(reserved_mem_dcache_on && addr >= _ramend &&
|
||||
addr < physical_mem_end)) {
|
||||
d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
|
||||
#ifdef CONFIG_BFIN_WT
|
||||
d_data |= CPLB_L1_AOW | CPLB_WT;
|
||||
#endif
|
||||
#endif
|
||||
mask = current_rwx_mask;
|
||||
if (mask) {
|
||||
int page = addr >> PAGE_SHIFT;
|
||||
int offs = page >> 5;
|
||||
int bit = 1 << (page & 31);
|
||||
|
||||
if (mask[offs] & bit)
|
||||
d_data |= CPLB_USER_RD;
|
||||
|
||||
mask += page_mask_nelts;
|
||||
if (mask[offs] & bit)
|
||||
d_data |= CPLB_USER_WR;
|
||||
}
|
||||
#endif
|
||||
if (addr >= physical_mem_end) {
|
||||
if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE
|
||||
&& (status & FAULT_USERSUPV)) {
|
||||
addr &= ~0x3fffff;
|
||||
d_data &= ~PAGE_SIZE_4KB;
|
||||
d_data |= PAGE_SIZE_4MB;
|
||||
} else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
|
||||
&& (status & (FAULT_RW | FAULT_USERSUPV)) == FAULT_USERSUPV) {
|
||||
addr &= ~(1 * 1024 * 1024 - 1);
|
||||
d_data &= ~PAGE_SIZE_4KB;
|
||||
d_data |= PAGE_SIZE_1MB;
|
||||
} else
|
||||
return CPLB_PROT_VIOL;
|
||||
} else if (addr >= _ramend) {
|
||||
d_data |= CPLB_USER_RD | CPLB_USER_WR;
|
||||
} else {
|
||||
mask = current_rwx_mask;
|
||||
if (mask) {
|
||||
int page = addr >> PAGE_SHIFT;
|
||||
int offs = page >> 5;
|
||||
int bit = 1 << (page & 31);
|
||||
|
||||
if (mask[offs] & bit)
|
||||
d_data |= CPLB_USER_RD;
|
||||
|
||||
mask += page_mask_nelts;
|
||||
if (mask[offs] & bit)
|
||||
d_data |= CPLB_USER_WR;
|
||||
}
|
||||
}
|
||||
idx = evict_one_dcplb();
|
||||
|
||||
addr &= PAGE_MASK;
|
||||
@ -189,12 +205,14 @@ static noinline int icplb_miss(void)
|
||||
unsigned long i_data;
|
||||
|
||||
nr_icplb_miss++;
|
||||
|
||||
/* If inside the uncached DMA region, fault. */
|
||||
if (addr >= _ramend - DMA_UNCACHED_REGION && addr < _ramend)
|
||||
return CPLB_PROT_VIOL;
|
||||
|
||||
if (status & FAULT_USERSUPV)
|
||||
nr_icplb_supv_miss++;
|
||||
|
||||
if (addr >= _ramend)
|
||||
return CPLB_PROT_VIOL;
|
||||
|
||||
/*
|
||||
* First, try to find a CPLB that matches this address. If we
|
||||
* find one, then the fact that we're in the miss handler means
|
||||
@ -211,30 +229,48 @@ static noinline int icplb_miss(void)
|
||||
}
|
||||
|
||||
i_data = CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4KB;
|
||||
|
||||
#ifdef CONFIG_BFIN_ICACHE
|
||||
i_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
|
||||
/*
|
||||
* Normal RAM, and possibly the reserved memory area, are
|
||||
* cacheable.
|
||||
*/
|
||||
if (addr < _ramend ||
|
||||
(addr < physical_mem_end && reserved_mem_icache_on))
|
||||
i_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Two cases to distinguish - a supervisor access must necessarily
|
||||
* be for a module page; we grant it unconditionally (could do better
|
||||
* here in the future). Otherwise, check the x bitmap of the current
|
||||
* process.
|
||||
*/
|
||||
if (!(status & FAULT_USERSUPV)) {
|
||||
unsigned long *mask = current_rwx_mask;
|
||||
if (addr >= physical_mem_end) {
|
||||
if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
|
||||
&& (status & FAULT_USERSUPV)) {
|
||||
addr &= ~(1 * 1024 * 1024 - 1);
|
||||
i_data &= ~PAGE_SIZE_4KB;
|
||||
i_data |= PAGE_SIZE_1MB;
|
||||
} else
|
||||
return CPLB_PROT_VIOL;
|
||||
} else if (addr >= _ramend) {
|
||||
i_data |= CPLB_USER_RD;
|
||||
} else {
|
||||
/*
|
||||
* Two cases to distinguish - a supervisor access must
|
||||
* necessarily be for a module page; we grant it
|
||||
* unconditionally (could do better here in the future).
|
||||
* Otherwise, check the x bitmap of the current process.
|
||||
*/
|
||||
if (!(status & FAULT_USERSUPV)) {
|
||||
unsigned long *mask = current_rwx_mask;
|
||||
|
||||
if (mask) {
|
||||
int page = addr >> PAGE_SHIFT;
|
||||
int offs = page >> 5;
|
||||
int bit = 1 << (page & 31);
|
||||
if (mask) {
|
||||
int page = addr >> PAGE_SHIFT;
|
||||
int offs = page >> 5;
|
||||
int bit = 1 << (page & 31);
|
||||
|
||||
mask += 2 * page_mask_nelts;
|
||||
if (mask[offs] & bit)
|
||||
i_data |= CPLB_USER_RD;
|
||||
mask += 2 * page_mask_nelts;
|
||||
if (mask[offs] & bit)
|
||||
i_data |= CPLB_USER_RD;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
idx = evict_one_icplb();
|
||||
addr &= PAGE_MASK;
|
||||
icplb_tbl[idx].addr = addr;
|
||||
@ -250,7 +286,6 @@ static noinline int icplb_miss(void)
|
||||
|
||||
static noinline int dcplb_protection_fault(void)
|
||||
{
|
||||
unsigned long addr = bfin_read_DCPLB_FAULT_ADDR();
|
||||
int status = bfin_read_DCPLB_STATUS();
|
||||
|
||||
nr_dcplb_prot++;
|
||||
@ -280,8 +315,7 @@ int cplb_hdr(int seqstat, struct pt_regs *regs)
|
||||
case 0x26:
|
||||
return dcplb_miss();
|
||||
default:
|
||||
return 1;
|
||||
panic_cplb_error(seqstat, regs);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
@ -299,7 +333,7 @@ void flush_switched_cplbs(void)
|
||||
enable_icplb();
|
||||
|
||||
disable_dcplb();
|
||||
for (i = first_mask_dcplb; i < MAX_CPLBS; i++) {
|
||||
for (i = first_switched_dcplb; i < MAX_CPLBS; i++) {
|
||||
dcplb_tbl[i].data = 0;
|
||||
bfin_write32(DCPLB_DATA0 + i * 4, 0);
|
||||
}
|
||||
@ -319,7 +353,7 @@ void set_mask_dcplbs(unsigned long *masks)
|
||||
d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
|
||||
#ifdef CONFIG_BFIN_DCACHE
|
||||
d_data |= CPLB_L1_CHBL;
|
||||
#ifdef CONFIG_BLKFIN_WT
|
||||
#ifdef CONFIG_BFIN_WT
|
||||
d_data |= CPLB_L1_AOW | CPLB_WT;
|
||||
#endif
|
||||
#endif
|
||||
@ -334,5 +368,3 @@ void set_mask_dcplbs(unsigned long *masks)
|
||||
}
|
||||
enable_dcplb();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@ -33,9 +33,7 @@
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
||||
#include <asm/current.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/cplb.h>
|
||||
#include <asm/cplbinit.h>
|
||||
#include <asm/blackfin.h>
|
||||
|
||||
#define CPLB_I 1
|
||||
@ -174,16 +172,6 @@ static int cplbinfo_read_proc(char *page, char **start, off_t off,
|
||||
return len;
|
||||
}
|
||||
|
||||
static int cplbinfo_write_proc(struct file *file, const char __user *buffer,
|
||||
unsigned long count, void *data)
|
||||
{
|
||||
printk(KERN_INFO "Reset the CPLB swap in/out counts.\n");
|
||||
memset(ipdt_swapcount_table, 0, MAX_SWITCH_I_CPLBS * sizeof(unsigned long));
|
||||
memset(dpdt_swapcount_table, 0, MAX_SWITCH_D_CPLBS * sizeof(unsigned long));
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static int __init cplbinfo_init(void)
|
||||
{
|
||||
struct proc_dir_entry *entry;
|
||||
@ -193,7 +181,6 @@ static int __init cplbinfo_init(void)
|
||||
return -ENOMEM;
|
||||
|
||||
entry->read_proc = cplbinfo_read_proc;
|
||||
entry->write_proc = cplbinfo_write_proc;
|
||||
entry->data = NULL;
|
||||
|
||||
return 0;
|
||||
|
||||
@ -26,6 +26,35 @@
|
||||
#include <asm/cplb.h>
|
||||
#include <asm/cplbinit.h>
|
||||
|
||||
#ifdef CONFIG_MAX_MEM_SIZE
|
||||
# define CPLB_MEM CONFIG_MAX_MEM_SIZE
|
||||
#else
|
||||
# define CPLB_MEM CONFIG_MEM_SIZE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Number of required data CPLB switchtable entries
|
||||
* MEMSIZE / 4 (we mostly install 4M page size CPLBs
|
||||
* approx 16 for smaller 1MB page size CPLBs for allignment purposes
|
||||
* 1 for L1 Data Memory
|
||||
* possibly 1 for L2 Data Memory
|
||||
* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
|
||||
* 1 for ASYNC Memory
|
||||
*/
|
||||
#define MAX_SWITCH_D_CPLBS (((CPLB_MEM / 4) + 16 + 1 + 1 + 1 \
|
||||
+ ASYNC_MEMORY_CPLB_COVERAGE) * 2)
|
||||
|
||||
/*
|
||||
* Number of required instruction CPLB switchtable entries
|
||||
* MEMSIZE / 4 (we mostly install 4M page size CPLBs
|
||||
* approx 12 for smaller 1MB page size CPLBs for allignment purposes
|
||||
* 1 for L1 Instruction Memory
|
||||
* possibly 1 for L2 Instruction Memory
|
||||
* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
|
||||
*/
|
||||
#define MAX_SWITCH_I_CPLBS (((CPLB_MEM / 4) + 12 + 1 + 1 + 1) * 2)
|
||||
|
||||
|
||||
u_long icplb_table[MAX_CPLBS + 1];
|
||||
u_long dcplb_table[MAX_CPLBS + 1];
|
||||
|
||||
@ -295,6 +324,8 @@ void __init generate_cpl_tables(void)
|
||||
struct cplb_tab *t_d = NULL;
|
||||
struct s_cplb cplb;
|
||||
|
||||
printk(KERN_INFO "NOMPU: setting up cplb tables for global access\n");
|
||||
|
||||
cplb.init_i.size = MAX_CPLBS;
|
||||
cplb.init_d.size = MAX_CPLBS;
|
||||
cplb.switch_i.size = MAX_SWITCH_I_CPLBS;
|
||||
|
||||
@ -59,7 +59,7 @@ void dma_alloc_init(unsigned long start, unsigned long end)
|
||||
memset((void *)dma_base, 0, DMA_UNCACHED_REGION);
|
||||
dma_initialized = 1;
|
||||
|
||||
printk(KERN_INFO "%s: dma_page @ 0x%p - %d pages at 0x%08lx\n", __FUNCTION__,
|
||||
printk(KERN_INFO "%s: dma_page @ 0x%p - %d pages at 0x%08lx\n", __func__,
|
||||
dma_page, dma_pages, dma_base);
|
||||
}
|
||||
|
||||
@ -100,7 +100,7 @@ static void __free_dma_pages(unsigned long addr, unsigned int pages)
|
||||
int i;
|
||||
|
||||
if ((page + pages) > dma_pages) {
|
||||
printk(KERN_ERR "%s: freeing outside range.\n", __FUNCTION__);
|
||||
printk(KERN_ERR "%s: freeing outside range.\n", __func__);
|
||||
BUG();
|
||||
}
|
||||
|
||||
|
||||
@ -52,12 +52,14 @@ static volatile GPTIMER_timer_regs *const timer_regs[MAX_BLACKFIN_GPTIMERS] =
|
||||
(GPTIMER_timer_regs *)TIMER5_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER6_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER7_CONFIG,
|
||||
#endif
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
# if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
(GPTIMER_timer_regs *)TIMER8_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER9_CONFIG,
|
||||
(GPTIMER_timer_regs *)TIMER10_CONFIG,
|
||||
# if (MAX_BLACKFIN_GPTIMERS > 11)
|
||||
(GPTIMER_timer_regs *)TIMER11_CONFIG,
|
||||
# endif
|
||||
# endif
|
||||
#endif
|
||||
};
|
||||
|
||||
@ -80,12 +82,14 @@ static uint32_t const trun_mask[MAX_BLACKFIN_GPTIMERS] =
|
||||
TIMER_STATUS_TRUN5,
|
||||
TIMER_STATUS_TRUN6,
|
||||
TIMER_STATUS_TRUN7,
|
||||
#endif
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
# if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
TIMER_STATUS_TRUN8,
|
||||
TIMER_STATUS_TRUN9,
|
||||
TIMER_STATUS_TRUN10,
|
||||
# if (MAX_BLACKFIN_GPTIMERS > 11)
|
||||
TIMER_STATUS_TRUN11,
|
||||
# endif
|
||||
# endif
|
||||
#endif
|
||||
};
|
||||
|
||||
@ -100,12 +104,14 @@ static uint32_t const tovf_mask[MAX_BLACKFIN_GPTIMERS] =
|
||||
TIMER_STATUS_TOVF5,
|
||||
TIMER_STATUS_TOVF6,
|
||||
TIMER_STATUS_TOVF7,
|
||||
#endif
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
# if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
TIMER_STATUS_TOVF8,
|
||||
TIMER_STATUS_TOVF9,
|
||||
TIMER_STATUS_TOVF10,
|
||||
# if (MAX_BLACKFIN_GPTIMERS > 11)
|
||||
TIMER_STATUS_TOVF11,
|
||||
# endif
|
||||
# endif
|
||||
#endif
|
||||
};
|
||||
|
||||
@ -120,12 +126,14 @@ static uint32_t const timil_mask[MAX_BLACKFIN_GPTIMERS] =
|
||||
TIMER_STATUS_TIMIL5,
|
||||
TIMER_STATUS_TIMIL6,
|
||||
TIMER_STATUS_TIMIL7,
|
||||
#endif
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
# if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
TIMER_STATUS_TIMIL8,
|
||||
TIMER_STATUS_TIMIL9,
|
||||
TIMER_STATUS_TIMIL10,
|
||||
# if (MAX_BLACKFIN_GPTIMERS > 11)
|
||||
TIMER_STATUS_TIMIL11,
|
||||
# endif
|
||||
# endif
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
@ -32,6 +32,8 @@
|
||||
#include <linux/unistd.h>
|
||||
#include <linux/user.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/tick.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
@ -69,33 +71,44 @@ EXPORT_SYMBOL(pm_power_off);
|
||||
* The idle loop on BFIN
|
||||
*/
|
||||
#ifdef CONFIG_IDLE_L1
|
||||
void default_idle(void)__attribute__((l1_text));
|
||||
static void default_idle(void)__attribute__((l1_text));
|
||||
void cpu_idle(void)__attribute__((l1_text));
|
||||
#endif
|
||||
|
||||
void default_idle(void)
|
||||
/*
|
||||
* This is our default idle handler. We need to disable
|
||||
* interrupts here to ensure we don't miss a wakeup call.
|
||||
*/
|
||||
static void default_idle(void)
|
||||
{
|
||||
while (!need_resched()) {
|
||||
local_irq_disable();
|
||||
if (likely(!need_resched()))
|
||||
idle_with_irq_disabled();
|
||||
local_irq_enable();
|
||||
}
|
||||
local_irq_disable();
|
||||
if (!need_resched())
|
||||
idle_with_irq_disabled();
|
||||
|
||||
local_irq_enable();
|
||||
}
|
||||
|
||||
void (*idle)(void) = default_idle;
|
||||
|
||||
/*
|
||||
* The idle thread. There's no useful work to be
|
||||
* done, so just try to conserve power and have a
|
||||
* low exit latency (ie sit in a loop waiting for
|
||||
* somebody to say that they'd like to reschedule)
|
||||
* The idle thread. We try to conserve power, while trying to keep
|
||||
* overall latency low. The architecture specific idle is passed
|
||||
* a value to indicate the level of "idleness" of the system.
|
||||
*/
|
||||
void cpu_idle(void)
|
||||
{
|
||||
/* endless idle loop with no priority at all */
|
||||
while (1) {
|
||||
idle();
|
||||
void (*idle)(void) = pm_idle;
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
if (cpu_is_offline(smp_processor_id()))
|
||||
cpu_die();
|
||||
#endif
|
||||
if (!idle)
|
||||
idle = default_idle;
|
||||
tick_nohz_stop_sched_tick();
|
||||
while (!need_resched())
|
||||
idle();
|
||||
tick_nohz_restart_sched_tick();
|
||||
preempt_enable_no_resched();
|
||||
schedule();
|
||||
preempt_disable();
|
||||
@ -189,7 +202,7 @@ copy_thread(int nr, unsigned long clone_flags,
|
||||
* sys_execve() executes a new program.
|
||||
*/
|
||||
|
||||
asmlinkage int sys_execve(char *name, char **argv, char **envp)
|
||||
asmlinkage int sys_execve(char __user *name, char __user * __user *argv, char __user * __user *envp)
|
||||
{
|
||||
int error;
|
||||
char *filename;
|
||||
@ -232,23 +245,25 @@ unsigned long get_wchan(struct task_struct *p)
|
||||
|
||||
void finish_atomic_sections (struct pt_regs *regs)
|
||||
{
|
||||
int __user *up0 = (int __user *)®s->p0;
|
||||
|
||||
if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END)
|
||||
return;
|
||||
|
||||
switch (regs->pc) {
|
||||
case ATOMIC_XCHG32 + 2:
|
||||
put_user(regs->r1, (int *)regs->p0);
|
||||
put_user(regs->r1, up0);
|
||||
regs->pc += 2;
|
||||
break;
|
||||
|
||||
case ATOMIC_CAS32 + 2:
|
||||
case ATOMIC_CAS32 + 4:
|
||||
if (regs->r0 == regs->r1)
|
||||
put_user(regs->r2, (int *)regs->p0);
|
||||
put_user(regs->r2, up0);
|
||||
regs->pc = ATOMIC_CAS32 + 8;
|
||||
break;
|
||||
case ATOMIC_CAS32 + 6:
|
||||
put_user(regs->r2, (int *)regs->p0);
|
||||
put_user(regs->r2, up0);
|
||||
regs->pc += 2;
|
||||
break;
|
||||
|
||||
@ -256,7 +271,7 @@ void finish_atomic_sections (struct pt_regs *regs)
|
||||
regs->r0 = regs->r1 + regs->r0;
|
||||
/* fall through */
|
||||
case ATOMIC_ADD32 + 4:
|
||||
put_user(regs->r0, (int *)regs->p0);
|
||||
put_user(regs->r0, up0);
|
||||
regs->pc = ATOMIC_ADD32 + 6;
|
||||
break;
|
||||
|
||||
@ -264,7 +279,7 @@ void finish_atomic_sections (struct pt_regs *regs)
|
||||
regs->r0 = regs->r1 - regs->r0;
|
||||
/* fall through */
|
||||
case ATOMIC_SUB32 + 4:
|
||||
put_user(regs->r0, (int *)regs->p0);
|
||||
put_user(regs->r0, up0);
|
||||
regs->pc = ATOMIC_SUB32 + 6;
|
||||
break;
|
||||
|
||||
@ -272,7 +287,7 @@ void finish_atomic_sections (struct pt_regs *regs)
|
||||
regs->r0 = regs->r1 | regs->r0;
|
||||
/* fall through */
|
||||
case ATOMIC_IOR32 + 4:
|
||||
put_user(regs->r0, (int *)regs->p0);
|
||||
put_user(regs->r0, up0);
|
||||
regs->pc = ATOMIC_IOR32 + 6;
|
||||
break;
|
||||
|
||||
@ -280,7 +295,7 @@ void finish_atomic_sections (struct pt_regs *regs)
|
||||
regs->r0 = regs->r1 & regs->r0;
|
||||
/* fall through */
|
||||
case ATOMIC_AND32 + 4:
|
||||
put_user(regs->r0, (int *)regs->p0);
|
||||
put_user(regs->r0, up0);
|
||||
regs->pc = ATOMIC_AND32 + 6;
|
||||
break;
|
||||
|
||||
@ -288,7 +303,7 @@ void finish_atomic_sections (struct pt_regs *regs)
|
||||
regs->r0 = regs->r1 ^ regs->r0;
|
||||
/* fall through */
|
||||
case ATOMIC_XOR32 + 4:
|
||||
put_user(regs->r0, (int *)regs->p0);
|
||||
put_user(regs->r0, up0);
|
||||
regs->pc = ATOMIC_XOR32 + 6;
|
||||
break;
|
||||
}
|
||||
@ -309,6 +324,12 @@ int _access_ok(unsigned long addr, unsigned long size)
|
||||
return 1;
|
||||
if (addr >= memory_mtd_end && (addr + size) <= physical_mem_end)
|
||||
return 1;
|
||||
|
||||
#ifdef CONFIG_ROMFS_MTD_FS
|
||||
/* For XIP, allow user space to use pointers within the ROMFS. */
|
||||
if (addr >= memory_mtd_start && (addr + size) <= memory_mtd_end)
|
||||
return 1;
|
||||
#endif
|
||||
#else
|
||||
if (addr >= memory_start && (addr + size) <= physical_mem_end)
|
||||
return 1;
|
||||
|
||||
@ -193,6 +193,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
|
||||
{
|
||||
int ret;
|
||||
int add = 0;
|
||||
unsigned long __user *datap = (unsigned long __user *)data;
|
||||
|
||||
switch (request) {
|
||||
/* when I and D space are separate, these will need to be fixed. */
|
||||
@ -229,7 +230,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
|
||||
pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp);
|
||||
if (copied != sizeof(tmp))
|
||||
break;
|
||||
ret = put_user(tmp, (unsigned long *)data);
|
||||
ret = put_user(tmp, datap);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -263,7 +264,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
|
||||
} else {
|
||||
tmp = get_reg(child, addr);
|
||||
}
|
||||
ret = put_user(tmp, (unsigned long *)data);
|
||||
ret = put_user(tmp, datap);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -389,7 +390,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
|
||||
{
|
||||
|
||||
/* Get all gp regs from the child. */
|
||||
ret = ptrace_getregs(child, (void __user *)data);
|
||||
ret = ptrace_getregs(child, datap);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
@ -11,45 +11,56 @@
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
#if defined(BF537_FAMILY) || defined(BF533_FAMILY) || defined(BF527_FAMILY)
|
||||
#define SYSCR_VAL 0x0
|
||||
#elif defined(BF561_FAMILY)
|
||||
#define SYSCR_VAL 0x20
|
||||
#elif defined(BF548_FAMILY)
|
||||
#define SYSCR_VAL 0x10
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Delay min 5 SCLK cycles using worst case CCLK/SCLK ratio (15)
|
||||
*/
|
||||
#define SWRST_DELAY (5 * 15)
|
||||
|
||||
/* A system soft reset makes external memory unusable
|
||||
* so force this function into L1.
|
||||
/* A system soft reset makes external memory unusable so force
|
||||
* this function into L1. We use the compiler ssync here rather
|
||||
* than SSYNC() because it's safe (no interrupts and such) and
|
||||
* we save some L1. We do not need to force sanity in the SYSCR
|
||||
* register as the BMODE selection bit is cleared by the soft
|
||||
* reset while the Core B bit (on dual core parts) is cleared by
|
||||
* the core reset.
|
||||
*/
|
||||
__attribute__((l1_text))
|
||||
void bfin_reset(void)
|
||||
{
|
||||
/* force BMODE and disable Core B (as needed) */
|
||||
bfin_write_SYSCR(SYSCR_VAL);
|
||||
|
||||
/* we use asm ssync here because it's save and we save some L1 */
|
||||
asm("ssync;");
|
||||
/* Wait for completion of "system" events such as cache line
|
||||
* line fills so that we avoid infinite stalls later on as
|
||||
* much as possible. This code is in L1, so it won't trigger
|
||||
* any such event after this point in time.
|
||||
*/
|
||||
__builtin_bfin_ssync();
|
||||
|
||||
while (1) {
|
||||
/* initiate system soft reset with magic 0x7 */
|
||||
/* Initiate System software reset. */
|
||||
bfin_write_SWRST(0x7);
|
||||
|
||||
/* Wait for System reset to actually reset, needs to be 5 SCLKs, */
|
||||
/* Assume CCLK / SCLK ratio is worst case (15), and use 5*15 */
|
||||
/* Due to the way reset is handled in the hardware, we need
|
||||
* to delay for 7 SCLKS. The only reliable way to do this is
|
||||
* to calculate the CCLK/SCLK ratio and multiply 7. For now,
|
||||
* we'll assume worse case which is a 1:15 ratio.
|
||||
*/
|
||||
asm(
|
||||
"LSETUP (1f, 1f) LC0 = %0\n"
|
||||
"1: nop;"
|
||||
:
|
||||
: "a" (15 * 7)
|
||||
: "LC0", "LB0", "LT0"
|
||||
);
|
||||
|
||||
asm("LSETUP(.Lfoo,.Lfoo) LC0 = %0\n .Lfoo: NOP;\n"
|
||||
: : "a" (SWRST_DELAY) : "LC0", "LT0", "LB0");
|
||||
|
||||
/* clear system soft reset */
|
||||
/* Clear System software reset */
|
||||
bfin_write_SWRST(0);
|
||||
asm("ssync;");
|
||||
/* issue core reset */
|
||||
|
||||
/* Wait for the SWRST write to complete. Cannot rely on SSYNC
|
||||
* though as the System state is all reset now.
|
||||
*/
|
||||
asm(
|
||||
"LSETUP (1f, 1f) LC1 = %0\n"
|
||||
"1: nop;"
|
||||
:
|
||||
: "a" (15 * 1)
|
||||
: "LC1", "LB1", "LT1"
|
||||
);
|
||||
|
||||
/* Issue core reset */
|
||||
asm("raise 1");
|
||||
}
|
||||
}
|
||||
|
||||
@ -35,6 +35,7 @@ u16 _bfin_swrst;
|
||||
EXPORT_SYMBOL(_bfin_swrst);
|
||||
|
||||
unsigned long memory_start, memory_end, physical_mem_end;
|
||||
unsigned long _rambase, _ramstart, _ramend;
|
||||
unsigned long reserved_mem_dcache_on;
|
||||
unsigned long reserved_mem_icache_on;
|
||||
EXPORT_SYMBOL(memory_start);
|
||||
@ -106,7 +107,7 @@ void __init bf53x_relocate_l1_mem(void)
|
||||
|
||||
l1_code_length = _etext_l1 - _stext_l1;
|
||||
if (l1_code_length > L1_CODE_LENGTH)
|
||||
l1_code_length = L1_CODE_LENGTH;
|
||||
panic("L1 Instruction SRAM Overflow\n");
|
||||
/* cannot complain as printk is not available as yet.
|
||||
* But we can continue booting and complain later!
|
||||
*/
|
||||
@ -116,19 +117,18 @@ void __init bf53x_relocate_l1_mem(void)
|
||||
|
||||
l1_data_a_length = _ebss_l1 - _sdata_l1;
|
||||
if (l1_data_a_length > L1_DATA_A_LENGTH)
|
||||
l1_data_a_length = L1_DATA_A_LENGTH;
|
||||
panic("L1 Data SRAM Bank A Overflow\n");
|
||||
|
||||
/* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
|
||||
dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
|
||||
|
||||
l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
|
||||
if (l1_data_b_length > L1_DATA_B_LENGTH)
|
||||
l1_data_b_length = L1_DATA_B_LENGTH;
|
||||
panic("L1 Data SRAM Bank B Overflow\n");
|
||||
|
||||
/* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
|
||||
dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
|
||||
l1_data_a_length, l1_data_b_length);
|
||||
|
||||
}
|
||||
|
||||
/* add_memory_region to memmap */
|
||||
@ -547,11 +547,38 @@ static __init void memory_setup(void)
|
||||
);
|
||||
}
|
||||
|
||||
/*
|
||||
* Find the lowest, highest page frame number we have available
|
||||
*/
|
||||
void __init find_min_max_pfn(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
max_pfn = 0;
|
||||
min_low_pfn = memory_end;
|
||||
|
||||
for (i = 0; i < bfin_memmap.nr_map; i++) {
|
||||
unsigned long start, end;
|
||||
/* RAM? */
|
||||
if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
|
||||
continue;
|
||||
start = PFN_UP(bfin_memmap.map[i].addr);
|
||||
end = PFN_DOWN(bfin_memmap.map[i].addr +
|
||||
bfin_memmap.map[i].size);
|
||||
if (start >= end)
|
||||
continue;
|
||||
if (end > max_pfn)
|
||||
max_pfn = end;
|
||||
if (start < min_low_pfn)
|
||||
min_low_pfn = start;
|
||||
}
|
||||
}
|
||||
|
||||
static __init void setup_bootmem_allocator(void)
|
||||
{
|
||||
int bootmap_size;
|
||||
int i;
|
||||
unsigned long min_pfn, max_pfn;
|
||||
unsigned long start_pfn, end_pfn;
|
||||
unsigned long curr_pfn, last_pfn, size;
|
||||
|
||||
/* mark memory between memory_start and memory_end usable */
|
||||
@ -561,8 +588,19 @@ static __init void setup_bootmem_allocator(void)
|
||||
sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
|
||||
print_memory_map("boot memmap");
|
||||
|
||||
min_pfn = PAGE_OFFSET >> PAGE_SHIFT;
|
||||
max_pfn = memory_end >> PAGE_SHIFT;
|
||||
/* intialize globals in linux/bootmem.h */
|
||||
find_min_max_pfn();
|
||||
/* pfn of the last usable page frame */
|
||||
if (max_pfn > memory_end >> PAGE_SHIFT)
|
||||
max_pfn = memory_end >> PAGE_SHIFT;
|
||||
/* pfn of last page frame directly mapped by kernel */
|
||||
max_low_pfn = max_pfn;
|
||||
/* pfn of the first usable page frame after kernel image*/
|
||||
if (min_low_pfn < memory_start >> PAGE_SHIFT)
|
||||
min_low_pfn = memory_start >> PAGE_SHIFT;
|
||||
|
||||
start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
|
||||
end_pfn = memory_end >> PAGE_SHIFT;
|
||||
|
||||
/*
|
||||
* give all the memory to the bootmap allocator, tell it to put the
|
||||
@ -570,7 +608,7 @@ static __init void setup_bootmem_allocator(void)
|
||||
*/
|
||||
bootmap_size = init_bootmem_node(NODE_DATA(0),
|
||||
memory_start >> PAGE_SHIFT, /* map goes here */
|
||||
min_pfn, max_pfn);
|
||||
start_pfn, end_pfn);
|
||||
|
||||
/* register the memmap regions with the bootmem allocator */
|
||||
for (i = 0; i < bfin_memmap.nr_map; i++) {
|
||||
@ -583,7 +621,7 @@ static __init void setup_bootmem_allocator(void)
|
||||
* We are rounding up the start address of usable memory:
|
||||
*/
|
||||
curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
|
||||
if (curr_pfn >= max_pfn)
|
||||
if (curr_pfn >= end_pfn)
|
||||
continue;
|
||||
/*
|
||||
* ... and at the end of the usable range downwards:
|
||||
@ -591,8 +629,8 @@ static __init void setup_bootmem_allocator(void)
|
||||
last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
|
||||
bfin_memmap.map[i].size);
|
||||
|
||||
if (last_pfn > max_pfn)
|
||||
last_pfn = max_pfn;
|
||||
if (last_pfn > end_pfn)
|
||||
last_pfn = end_pfn;
|
||||
|
||||
/*
|
||||
* .. finally, did all the rounding and playing
|
||||
@ -611,9 +649,59 @@ static __init void setup_bootmem_allocator(void)
|
||||
BOOTMEM_DEFAULT);
|
||||
}
|
||||
|
||||
#define EBSZ_TO_MEG(ebsz) \
|
||||
({ \
|
||||
int meg = 0; \
|
||||
switch (ebsz & 0xf) { \
|
||||
case 0x1: meg = 16; break; \
|
||||
case 0x3: meg = 32; break; \
|
||||
case 0x5: meg = 64; break; \
|
||||
case 0x7: meg = 128; break; \
|
||||
case 0x9: meg = 256; break; \
|
||||
case 0xb: meg = 512; break; \
|
||||
} \
|
||||
meg; \
|
||||
})
|
||||
static inline int __init get_mem_size(void)
|
||||
{
|
||||
#ifdef CONFIG_MEM_SIZE
|
||||
return CONFIG_MEM_SIZE;
|
||||
#else
|
||||
# if defined(EBIU_SDBCTL)
|
||||
# if defined(BF561_FAMILY)
|
||||
int ret = 0;
|
||||
u32 sdbctl = bfin_read_EBIU_SDBCTL();
|
||||
ret += EBSZ_TO_MEG(sdbctl >> 0);
|
||||
ret += EBSZ_TO_MEG(sdbctl >> 8);
|
||||
ret += EBSZ_TO_MEG(sdbctl >> 16);
|
||||
ret += EBSZ_TO_MEG(sdbctl >> 24);
|
||||
return ret;
|
||||
# else
|
||||
return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
|
||||
# endif
|
||||
# elif defined(EBIU_DDRCTL1)
|
||||
u32 ddrctl = bfin_read_EBIU_DDRCTL1();
|
||||
int ret = 0;
|
||||
switch (ddrctl & 0xc0000) {
|
||||
case DEVSZ_64: ret = 64 / 8;
|
||||
case DEVSZ_128: ret = 128 / 8;
|
||||
case DEVSZ_256: ret = 256 / 8;
|
||||
case DEVSZ_512: ret = 512 / 8;
|
||||
}
|
||||
switch (ddrctl & 0x30000) {
|
||||
case DEVWD_4: ret *= 2;
|
||||
case DEVWD_8: ret *= 2;
|
||||
case DEVWD_16: break;
|
||||
}
|
||||
return ret;
|
||||
# endif
|
||||
#endif
|
||||
BUG();
|
||||
}
|
||||
|
||||
void __init setup_arch(char **cmdline_p)
|
||||
{
|
||||
unsigned long l1_length, sclk, cclk;
|
||||
unsigned long sclk, cclk;
|
||||
|
||||
#ifdef CONFIG_DUMMY_CONSOLE
|
||||
conswitchp = &dummy_con;
|
||||
@ -631,7 +719,7 @@ void __init setup_arch(char **cmdline_p)
|
||||
|
||||
/* setup memory defaults from the user config */
|
||||
physical_mem_end = 0;
|
||||
_ramend = CONFIG_MEM_SIZE * 1024 * 1024;
|
||||
_ramend = get_mem_size() * 1024 * 1024;
|
||||
|
||||
memset(&bfin_memmap, 0, sizeof(bfin_memmap));
|
||||
|
||||
@ -712,15 +800,6 @@ void __init setup_arch(char **cmdline_p)
|
||||
|
||||
paging_init();
|
||||
|
||||
/* check the size of the l1 area */
|
||||
l1_length = _etext_l1 - _stext_l1;
|
||||
if (l1_length > L1_CODE_LENGTH)
|
||||
panic("L1 code memory overflow\n");
|
||||
|
||||
l1_length = _ebss_l1 - _sdata_l1;
|
||||
if (l1_length > L1_DATA_A_LENGTH)
|
||||
panic("L1 data memory overflow\n");
|
||||
|
||||
/* Copy atomic sequences to their fixed location, and sanity check that
|
||||
these locations are the ones that we advertise to userspace. */
|
||||
memcpy((void *)FIXED_CODE_START, &fixed_code_start,
|
||||
@ -859,12 +938,17 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
||||
seq_printf(m, "processor\t: %d\n"
|
||||
"vendor_id\t: %s\n"
|
||||
"cpu family\t: 0x%x\n"
|
||||
"model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK)\n"
|
||||
"model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
|
||||
"stepping\t: %d\n",
|
||||
0,
|
||||
vendor,
|
||||
(bfin_read_CHIPID() & CHIPID_FAMILY),
|
||||
cpu, cclk/1000000, sclk/1000000,
|
||||
#ifdef CONFIG_MPU
|
||||
"mpu on",
|
||||
#else
|
||||
"mpu off",
|
||||
#endif
|
||||
revid);
|
||||
|
||||
seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
|
||||
@ -973,7 +1057,6 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
||||
seq_printf(m, "No Ways are locked\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
seq_printf(m, "board name\t: %s\n", bfin_board_name);
|
||||
seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
|
||||
physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
|
||||
|
||||
@ -38,6 +38,7 @@
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/ucontext.h>
|
||||
#include <asm/fixed_code.h>
|
||||
|
||||
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
|
||||
|
||||
@ -50,18 +51,20 @@ struct rt_sigframe {
|
||||
int sig;
|
||||
struct siginfo *pinfo;
|
||||
void *puc;
|
||||
/* This is no longer needed by the kernel, but unfortunately userspace
|
||||
* code expects it to be there. */
|
||||
char retcode[8];
|
||||
struct siginfo info;
|
||||
struct ucontext uc;
|
||||
};
|
||||
|
||||
asmlinkage int sys_sigaltstack(const stack_t * uss, stack_t * uoss)
|
||||
asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
|
||||
{
|
||||
return do_sigaltstack(uss, uoss, rdusp());
|
||||
}
|
||||
|
||||
static inline int
|
||||
rt_restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc, int *pr0)
|
||||
rt_restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, int *pr0)
|
||||
{
|
||||
unsigned long usp = 0;
|
||||
int err = 0;
|
||||
@ -159,11 +162,6 @@ static inline int rt_setup_sigcontext(struct sigcontext *sc, struct pt_regs *reg
|
||||
return err;
|
||||
}
|
||||
|
||||
static inline void push_cache(unsigned long vaddr, unsigned int len)
|
||||
{
|
||||
flush_icache_range(vaddr, vaddr + len);
|
||||
}
|
||||
|
||||
static inline void *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
|
||||
size_t frame_size)
|
||||
{
|
||||
@ -209,19 +207,9 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
|
||||
err |= rt_setup_sigcontext(&frame->uc.uc_mcontext, regs);
|
||||
err |= copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
|
||||
|
||||
/* Set up to return from userspace. */
|
||||
err |= __put_user(0x28, &(frame->retcode[0]));
|
||||
err |= __put_user(0xe1, &(frame->retcode[1]));
|
||||
err |= __put_user(0xad, &(frame->retcode[2]));
|
||||
err |= __put_user(0x00, &(frame->retcode[3]));
|
||||
err |= __put_user(0xa0, &(frame->retcode[4]));
|
||||
err |= __put_user(0x00, &(frame->retcode[5]));
|
||||
|
||||
if (err)
|
||||
goto give_sigsegv;
|
||||
|
||||
push_cache((unsigned long)&frame->retcode, sizeof(frame->retcode));
|
||||
|
||||
/* Set up registers for signal handler */
|
||||
wrusp((unsigned long)frame);
|
||||
if (get_personality & FDPIC_FUNCPTRS) {
|
||||
@ -231,7 +219,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
|
||||
__get_user(regs->p3, &funcptr->GOT);
|
||||
} else
|
||||
regs->pc = (unsigned long)ka->sa.sa_handler;
|
||||
regs->rets = (unsigned long)(frame->retcode);
|
||||
regs->rets = SIGRETURN_STUB;
|
||||
|
||||
regs->r0 = frame->sig;
|
||||
regs->r1 = (unsigned long)(&frame->info);
|
||||
|
||||
@ -49,7 +49,7 @@
|
||||
* sys_pipe() is the normal C calling standard for creating
|
||||
* a pipe. It's not the way unix traditionally does this, though.
|
||||
*/
|
||||
asmlinkage int sys_pipe(unsigned long *fildes)
|
||||
asmlinkage int sys_pipe(unsigned long __user *fildes)
|
||||
{
|
||||
int fd[2];
|
||||
int error;
|
||||
|
||||
219
arch/blackfin/kernel/time-ts.c
Normal file
219
arch/blackfin/kernel/time-ts.c
Normal file
@ -0,0 +1,219 @@
|
||||
/*
|
||||
* linux/arch/kernel/time-ts.c
|
||||
*
|
||||
* Based on arm clockevents implementation and old bfin time tick.
|
||||
*
|
||||
* Copyright(C) 2008, GeoTechnologies, Vitja Makarov
|
||||
*
|
||||
* This code is licenced under the GPL version 2. For details see
|
||||
* kernel-base/COPYING.
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/profile.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/time.h>
|
||||
#include <linux/timex.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/clockchips.h>
|
||||
#include <linux/cpufreq.h>
|
||||
|
||||
#include <asm/blackfin.h>
|
||||
#include <asm/time.h>
|
||||
|
||||
#ifdef CONFIG_CYCLES_CLOCKSOURCE
|
||||
|
||||
/* Accelerators for sched_clock()
|
||||
* convert from cycles(64bits) => nanoseconds (64bits)
|
||||
* basic equation:
|
||||
* ns = cycles / (freq / ns_per_sec)
|
||||
* ns = cycles * (ns_per_sec / freq)
|
||||
* ns = cycles * (10^9 / (cpu_khz * 10^3))
|
||||
* ns = cycles * (10^6 / cpu_khz)
|
||||
*
|
||||
* Then we use scaling math (suggested by george@mvista.com) to get:
|
||||
* ns = cycles * (10^6 * SC / cpu_khz) / SC
|
||||
* ns = cycles * cyc2ns_scale / SC
|
||||
*
|
||||
* And since SC is a constant power of two, we can convert the div
|
||||
* into a shift.
|
||||
*
|
||||
* We can use khz divisor instead of mhz to keep a better precision, since
|
||||
* cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
|
||||
* (mathieu.desnoyers@polymtl.ca)
|
||||
*
|
||||
* -johnstul@us.ibm.com "math is hard, lets go shopping!"
|
||||
*/
|
||||
|
||||
static unsigned long cyc2ns_scale;
|
||||
#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
|
||||
|
||||
static inline void set_cyc2ns_scale(unsigned long cpu_khz)
|
||||
{
|
||||
cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR) / cpu_khz;
|
||||
}
|
||||
|
||||
static inline unsigned long long cycles_2_ns(cycle_t cyc)
|
||||
{
|
||||
return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
|
||||
}
|
||||
|
||||
static cycle_t read_cycles(void)
|
||||
{
|
||||
return get_cycles();
|
||||
}
|
||||
|
||||
unsigned long long sched_clock(void)
|
||||
{
|
||||
return cycles_2_ns(read_cycles());
|
||||
}
|
||||
|
||||
static struct clocksource clocksource_bfin = {
|
||||
.name = "bfin_cycles",
|
||||
.rating = 350,
|
||||
.read = read_cycles,
|
||||
.mask = CLOCKSOURCE_MASK(64),
|
||||
.shift = 22,
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
static int __init bfin_clocksource_init(void)
|
||||
{
|
||||
set_cyc2ns_scale(get_cclk() / 1000);
|
||||
|
||||
clocksource_bfin.mult = clocksource_hz2mult(get_cclk(), clocksource_bfin.shift);
|
||||
|
||||
if (clocksource_register(&clocksource_bfin))
|
||||
panic("failed to register clocksource");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#else
|
||||
# define bfin_clocksource_init()
|
||||
#endif
|
||||
|
||||
static int bfin_timer_set_next_event(unsigned long cycles,
|
||||
struct clock_event_device *evt)
|
||||
{
|
||||
bfin_write_TCOUNT(cycles);
|
||||
CSYNC();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void bfin_timer_set_mode(enum clock_event_mode mode,
|
||||
struct clock_event_device *evt)
|
||||
{
|
||||
switch (mode) {
|
||||
case CLOCK_EVT_MODE_PERIODIC: {
|
||||
unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1);
|
||||
bfin_write_TCNTL(TMPWR);
|
||||
bfin_write_TSCALE(TIME_SCALE - 1);
|
||||
CSYNC();
|
||||
bfin_write_TPERIOD(tcount);
|
||||
bfin_write_TCOUNT(tcount);
|
||||
bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD);
|
||||
CSYNC();
|
||||
break;
|
||||
}
|
||||
case CLOCK_EVT_MODE_ONESHOT:
|
||||
bfin_write_TSCALE(0);
|
||||
bfin_write_TCOUNT(0);
|
||||
bfin_write_TCNTL(TMPWR | TMREN);
|
||||
CSYNC();
|
||||
break;
|
||||
case CLOCK_EVT_MODE_UNUSED:
|
||||
case CLOCK_EVT_MODE_SHUTDOWN:
|
||||
bfin_write_TCNTL(0);
|
||||
CSYNC();
|
||||
break;
|
||||
case CLOCK_EVT_MODE_RESUME:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void __init bfin_timer_init(void)
|
||||
{
|
||||
/* power up the timer, but don't enable it just yet */
|
||||
bfin_write_TCNTL(TMPWR);
|
||||
CSYNC();
|
||||
|
||||
/*
|
||||
* the TSCALE prescaler counter.
|
||||
*/
|
||||
bfin_write_TSCALE(TIME_SCALE - 1);
|
||||
bfin_write_TPERIOD(0);
|
||||
bfin_write_TCOUNT(0);
|
||||
|
||||
/* now enable the timer */
|
||||
CSYNC();
|
||||
}
|
||||
|
||||
/*
|
||||
* timer_interrupt() needs to keep up the real-time clock,
|
||||
* as well as call the "do_timer()" routine every clocktick
|
||||
*/
|
||||
#ifdef CONFIG_CORE_TIMER_IRQ_L1
|
||||
__attribute__((l1_text))
|
||||
#endif
|
||||
irqreturn_t timer_interrupt(int irq, void *dev_id);
|
||||
|
||||
static struct clock_event_device clockevent_bfin = {
|
||||
.name = "bfin_core_timer",
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
||||
.shift = 32,
|
||||
.cpumask = CPU_MASK_CPU0,
|
||||
.set_next_event = bfin_timer_set_next_event,
|
||||
.set_mode = bfin_timer_set_mode,
|
||||
};
|
||||
|
||||
static struct irqaction bfin_timer_irq = {
|
||||
.name = "Blackfin Core Timer",
|
||||
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||
.handler = timer_interrupt,
|
||||
.dev_id = &clockevent_bfin,
|
||||
};
|
||||
|
||||
irqreturn_t timer_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct clock_event_device *evt = dev_id;
|
||||
evt->event_handler(evt);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int __init bfin_clockevent_init(void)
|
||||
{
|
||||
setup_irq(IRQ_CORETMR, &bfin_timer_irq);
|
||||
bfin_timer_init();
|
||||
|
||||
clockevent_bfin.mult = div_sc(get_cclk(), NSEC_PER_SEC, clockevent_bfin.shift);
|
||||
clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
|
||||
clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
|
||||
clockevents_register_device(&clockevent_bfin);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void __init time_init(void)
|
||||
{
|
||||
time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */
|
||||
|
||||
#ifdef CONFIG_RTC_DRV_BFIN
|
||||
/* [#2663] hack to filter junk RTC values that would cause
|
||||
* userspace to have to deal with time values greater than
|
||||
* 2^31 seconds (which uClibc cannot cope with yet)
|
||||
*/
|
||||
if ((bfin_read_RTC_STAT() & 0xC0000000) == 0xC0000000) {
|
||||
printk(KERN_NOTICE "bfin-rtc: invalid date; resetting\n");
|
||||
bfin_write_RTC_STAT(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Initialize xtime. From now on, xtime is updated with timer interrupts */
|
||||
xtime.tv_sec = secs_since_1970;
|
||||
xtime.tv_nsec = 0;
|
||||
set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
|
||||
|
||||
bfin_clocksource_init();
|
||||
bfin_clockevent_init();
|
||||
}
|
||||
@ -6,9 +6,10 @@
|
||||
* Created:
|
||||
* Description: This file contains the bfin-specific time handling details.
|
||||
* Most of the stuff is located in the machine specific files.
|
||||
* FIXME: (This file is subject for removal)
|
||||
*
|
||||
* Modified:
|
||||
* Copyright 2004-2006 Analog Devices Inc.
|
||||
* Copyright 2004-2008 Analog Devices Inc.
|
||||
*
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
@ -35,6 +36,7 @@
|
||||
#include <linux/irq.h>
|
||||
|
||||
#include <asm/blackfin.h>
|
||||
#include <asm/time.h>
|
||||
|
||||
/* This is an NTP setting */
|
||||
#define TICK_SIZE (tick_nsec / 1000)
|
||||
@ -47,21 +49,6 @@ static struct irqaction bfin_timer_irq = {
|
||||
.flags = IRQF_DISABLED
|
||||
};
|
||||
|
||||
/*
|
||||
* The way that the Blackfin core timer works is:
|
||||
* - CCLK is divided by a programmable 8-bit pre-scaler (TSCALE)
|
||||
* - Every time TSCALE ticks, a 32bit is counted down (TCOUNT)
|
||||
*
|
||||
* If you take the fastest clock (1ns, or 1GHz to make the math work easier)
|
||||
* 10ms is 10,000,000 clock ticks, which fits easy into a 32-bit counter
|
||||
* (32 bit counter is 4,294,967,296ns or 4.2 seconds) so, we don't need
|
||||
* to use TSCALE, and program it to zero (which is pass CCLK through).
|
||||
* If you feel like using it, try to keep HZ * TIMESCALE to some
|
||||
* value that divides easy (like power of 2).
|
||||
*/
|
||||
|
||||
#define TIME_SCALE 1
|
||||
|
||||
static void
|
||||
time_sched_init(irq_handler_t timer_routine)
|
||||
{
|
||||
|
||||
@ -67,6 +67,8 @@ void __init trap_init(void)
|
||||
CSYNC();
|
||||
}
|
||||
|
||||
void *saved_icplb_fault_addr, *saved_dcplb_fault_addr;
|
||||
|
||||
int kstack_depth_to_print = 48;
|
||||
|
||||
static void decode_address(char *buf, unsigned long address)
|
||||
@ -75,7 +77,7 @@ static void decode_address(char *buf, unsigned long address)
|
||||
struct task_struct *p;
|
||||
struct mm_struct *mm;
|
||||
unsigned long flags, offset;
|
||||
unsigned int in_exception = bfin_read_IPEND() & 0x10;
|
||||
unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic();
|
||||
|
||||
#ifdef CONFIG_KALLSYMS
|
||||
unsigned long symsize;
|
||||
@ -117,7 +119,7 @@ static void decode_address(char *buf, unsigned long address)
|
||||
*/
|
||||
write_lock_irqsave(&tasklist_lock, flags);
|
||||
for_each_process(p) {
|
||||
mm = (in_exception ? p->mm : get_task_mm(p));
|
||||
mm = (in_atomic ? p->mm : get_task_mm(p));
|
||||
if (!mm)
|
||||
continue;
|
||||
|
||||
@ -137,23 +139,36 @@ static void decode_address(char *buf, unsigned long address)
|
||||
/* FLAT does not have its text aligned to the start of
|
||||
* the map while FDPIC ELF does ...
|
||||
*/
|
||||
if (current->mm &&
|
||||
(address > current->mm->start_code) &&
|
||||
(address < current->mm->end_code))
|
||||
offset = address - current->mm->start_code;
|
||||
else
|
||||
offset = (address - vma->vm_start) + (vma->vm_pgoff << PAGE_SHIFT);
|
||||
|
||||
sprintf(buf, "<0x%p> [ %s + 0x%lx ]",
|
||||
(void *)address, name, offset);
|
||||
if (!in_exception)
|
||||
/* before we can check flat/fdpic, we need to
|
||||
* make sure current is valid
|
||||
*/
|
||||
if ((unsigned long)current >= FIXED_CODE_START &&
|
||||
!((unsigned long)current & 0x3)) {
|
||||
if (current->mm &&
|
||||
(address > current->mm->start_code) &&
|
||||
(address < current->mm->end_code))
|
||||
offset = address - current->mm->start_code;
|
||||
else
|
||||
offset = (address - vma->vm_start) +
|
||||
(vma->vm_pgoff << PAGE_SHIFT);
|
||||
|
||||
sprintf(buf, "<0x%p> [ %s + 0x%lx ]",
|
||||
(void *)address, name, offset);
|
||||
} else
|
||||
sprintf(buf, "<0x%p> [ %s vma:0x%lx-0x%lx]",
|
||||
(void *)address, name,
|
||||
vma->vm_start, vma->vm_end);
|
||||
|
||||
if (!in_atomic)
|
||||
mmput(mm);
|
||||
|
||||
goto done;
|
||||
}
|
||||
|
||||
vml = vml->next;
|
||||
}
|
||||
if (!in_exception)
|
||||
if (!in_atomic)
|
||||
mmput(mm);
|
||||
}
|
||||
|
||||
@ -506,7 +521,7 @@ asmlinkage void trap_c(struct pt_regs *fp)
|
||||
|
||||
info.si_signo = sig;
|
||||
info.si_errno = 0;
|
||||
info.si_addr = (void *)fp->pc;
|
||||
info.si_addr = (void __user *)fp->pc;
|
||||
force_sig_info(sig, &info, current);
|
||||
|
||||
trace_buffer_restore(j);
|
||||
@ -655,21 +670,31 @@ void dump_bfin_process(struct pt_regs *fp)
|
||||
else if (context & 0x8000)
|
||||
printk(KERN_NOTICE "Kernel process context\n");
|
||||
|
||||
if (current->pid && current->mm) {
|
||||
/* Because we are crashing, and pointers could be bad, we check things
|
||||
* pretty closely before we use them
|
||||
*/
|
||||
if ((unsigned long)current >= FIXED_CODE_START &&
|
||||
!((unsigned long)current & 0x3) && current->pid) {
|
||||
printk(KERN_NOTICE "CURRENT PROCESS:\n");
|
||||
printk(KERN_NOTICE "COMM=%s PID=%d\n",
|
||||
current->comm, current->pid);
|
||||
if (current->comm >= (char *)FIXED_CODE_START)
|
||||
printk(KERN_NOTICE "COMM=%s PID=%d\n",
|
||||
current->comm, current->pid);
|
||||
else
|
||||
printk(KERN_NOTICE "COMM= invalid\n");
|
||||
|
||||
printk(KERN_NOTICE "TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n"
|
||||
KERN_NOTICE "BSS = 0x%p-0x%p USER-STACK = 0x%p\n"
|
||||
KERN_NOTICE "\n",
|
||||
(void *)current->mm->start_code,
|
||||
(void *)current->mm->end_code,
|
||||
(void *)current->mm->start_data,
|
||||
(void *)current->mm->end_data,
|
||||
(void *)current->mm->end_data,
|
||||
(void *)current->mm->brk,
|
||||
(void *)current->mm->start_stack);
|
||||
if (!((unsigned long)current->mm & 0x3) && (unsigned long)current->mm >= FIXED_CODE_START)
|
||||
printk(KERN_NOTICE "TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n"
|
||||
KERN_NOTICE " BSS = 0x%p-0x%p USER-STACK = 0x%p\n"
|
||||
KERN_NOTICE "\n",
|
||||
(void *)current->mm->start_code,
|
||||
(void *)current->mm->end_code,
|
||||
(void *)current->mm->start_data,
|
||||
(void *)current->mm->end_data,
|
||||
(void *)current->mm->end_data,
|
||||
(void *)current->mm->brk,
|
||||
(void *)current->mm->start_stack);
|
||||
else
|
||||
printk(KERN_NOTICE "invalid mm\n");
|
||||
} else
|
||||
printk(KERN_NOTICE "\n" KERN_NOTICE
|
||||
"No Valid process in current context\n");
|
||||
@ -680,10 +705,7 @@ void dump_bfin_mem(struct pt_regs *fp)
|
||||
unsigned short *addr, *erraddr, val = 0, err = 0;
|
||||
char sti = 0, buf[6];
|
||||
|
||||
if (unlikely((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR))
|
||||
erraddr = (void *)fp->pc;
|
||||
else
|
||||
erraddr = (void *)fp->retx;
|
||||
erraddr = (void *)fp->pc;
|
||||
|
||||
printk(KERN_NOTICE "return address: [0x%p]; contents of:", erraddr);
|
||||
|
||||
@ -807,9 +829,9 @@ void show_regs(struct pt_regs *fp)
|
||||
|
||||
if (((long)fp->seqstat & SEQSTAT_EXCAUSE) &&
|
||||
(((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) {
|
||||
decode_address(buf, bfin_read_DCPLB_FAULT_ADDR());
|
||||
decode_address(buf, saved_dcplb_fault_addr);
|
||||
printk(KERN_NOTICE "DCPLB_FAULT_ADDR: %s\n", buf);
|
||||
decode_address(buf, bfin_read_ICPLB_FAULT_ADDR());
|
||||
decode_address(buf, saved_icplb_fault_addr);
|
||||
printk(KERN_NOTICE "ICPLB_FAULT_ADDR: %s\n", buf);
|
||||
}
|
||||
|
||||
@ -917,8 +939,8 @@ void panic_cplb_error(int cplb_panic, struct pt_regs *fp)
|
||||
|
||||
oops_in_progress = 1;
|
||||
|
||||
printk(KERN_EMERG "DCPLB_FAULT_ADDR=%p\n", (void *)bfin_read_DCPLB_FAULT_ADDR());
|
||||
printk(KERN_EMERG "ICPLB_FAULT_ADDR=%p\n", (void *)bfin_read_ICPLB_FAULT_ADDR());
|
||||
printk(KERN_EMERG "DCPLB_FAULT_ADDR=%p\n", saved_dcplb_fault_addr);
|
||||
printk(KERN_EMERG "ICPLB_FAULT_ADDR=%p\n", saved_icplb_fault_addr);
|
||||
dump_bfin_process(fp);
|
||||
dump_bfin_mem(fp);
|
||||
show_regs(fp);
|
||||
|
||||
@ -56,6 +56,10 @@ SECTIONS
|
||||
*(.text.*)
|
||||
*(.fixup)
|
||||
|
||||
#if !L1_CODE_LENGTH
|
||||
*(.l1.text)
|
||||
#endif
|
||||
|
||||
. = ALIGN(16);
|
||||
___start___ex_table = .;
|
||||
*(__ex_table)
|
||||
@ -73,6 +77,12 @@ SECTIONS
|
||||
___bss_start = .;
|
||||
*(.bss .bss.*)
|
||||
*(COMMON)
|
||||
#if !L1_DATA_A_LENGTH
|
||||
*(.l1.bss)
|
||||
#endif
|
||||
#if !L1_DATA_B_LENGTH
|
||||
*(.l1.bss.B)
|
||||
#endif
|
||||
___bss_stop = .;
|
||||
}
|
||||
|
||||
@ -83,6 +93,15 @@ SECTIONS
|
||||
. = ALIGN(32);
|
||||
*(.data.cacheline_aligned)
|
||||
|
||||
#if !L1_DATA_A_LENGTH
|
||||
. = ALIGN(32);
|
||||
*(.data_l1.cacheline_aligned)
|
||||
*(.l1.data)
|
||||
#endif
|
||||
#if !L1_DATA_B_LENGTH
|
||||
*(.l1.data.B)
|
||||
#endif
|
||||
|
||||
DATA_DATA
|
||||
*(.data.*)
|
||||
CONSTRUCTORS
|
||||
@ -147,64 +166,43 @@ SECTIONS
|
||||
|
||||
__l1_lma_start = .;
|
||||
|
||||
#if L1_CODE_LENGTH
|
||||
# define LDS_L1_CODE *(.l1.text)
|
||||
#else
|
||||
# define LDS_L1_CODE
|
||||
#endif
|
||||
.text_l1 L1_CODE_START : AT(LOADADDR(.init.ramfs) + SIZEOF(.init.ramfs))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__stext_l1 = .;
|
||||
LDS_L1_CODE
|
||||
*(.l1.text)
|
||||
. = ALIGN(4);
|
||||
__etext_l1 = .;
|
||||
}
|
||||
|
||||
#if L1_DATA_A_LENGTH
|
||||
# define LDS_L1_A_DATA *(.l1.data)
|
||||
# define LDS_L1_A_BSS *(.l1.bss)
|
||||
# define LDS_L1_A_CACHE *(.data_l1.cacheline_aligned)
|
||||
#else
|
||||
# define LDS_L1_A_DATA
|
||||
# define LDS_L1_A_BSS
|
||||
# define LDS_L1_A_CACHE
|
||||
#endif
|
||||
.data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__sdata_l1 = .;
|
||||
LDS_L1_A_DATA
|
||||
*(.l1.data)
|
||||
__edata_l1 = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__sbss_l1 = .;
|
||||
LDS_L1_A_BSS
|
||||
*(.l1.bss)
|
||||
|
||||
. = ALIGN(32);
|
||||
LDS_L1_A_CACHE
|
||||
*(.data_l1.cacheline_aligned)
|
||||
|
||||
. = ALIGN(4);
|
||||
__ebss_l1 = .;
|
||||
}
|
||||
|
||||
#if L1_DATA_B_LENGTH
|
||||
# define LDS_L1_B_DATA *(.l1.data.B)
|
||||
# define LDS_L1_B_BSS *(.l1.bss.B)
|
||||
#else
|
||||
# define LDS_L1_B_DATA
|
||||
# define LDS_L1_B_BSS
|
||||
#endif
|
||||
.data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__sdata_b_l1 = .;
|
||||
LDS_L1_B_DATA
|
||||
*(.l1.data.B)
|
||||
__edata_b_l1 = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__sbss_b_l1 = .;
|
||||
LDS_L1_B_BSS
|
||||
*(.l1.bss.B)
|
||||
|
||||
. = ALIGN(4);
|
||||
__ebss_b_l1 = .;
|
||||
@ -223,8 +221,6 @@ SECTIONS
|
||||
|
||||
DWARF_DEBUG
|
||||
|
||||
NOTES
|
||||
|
||||
/DISCARD/ :
|
||||
{
|
||||
EXIT_TEXT
|
||||
|
||||
@ -5,5 +5,3 @@
|
||||
extra-y := head.o
|
||||
|
||||
obj-y := ints-priority.o dma.o
|
||||
|
||||
obj-$(CONFIG_CPU_FREQ) += cpu.o
|
||||
|
||||
@ -94,7 +94,7 @@ int __init bfin_isp1761_init(void)
|
||||
{
|
||||
unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
|
||||
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
|
||||
|
||||
return platform_add_devices(bfin_isp1761_devices, num_devices);
|
||||
@ -416,7 +416,7 @@ static struct platform_device net2272_bfin_device = {
|
||||
static struct mtd_partition bfin_spi_flash_partitions[] = {
|
||||
{
|
||||
.name = "bootloader",
|
||||
.size = 0x00020000,
|
||||
.size = 0x00040000,
|
||||
.offset = 0,
|
||||
.mask_flags = MTD_CAP_ROM
|
||||
}, {
|
||||
@ -707,6 +707,32 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
{
|
||||
.start = 0xFFC02000,
|
||||
.end = 0xFFC020FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
static struct resource bfin_twi0_resource[] = {
|
||||
[0] = {
|
||||
@ -874,6 +900,10 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
&i2c_bfin_twi_device,
|
||||
#endif
|
||||
@ -896,7 +926,7 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||
|
||||
static int __init stamp_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
spi_register_board_info(bfin_spi_board_info,
|
||||
|
||||
@ -1,161 +0,0 @@
|
||||
/*
|
||||
* File: arch/blackfin/mach-bf527/cpu.c
|
||||
* Based on: arch/blackfin/mach-bf537/cpu.c
|
||||
* Author: michael.kang@analog.com
|
||||
*
|
||||
* Created:
|
||||
* Description: clock scaling for the bf527
|
||||
*
|
||||
* Modified:
|
||||
* Copyright 2004-2007 Analog Devices Inc.
|
||||
*
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see the file COPYING, or write
|
||||
* to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <asm/dpmc.h>
|
||||
#include <linux/fs.h>
|
||||
#include <asm/bfin-global.h>
|
||||
|
||||
/* CONFIG_CLKIN_HZ=11059200 */
|
||||
#define VCO5 (CONFIG_CLKIN_HZ*45) /*497664000 */
|
||||
#define VCO4 (CONFIG_CLKIN_HZ*36) /*398131200 */
|
||||
#define VCO3 (CONFIG_CLKIN_HZ*27) /*298598400 */
|
||||
#define VCO2 (CONFIG_CLKIN_HZ*18) /*199065600 */
|
||||
#define VCO1 (CONFIG_CLKIN_HZ*9) /*99532800 */
|
||||
#define VCO(x) VCO##x
|
||||
|
||||
#define MFREQ(x) {VCO(x), VCO(x)/4}, {VCO(x), VCO(x)/2}, {VCO(x), VCO(x)}
|
||||
/* frequency */
|
||||
static struct cpufreq_frequency_table bf527_freq_table[] = {
|
||||
MFREQ(1),
|
||||
MFREQ(3),
|
||||
{VCO4, VCO4 / 2}, {VCO4, VCO4},
|
||||
MFREQ(5),
|
||||
{0, CPUFREQ_TABLE_END},
|
||||
};
|
||||
|
||||
/*
|
||||
* dpmc_fops->ioctl()
|
||||
* static int dpmc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
||||
*/
|
||||
static int bf527_getfreq(unsigned int cpu)
|
||||
{
|
||||
unsigned long cclk_mhz;
|
||||
|
||||
/* The driver only support single cpu */
|
||||
if (cpu == 0)
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_GET_CORECLOCK, &cclk_mhz);
|
||||
else
|
||||
cclk_mhz = -1;
|
||||
|
||||
return cclk_mhz;
|
||||
}
|
||||
|
||||
static int bf527_target(struct cpufreq_policy *policy,
|
||||
unsigned int target_freq, unsigned int relation)
|
||||
{
|
||||
unsigned long cclk_mhz;
|
||||
unsigned long vco_mhz;
|
||||
unsigned long flags;
|
||||
unsigned int index;
|
||||
struct cpufreq_freqs freqs;
|
||||
|
||||
if (cpufreq_frequency_table_target
|
||||
(policy, bf527_freq_table, target_freq, relation, &index))
|
||||
return -EINVAL;
|
||||
|
||||
cclk_mhz = bf527_freq_table[index].frequency;
|
||||
vco_mhz = bf527_freq_table[index].index;
|
||||
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_CHANGE_FREQUENCY, &vco_mhz);
|
||||
freqs.old = bf527_getfreq(0);
|
||||
freqs.new = cclk_mhz;
|
||||
freqs.cpu = 0;
|
||||
|
||||
pr_debug
|
||||
("cclk begin change to cclk %d,vco=%d,index=%d,target=%d,oldfreq=%d\n",
|
||||
cclk_mhz, vco_mhz, index, target_freq, freqs.old);
|
||||
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
|
||||
local_irq_save(flags);
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_SET_CCLK, &cclk_mhz);
|
||||
local_irq_restore(flags);
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
|
||||
|
||||
vco_mhz = get_vco();
|
||||
cclk_mhz = get_cclk();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
|
||||
* this platform, anyway.
|
||||
*/
|
||||
static int bf527_verify_speed(struct cpufreq_policy *policy)
|
||||
{
|
||||
return cpufreq_frequency_table_verify(policy, &bf527_freq_table);
|
||||
}
|
||||
|
||||
static int __init __bf527_cpu_init(struct cpufreq_policy *policy)
|
||||
{
|
||||
if (policy->cpu != 0)
|
||||
return -EINVAL;
|
||||
|
||||
policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
|
||||
|
||||
policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
|
||||
/*Now ,only support one cpu */
|
||||
policy->cur = bf527_getfreq(0);
|
||||
cpufreq_frequency_table_get_attr(bf527_freq_table, policy->cpu);
|
||||
return cpufreq_frequency_table_cpuinfo(policy, bf527_freq_table);
|
||||
}
|
||||
|
||||
static struct freq_attr *bf527_freq_attr[] = {
|
||||
&cpufreq_freq_attr_scaling_available_freqs,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static struct cpufreq_driver bf527_driver = {
|
||||
.verify = bf527_verify_speed,
|
||||
.target = bf527_target,
|
||||
.get = bf527_getfreq,
|
||||
.init = __bf527_cpu_init,
|
||||
.name = "bf527",
|
||||
.owner = THIS_MODULE,
|
||||
.attr = bf527_freq_attr,
|
||||
};
|
||||
|
||||
static int __init bf527_cpu_init(void)
|
||||
{
|
||||
return cpufreq_register_driver(&bf527_driver);
|
||||
}
|
||||
|
||||
static void __exit bf527_cpu_exit(void)
|
||||
{
|
||||
cpufreq_unregister_driver(&bf527_driver);
|
||||
}
|
||||
|
||||
MODULE_AUTHOR("Mickael Kang");
|
||||
MODULE_DESCRIPTION("cpufreq driver for bf527 CPU");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
module_init(bf527_cpu_init);
|
||||
module_exit(bf527_cpu_exit);
|
||||
@ -26,10 +26,12 @@
|
||||
* to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <asm/blackfin.h>
|
||||
#include <asm/dma.h>
|
||||
|
||||
struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
(struct dma_register *) DMA0_NEXT_DESC_PTR,
|
||||
(struct dma_register *) DMA1_NEXT_DESC_PTR,
|
||||
(struct dma_register *) DMA2_NEXT_DESC_PTR,
|
||||
@ -47,6 +49,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
|
||||
(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
|
||||
};
|
||||
EXPORT_SYMBOL(dma_io_base_addr);
|
||||
|
||||
int channel2irq(unsigned int channel)
|
||||
{
|
||||
|
||||
@ -37,9 +37,6 @@
|
||||
#include <asm/mach/mem_init.h>
|
||||
#endif
|
||||
|
||||
.global __rambase
|
||||
.global __ramstart
|
||||
.global __ramend
|
||||
.extern ___bss_stop
|
||||
.extern ___bss_start
|
||||
.extern _bf53x_relocate_l1_mem
|
||||
@ -439,18 +436,3 @@ ENTRY(_start_dma_code)
|
||||
RTS;
|
||||
ENDPROC(_start_dma_code)
|
||||
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
|
||||
|
||||
.data
|
||||
|
||||
/*
|
||||
* Set up the usable of RAM stuff. Size of RAM is determined then
|
||||
* an initial stack set up at the end.
|
||||
*/
|
||||
|
||||
.align 4
|
||||
__rambase:
|
||||
.long 0
|
||||
__ramstart:
|
||||
.long 0
|
||||
__ramend:
|
||||
.long 0
|
||||
|
||||
@ -5,5 +5,3 @@
|
||||
extra-y := head.o
|
||||
|
||||
obj-y := ints-priority.o dma.o
|
||||
|
||||
obj-$(CONFIG_CPU_FREQ) += cpu.o
|
||||
|
||||
@ -304,6 +304,25 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
|
||||
|
||||
#include <linux/serial_8250.h>
|
||||
@ -403,6 +422,10 @@ static struct platform_device *h8606_devices[] __initdata = {
|
||||
&serial8250_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
|
||||
&opencores_kbd_device,
|
||||
#endif
|
||||
@ -411,7 +434,7 @@ static struct platform_device *h8606_devices[] __initdata = {
|
||||
static int __init H8606_init(void)
|
||||
{
|
||||
printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||
|
||||
@ -26,6 +26,12 @@ config H8606_HVSISTEMAS
|
||||
help
|
||||
HV Sistemas H8606 board support.
|
||||
|
||||
config BFIN532_IP0X
|
||||
bool "IP04/IP08 IP-PBX"
|
||||
depends on (BF532)
|
||||
help
|
||||
Core support for IP04/IP04 open hardware IP-PBX.
|
||||
|
||||
config GENERIC_BF533_BOARD
|
||||
bool "Generic"
|
||||
help
|
||||
|
||||
@ -4,6 +4,7 @@
|
||||
|
||||
obj-$(CONFIG_GENERIC_BF533_BOARD) += generic_board.o
|
||||
obj-$(CONFIG_BFIN533_STAMP) += stamp.o
|
||||
obj-$(CONFIG_BFIN532_IP0X) += ip0x.o
|
||||
obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o
|
||||
obj-$(CONFIG_BFIN533_BLUETECHNIX_CM) += cm_bf533.o
|
||||
obj-$(CONFIG_H8606_HVSISTEMAS) += H8606.o
|
||||
|
||||
@ -234,6 +234,25 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||
static struct platform_device bfin_sport0_uart_device = {
|
||||
.name = "bfin-sport-uart",
|
||||
@ -327,6 +346,10 @@ static struct platform_device *cm_bf533_devices[] __initdata = {
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||
&bfin_sport0_uart_device,
|
||||
&bfin_sport1_uart_device,
|
||||
@ -355,7 +378,7 @@ static struct platform_device *cm_bf533_devices[] __initdata = {
|
||||
|
||||
static int __init cm_bf533_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||
|
||||
@ -237,6 +237,25 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
|
||||
#define PATA_INT 55
|
||||
|
||||
@ -352,6 +371,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
|
||||
&bfin_pata_device,
|
||||
#endif
|
||||
@ -369,7 +392,7 @@ static struct platform_device *ezkit_devices[] __initdata = {
|
||||
|
||||
static int __init ezkit_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||
|
||||
@ -84,7 +84,7 @@ static struct platform_device *generic_board_devices[] __initdata = {
|
||||
|
||||
static int __init generic_board_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
return platform_add_devices(generic_board_devices, ARRAY_SIZE(generic_board_devices));
|
||||
}
|
||||
|
||||
|
||||
303
arch/blackfin/mach-bf533/boards/ip0x.c
Normal file
303
arch/blackfin/mach-bf533/boards/ip0x.c
Normal file
@ -0,0 +1,303 @@
|
||||
/*
|
||||
* File: arch/blackfin/mach-bf533/ip0x.c
|
||||
* Based on: arch/blackfin/mach-bf533/bf1.c
|
||||
* Based on: arch/blackfin/mach-bf533/stamp.c
|
||||
* Author: Ivan Danov <idanov@gmail.com>
|
||||
* Modified for IP0X David Rowe
|
||||
*
|
||||
* Created: 2007
|
||||
* Description: Board info file for the IP04/IP08 boards, which
|
||||
* are derived from the BlackfinOne V2.0 boards.
|
||||
*
|
||||
* Modified:
|
||||
* COpyright 2007 David Rowe
|
||||
* Copyright 2006 Intratrade Ltd.
|
||||
* Copyright 2005 National ICT Australia (NICTA)
|
||||
* Copyright 2004-2006 Analog Devices Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see the file COPYING, or write
|
||||
* to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/flash.h>
|
||||
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
|
||||
#include <linux/usb/isp1362.h>
|
||||
#endif
|
||||
#include <asm/irq.h>
|
||||
#include <asm/bfin5xx_spi.h>
|
||||
|
||||
/*
|
||||
* Name the Board for the /proc/cpuinfo
|
||||
*/
|
||||
const char bfin_board_name[] = "IP04/IP08";
|
||||
|
||||
/*
|
||||
* Driver needs to know address, irq and flag pin.
|
||||
*/
|
||||
#if defined(CONFIG_BFIN532_IP0X)
|
||||
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
|
||||
|
||||
#include <linux/dm9000.h>
|
||||
|
||||
static struct resource dm9000_resource1[] = {
|
||||
{
|
||||
.start = 0x20100000,
|
||||
.end = 0x20100000 + 1,
|
||||
.flags = IORESOURCE_MEM
|
||||
},{
|
||||
.start = 0x20100000 + 2,
|
||||
.end = 0x20100000 + 3,
|
||||
.flags = IORESOURCE_MEM
|
||||
},{
|
||||
.start = IRQ_PF15,
|
||||
.end = IRQ_PF15,
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource dm9000_resource2[] = {
|
||||
{
|
||||
.start = 0x20200000,
|
||||
.end = 0x20200000 + 1,
|
||||
.flags = IORESOURCE_MEM
|
||||
},{
|
||||
.start = 0x20200000 + 2,
|
||||
.end = 0x20200000 + 3,
|
||||
.flags = IORESOURCE_MEM
|
||||
},{
|
||||
.start = IRQ_PF14,
|
||||
.end = IRQ_PF14,
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
|
||||
}
|
||||
};
|
||||
|
||||
/*
|
||||
* for the moment we limit ourselves to 16bit IO until some
|
||||
* better IO routines can be written and tested
|
||||
*/
|
||||
static struct dm9000_plat_data dm9000_platdata1 = {
|
||||
.flags = DM9000_PLATF_16BITONLY,
|
||||
};
|
||||
|
||||
static struct platform_device dm9000_device1 = {
|
||||
.name = "dm9000",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(dm9000_resource1),
|
||||
.resource = dm9000_resource1,
|
||||
.dev = {
|
||||
.platform_data = &dm9000_platdata1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct dm9000_plat_data dm9000_platdata2 = {
|
||||
.flags = DM9000_PLATF_16BITONLY,
|
||||
};
|
||||
|
||||
static struct platform_device dm9000_device2 = {
|
||||
.name = "dm9000",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(dm9000_resource2),
|
||||
.resource = dm9000_resource2,
|
||||
.dev = {
|
||||
.platform_data = &dm9000_platdata2,
|
||||
}
|
||||
};
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
/* all SPI peripherals info goes here */
|
||||
|
||||
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
|
||||
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
|
||||
/*
|
||||
* CPOL (Clock Polarity)
|
||||
* 0 - Active high SCK
|
||||
* 1 - Active low SCK
|
||||
* CPHA (Clock Phase) Selects transfer format and operation mode
|
||||
* 0 - SCLK toggles from middle of the first data bit, slave select
|
||||
* pins controlled by hardware.
|
||||
* 1 - SCLK toggles from beginning of first data bit, slave select
|
||||
* pins controller by user software.
|
||||
* .ctl_reg = 0x1c00, * CPOL=1,CPHA=1,Sandisk 1G work
|
||||
* NO NO .ctl_reg = 0x1800, * CPOL=1,CPHA=0
|
||||
* NO NO .ctl_reg = 0x1400, * CPOL=0,CPHA=1
|
||||
*/
|
||||
.ctl_reg = 0x1000, /* CPOL=0,CPHA=0,Sandisk 1G work */
|
||||
.enable_dma = 0, /* if 1 - block!!! */
|
||||
.bits_per_word = 8,
|
||||
.cs_change_per_word = 0,
|
||||
};
|
||||
#endif
|
||||
|
||||
/* Notice: for blackfin, the speed_hz is the value of register
|
||||
* SPI_BAUD, not the real baudrate */
|
||||
static struct spi_board_info bfin_spi_board_info[] __initdata = {
|
||||
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
|
||||
{
|
||||
.modalias = "spi_mmc",
|
||||
.max_speed_hz = 2,
|
||||
.bus_num = 1,
|
||||
.chip_select = CONFIG_SPI_MMC_CS_CHAN,
|
||||
.platform_data = NULL,
|
||||
.controller_data = &spi_mmc_chip_info,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
/* SPI controller data */
|
||||
static struct bfin5xx_spi_master spi_bfin_master_info = {
|
||||
.num_chipselect = 8,
|
||||
.enable_dma = 1, /* master has the ability to do dma transfer */
|
||||
};
|
||||
|
||||
static struct platform_device spi_bfin_master_device = {
|
||||
.name = "bfin-spi-master",
|
||||
.id = 1, /* Bus number */
|
||||
.dev = {
|
||||
.platform_data = &spi_bfin_master_info, /* Passed to driver */
|
||||
},
|
||||
};
|
||||
#endif /* spi master and devices */
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
||||
static struct resource bfin_uart_resources[] = {
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device bfin_uart_device = {
|
||||
.name = "bfin-uart",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(bfin_uart_resources),
|
||||
.resource = bfin_uart_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
|
||||
static struct resource isp1362_hcd_resources[] = {
|
||||
{
|
||||
.start = 0x20300000,
|
||||
.end = 0x20300000 + 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},{
|
||||
.start = 0x20300000 + 2,
|
||||
.end = 0x20300000 + 3,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},{
|
||||
.start = IRQ_PF11,
|
||||
.end = IRQ_PF11,
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct isp1362_platform_data isp1362_priv = {
|
||||
.sel15Kres = 1,
|
||||
.clknotstop = 0,
|
||||
.oc_enable = 0, /* external OC */
|
||||
.int_act_high = 0,
|
||||
.int_edge_triggered = 0,
|
||||
.remote_wakeup_connected = 0,
|
||||
.no_power_switching = 1,
|
||||
.power_switching_mode = 0,
|
||||
};
|
||||
|
||||
static struct platform_device isp1362_hcd_device = {
|
||||
.name = "isp1362-hcd",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &isp1362_priv,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
|
||||
.resource = isp1362_hcd_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
static struct platform_device *ip0x_devices[] __initdata = {
|
||||
#if defined(CONFIG_BFIN532_IP0X)
|
||||
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
|
||||
&dm9000_device1,
|
||||
&dm9000_device2,
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
&spi_bfin_master_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
|
||||
&isp1362_hcd_device,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init ip0x_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices));
|
||||
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
for (i = 0; i < ARRAY_SIZE(bfin_spi_board_info); ++i) {
|
||||
int j = 1 << bfin_spi_board_info[i].chip_select;
|
||||
/* set spi cs to 1 */
|
||||
bfin_write_FIO_DIR(bfin_read_FIO_DIR() | j);
|
||||
bfin_write_FIO_FLAG_S(j);
|
||||
}
|
||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_initcall(ip0x_init);
|
||||
@ -40,6 +40,7 @@
|
||||
#endif
|
||||
#include <linux/ata_platform.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/bfin5xx_spi.h>
|
||||
#include <asm/reboot.h>
|
||||
@ -109,6 +110,7 @@ static struct platform_device net2272_bfin_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_BF5xx) || defined(CONFIG_MTD_BF5xx_MODULE)
|
||||
static struct mtd_partition stamp_partitions[] = {
|
||||
{
|
||||
.name = "Bootloader",
|
||||
@ -152,6 +154,7 @@ static struct platform_device stamp_flash_device = {
|
||||
.num_resources = ARRAY_SIZE(stamp_flash_resource),
|
||||
.resource = stamp_flash_resource,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
/* all SPI peripherals info goes here */
|
||||
@ -367,6 +370,25 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||
static struct platform_device bfin_sport0_uart_device = {
|
||||
.name = "bfin-sport-uart",
|
||||
@ -472,6 +494,31 @@ static struct platform_device i2c_gpio_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_I2C_BOARDINFO
|
||||
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||
#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
|
||||
{
|
||||
I2C_BOARD_INFO("ad7142_joystick", 0x2C),
|
||||
.type = "ad7142_joystick",
|
||||
.irq = 39,
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
|
||||
{
|
||||
I2C_BOARD_INFO("pcf8574_lcd", 0x22),
|
||||
.type = "pcf8574_lcd",
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
|
||||
{
|
||||
I2C_BOARD_INFO("pcf8574_keypad", 0x27),
|
||||
.type = "pcf8574_keypad",
|
||||
.irq = 39,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct platform_device *stamp_devices[] __initdata = {
|
||||
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
|
||||
&rtc_device,
|
||||
@ -497,6 +544,10 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||
&bfin_sport0_uart_device,
|
||||
&bfin_sport1_uart_device,
|
||||
@ -515,14 +566,23 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||
#endif
|
||||
|
||||
&bfin_gpios_device,
|
||||
|
||||
#if defined(CONFIG_MTD_BF5xx) || defined(CONFIG_MTD_BF5xx_MODULE)
|
||||
&stamp_flash_device,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init stamp_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
|
||||
#ifdef CONFIG_I2C_BOARDINFO
|
||||
i2c_register_board_info(0, bfin_i2c_board_info,
|
||||
ARRAY_SIZE(bfin_i2c_board_info));
|
||||
#endif
|
||||
|
||||
ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
@ -1,158 +0,0 @@
|
||||
/*
|
||||
* File: arch/blackfin/mach-bf533/cpu.c
|
||||
* Based on:
|
||||
* Author: michael.kang@analog.com
|
||||
*
|
||||
* Created:
|
||||
* Description: clock scaling for the bf533
|
||||
*
|
||||
* Modified:
|
||||
* Copyright 2004-2006 Analog Devices Inc.
|
||||
*
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see the file COPYING, or write
|
||||
* to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <asm/dpmc.h>
|
||||
#include <linux/fs.h>
|
||||
#include <asm/bfin-global.h>
|
||||
|
||||
/* CONFIG_CLKIN_HZ=11059200 */
|
||||
#define VCO5 (CONFIG_CLKIN_HZ*45) /*497664000 */
|
||||
#define VCO4 (CONFIG_CLKIN_HZ*36) /*398131200 */
|
||||
#define VCO3 (CONFIG_CLKIN_HZ*27) /*298598400 */
|
||||
#define VCO2 (CONFIG_CLKIN_HZ*18) /*199065600 */
|
||||
#define VCO1 (CONFIG_CLKIN_HZ*9) /*99532800 */
|
||||
#define VCO(x) VCO##x
|
||||
|
||||
#define FREQ(x) {VCO(x),VCO(x)/4},{VCO(x),VCO(x)/2},{VCO(x),VCO(x)}
|
||||
/* frequency */
|
||||
static struct cpufreq_frequency_table bf533_freq_table[] = {
|
||||
FREQ(1),
|
||||
FREQ(3),
|
||||
{VCO4, VCO4 / 2}, {VCO4, VCO4},
|
||||
FREQ(5),
|
||||
{0, CPUFREQ_TABLE_END},
|
||||
};
|
||||
|
||||
/*
|
||||
* dpmc_fops->ioctl()
|
||||
* static int dpmc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
||||
*/
|
||||
static int bf533_getfreq(unsigned int cpu)
|
||||
{
|
||||
unsigned long cclk_mhz, vco_mhz;
|
||||
|
||||
/* The driver only support single cpu */
|
||||
if (cpu == 0)
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_GET_CORECLOCK, &cclk_mhz);
|
||||
else
|
||||
cclk_mhz = -1;
|
||||
return cclk_mhz;
|
||||
}
|
||||
|
||||
static int bf533_target(struct cpufreq_policy *policy,
|
||||
unsigned int target_freq, unsigned int relation)
|
||||
{
|
||||
unsigned long cclk_mhz;
|
||||
unsigned long vco_mhz;
|
||||
unsigned long flags;
|
||||
unsigned int index, vco_index;
|
||||
int i;
|
||||
|
||||
struct cpufreq_freqs freqs;
|
||||
if (cpufreq_frequency_table_target(policy, bf533_freq_table, target_freq, relation, &index))
|
||||
return -EINVAL;
|
||||
cclk_mhz = bf533_freq_table[index].frequency;
|
||||
vco_mhz = bf533_freq_table[index].index;
|
||||
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_CHANGE_FREQUENCY, &vco_mhz);
|
||||
freqs.old = bf533_getfreq(0);
|
||||
freqs.new = cclk_mhz;
|
||||
freqs.cpu = 0;
|
||||
|
||||
pr_debug("cclk begin change to cclk %d,vco=%d,index=%d,target=%d,oldfreq=%d\n",
|
||||
cclk_mhz, vco_mhz, index, target_freq, freqs.old);
|
||||
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
|
||||
local_irq_save(flags);
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_SET_CCLK, &cclk_mhz);
|
||||
local_irq_restore(flags);
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
|
||||
|
||||
vco_mhz = get_vco();
|
||||
cclk_mhz = get_cclk();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
|
||||
* this platform, anyway.
|
||||
*/
|
||||
static int bf533_verify_speed(struct cpufreq_policy *policy)
|
||||
{
|
||||
return cpufreq_frequency_table_verify(policy, &bf533_freq_table);
|
||||
}
|
||||
|
||||
static int __init __bf533_cpu_init(struct cpufreq_policy *policy)
|
||||
{
|
||||
int result;
|
||||
|
||||
if (policy->cpu != 0)
|
||||
return -EINVAL;
|
||||
|
||||
policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
|
||||
/*Now ,only support one cpu */
|
||||
policy->cur = bf533_getfreq(0);
|
||||
cpufreq_frequency_table_get_attr(bf533_freq_table, policy->cpu);
|
||||
return cpufreq_frequency_table_cpuinfo(policy, bf533_freq_table);
|
||||
}
|
||||
|
||||
static struct freq_attr *bf533_freq_attr[] = {
|
||||
&cpufreq_freq_attr_scaling_available_freqs,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static struct cpufreq_driver bf533_driver = {
|
||||
.verify = bf533_verify_speed,
|
||||
.target = bf533_target,
|
||||
.get = bf533_getfreq,
|
||||
.init = __bf533_cpu_init,
|
||||
.name = "bf533",
|
||||
.owner = THIS_MODULE,
|
||||
.attr = bf533_freq_attr,
|
||||
};
|
||||
|
||||
static int __init bf533_cpu_init(void)
|
||||
{
|
||||
return cpufreq_register_driver(&bf533_driver);
|
||||
}
|
||||
|
||||
static void __exit bf533_cpu_exit(void)
|
||||
{
|
||||
cpufreq_unregister_driver(&bf533_driver);
|
||||
}
|
||||
|
||||
MODULE_AUTHOR("Mickael Kang");
|
||||
MODULE_DESCRIPTION("cpufreq driver for BF533 CPU");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
module_init(bf533_cpu_init);
|
||||
module_exit(bf533_cpu_exit);
|
||||
@ -26,10 +26,12 @@
|
||||
* to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <asm/blackfin.h>
|
||||
#include <asm/dma.h>
|
||||
|
||||
struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
(struct dma_register *) DMA0_NEXT_DESC_PTR,
|
||||
(struct dma_register *) DMA1_NEXT_DESC_PTR,
|
||||
(struct dma_register *) DMA2_NEXT_DESC_PTR,
|
||||
@ -43,6 +45,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
|
||||
(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
|
||||
};
|
||||
EXPORT_SYMBOL(dma_io_base_addr);
|
||||
|
||||
int channel2irq(unsigned int channel)
|
||||
{
|
||||
|
||||
@ -36,9 +36,6 @@
|
||||
#include <asm/mach/mem_init.h>
|
||||
#endif
|
||||
|
||||
.global __rambase
|
||||
.global __ramstart
|
||||
.global __ramend
|
||||
.extern ___bss_stop
|
||||
.extern ___bss_start
|
||||
.extern _bf53x_relocate_l1_mem
|
||||
@ -151,26 +148,26 @@ ENTRY(__start)
|
||||
|
||||
/* Initialise UART - when booting from u-boot, the UART is not disabled
|
||||
* so if we dont initalize here, our serial console gets hosed */
|
||||
p0.h = hi(UART_LCR);
|
||||
p0.l = lo(UART_LCR);
|
||||
p0.h = hi(BFIN_UART_LCR);
|
||||
p0.l = lo(BFIN_UART_LCR);
|
||||
r0 = 0x0(Z);
|
||||
w[p0] = r0.L; /* To enable DLL writes */
|
||||
ssync;
|
||||
|
||||
p0.h = hi(UART_DLL);
|
||||
p0.l = lo(UART_DLL);
|
||||
p0.h = hi(BFIN_UART_DLL);
|
||||
p0.l = lo(BFIN_UART_DLL);
|
||||
r0 = 0x0(Z);
|
||||
w[p0] = r0.L;
|
||||
ssync;
|
||||
|
||||
p0.h = hi(UART_DLH);
|
||||
p0.l = lo(UART_DLH);
|
||||
p0.h = hi(BFIN_UART_DLH);
|
||||
p0.l = lo(BFIN_UART_DLH);
|
||||
r0 = 0x00(Z);
|
||||
w[p0] = r0.L;
|
||||
ssync;
|
||||
|
||||
p0.h = hi(UART_GCTL);
|
||||
p0.l = lo(UART_GCTL);
|
||||
p0.h = hi(BFIN_UART_GCTL);
|
||||
p0.l = lo(BFIN_UART_GCTL);
|
||||
r0 = 0x0(Z);
|
||||
w[p0] = r0.L; /* To enable UART clock */
|
||||
ssync;
|
||||
@ -431,18 +428,3 @@ ENTRY(_start_dma_code)
|
||||
RTS;
|
||||
ENDPROC(_start_dma_code)
|
||||
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
|
||||
|
||||
.data
|
||||
|
||||
/*
|
||||
* Set up the usable of RAM stuff. Size of RAM is determined then
|
||||
* an initial stack set up at the end.
|
||||
*/
|
||||
|
||||
.align 4
|
||||
__rambase:
|
||||
.long 0
|
||||
__ramstart:
|
||||
.long 0
|
||||
__ramend:
|
||||
.long 0
|
||||
|
||||
@ -5,5 +5,3 @@
|
||||
extra-y := head.o
|
||||
|
||||
obj-y := ints-priority.o dma.o
|
||||
|
||||
obj-$(CONFIG_CPU_FREQ) += cpu.o
|
||||
|
||||
@ -325,6 +325,54 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
{
|
||||
.start = 0xFFC02000,
|
||||
.end = 0xFFC020FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
static struct resource bfin_twi0_resource[] = {
|
||||
[0] = {
|
||||
.start = TWI0_REGBASE,
|
||||
.end = TWI0_REGBASE,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_TWI,
|
||||
.end = IRQ_TWI,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device i2c_bfin_twi_device = {
|
||||
.name = "i2c-bfin-twi",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
|
||||
.resource = bfin_twi0_resource,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||
static struct platform_device bfin_sport0_uart_device = {
|
||||
.name = "bfin-sport-uart",
|
||||
@ -393,6 +441,14 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
&i2c_bfin_twi_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||
&bfin_sport0_uart_device,
|
||||
&bfin_sport1_uart_device,
|
||||
@ -425,7 +481,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
|
||||
|
||||
static int __init cm_bf537_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||
|
||||
@ -90,7 +90,7 @@ int __init bfin_isp1761_init(void)
|
||||
{
|
||||
unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
|
||||
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
|
||||
|
||||
return platform_add_devices(bfin_isp1761_devices, num_devices);
|
||||
@ -554,6 +554,32 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
{
|
||||
.start = 0xFFC02000,
|
||||
.end = 0xFFC020FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
static struct resource bfin_twi0_resource[] = {
|
||||
[0] = {
|
||||
@ -674,6 +700,10 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
&i2c_bfin_twi_device,
|
||||
#endif
|
||||
@ -690,7 +720,7 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||
|
||||
static int __init stamp_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
spi_register_board_info(bfin_spi_board_info,
|
||||
|
||||
@ -8,12 +8,12 @@
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/flash.h>
|
||||
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
|
||||
#include <linux/usb_isp1362.h>
|
||||
#include <linux/usb/isp1362.h>
|
||||
#endif
|
||||
#include <linux/ata_platform.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/usb_sl811.h>
|
||||
#include <linux/usb/sl811.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/bfin5xx_spi.h>
|
||||
#include <asm/reboot.h>
|
||||
@ -225,6 +225,32 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
{
|
||||
.start = 0xFFC02000,
|
||||
.end = 0xFFC020FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
static struct resource bfin_twi0_resource[] = {
|
||||
[0] = {
|
||||
@ -284,6 +310,10 @@ static struct platform_device *minotaur_devices[] __initdata = {
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
&i2c_bfin_twi_device,
|
||||
#endif
|
||||
@ -297,7 +327,7 @@ static struct platform_device *minotaur_devices[] __initdata = {
|
||||
|
||||
static int __init minotaur_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
spi_register_board_info(bfin_spi_board_info,
|
||||
|
||||
@ -452,6 +452,31 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
{
|
||||
.start = 0xFFC02000,
|
||||
.end = 0xFFC020FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct platform_device *stamp_devices[] __initdata = {
|
||||
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
|
||||
@ -493,11 +518,15 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init stamp_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
spi_register_board_info(bfin_spi_board_info,
|
||||
|
||||
@ -41,6 +41,7 @@
|
||||
#include <linux/ata_platform.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/usb/sl811.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/bfin5xx_spi.h>
|
||||
@ -90,7 +91,7 @@ int __init bfin_isp1761_init(void)
|
||||
{
|
||||
unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
|
||||
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
|
||||
|
||||
return platform_add_devices(bfin_isp1761_devices, num_devices);
|
||||
@ -353,6 +354,7 @@ static struct platform_device net2272_bfin_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
static struct mtd_partition stamp_partitions[] = {
|
||||
{
|
||||
.name = "Bootloader",
|
||||
@ -395,6 +397,7 @@ static struct platform_device stamp_flash_device = {
|
||||
.num_resources = 1,
|
||||
.resource = &stamp_flash_resource,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
/* all SPI peripherals info goes here */
|
||||
@ -500,6 +503,15 @@ static struct bfin5xx_spi_chip spidev_chip_info = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_DATAFLASH) \
|
||||
|| defined(CONFIG_MTD_DATAFLASH_MODULE)
|
||||
/* DataFlash chip */
|
||||
static struct bfin5xx_spi_chip data_flash_chip_info = {
|
||||
.enable_dma = 0, /* use dma transfer with this chip*/
|
||||
.bits_per_word = 8,
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct spi_board_info bfin_spi_board_info[] __initdata = {
|
||||
#if defined(CONFIG_MTD_M25P80) \
|
||||
|| defined(CONFIG_MTD_M25P80_MODULE)
|
||||
@ -514,7 +526,17 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
|
||||
.mode = SPI_MODE_3,
|
||||
},
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_DATAFLASH) \
|
||||
|| defined(CONFIG_MTD_DATAFLASH_MODULE)
|
||||
{ /* DataFlash chip */
|
||||
.modalias = "mtd_dataflash",
|
||||
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
|
||||
.bus_num = 0, /* Framework bus number */
|
||||
.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
|
||||
.controller_data = &data_flash_chip_info,
|
||||
.mode = SPI_MODE_3,
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_SPI_ADC_BF533) \
|
||||
|| defined(CONFIG_SPI_ADC_BF533_MODULE)
|
||||
{
|
||||
@ -676,6 +698,32 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
{
|
||||
.start = 0xFFC02000,
|
||||
.end = 0xFFC020FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
static struct resource bfin_twi0_resource[] = {
|
||||
[0] = {
|
||||
@ -698,6 +746,31 @@ static struct platform_device i2c_bfin_twi_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_I2C_BOARDINFO
|
||||
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||
#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
|
||||
{
|
||||
I2C_BOARD_INFO("ad7142_joystick", 0x2C),
|
||||
.type = "ad7142_joystick",
|
||||
.irq = 55,
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
|
||||
{
|
||||
I2C_BOARD_INFO("pcf8574_lcd", 0x22),
|
||||
.type = "pcf8574_lcd",
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
|
||||
{
|
||||
I2C_BOARD_INFO("pcf8574_keypad", 0x27),
|
||||
.type = "pcf8574_keypad",
|
||||
.irq = 72,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||
static struct platform_device bfin_sport0_uart_device = {
|
||||
.name = "bfin-sport-uart",
|
||||
@ -800,6 +873,10 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
&i2c_bfin_twi_device,
|
||||
#endif
|
||||
@ -818,12 +895,21 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||
#endif
|
||||
|
||||
&bfin_gpios_device,
|
||||
|
||||
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
&stamp_flash_device,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init stamp_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
|
||||
#ifdef CONFIG_I2C_BOARDINFO
|
||||
i2c_register_board_info(0, bfin_i2c_board_info,
|
||||
ARRAY_SIZE(bfin_i2c_board_info));
|
||||
#endif
|
||||
|
||||
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
spi_register_board_info(bfin_spi_board_info,
|
||||
@ -833,6 +919,7 @@ static int __init stamp_init(void)
|
||||
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
|
||||
irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -1,159 +0,0 @@
|
||||
/*
|
||||
* File: arch/blackfin/mach-bf537/cpu.c
|
||||
* Based on:
|
||||
* Author: michael.kang@analog.com
|
||||
*
|
||||
* Created:
|
||||
* Description: clock scaling for the bf537
|
||||
*
|
||||
* Modified:
|
||||
* Copyright 2004-2006 Analog Devices Inc.
|
||||
*
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see the file COPYING, or write
|
||||
* to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <asm/dpmc.h>
|
||||
#include <linux/fs.h>
|
||||
#include <asm/bfin-global.h>
|
||||
|
||||
/* CONFIG_CLKIN_HZ=11059200 */
|
||||
#define VCO5 (CONFIG_CLKIN_HZ*45) /*497664000 */
|
||||
#define VCO4 (CONFIG_CLKIN_HZ*36) /*398131200 */
|
||||
#define VCO3 (CONFIG_CLKIN_HZ*27) /*298598400 */
|
||||
#define VCO2 (CONFIG_CLKIN_HZ*18) /*199065600 */
|
||||
#define VCO1 (CONFIG_CLKIN_HZ*9) /*99532800 */
|
||||
#define VCO(x) VCO##x
|
||||
|
||||
#define MFREQ(x) {VCO(x),VCO(x)/4},{VCO(x),VCO(x)/2},{VCO(x),VCO(x)}
|
||||
/* frequency */
|
||||
static struct cpufreq_frequency_table bf537_freq_table[] = {
|
||||
MFREQ(1),
|
||||
MFREQ(3),
|
||||
{VCO4, VCO4 / 2}, {VCO4, VCO4},
|
||||
MFREQ(5),
|
||||
{0, CPUFREQ_TABLE_END},
|
||||
};
|
||||
|
||||
/*
|
||||
* dpmc_fops->ioctl()
|
||||
* static int dpmc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
||||
*/
|
||||
static int bf537_getfreq(unsigned int cpu)
|
||||
{
|
||||
unsigned long cclk_mhz;
|
||||
|
||||
/* The driver only support single cpu */
|
||||
if (cpu == 0)
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_GET_CORECLOCK, &cclk_mhz);
|
||||
else
|
||||
cclk_mhz = -1;
|
||||
|
||||
return cclk_mhz;
|
||||
}
|
||||
|
||||
static int bf537_target(struct cpufreq_policy *policy,
|
||||
unsigned int target_freq, unsigned int relation)
|
||||
{
|
||||
unsigned long cclk_mhz;
|
||||
unsigned long vco_mhz;
|
||||
unsigned long flags;
|
||||
unsigned int index;
|
||||
struct cpufreq_freqs freqs;
|
||||
|
||||
if (cpufreq_frequency_table_target(policy, bf537_freq_table, target_freq, relation, &index))
|
||||
return -EINVAL;
|
||||
|
||||
cclk_mhz = bf537_freq_table[index].frequency;
|
||||
vco_mhz = bf537_freq_table[index].index;
|
||||
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_CHANGE_FREQUENCY, &vco_mhz);
|
||||
freqs.old = bf537_getfreq(0);
|
||||
freqs.new = cclk_mhz;
|
||||
freqs.cpu = 0;
|
||||
|
||||
pr_debug("cclk begin change to cclk %d,vco=%d,index=%d,target=%d,oldfreq=%d\n",
|
||||
cclk_mhz, vco_mhz, index, target_freq, freqs.old);
|
||||
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
|
||||
local_irq_save(flags);
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_SET_CCLK, &cclk_mhz);
|
||||
local_irq_restore(flags);
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
|
||||
|
||||
vco_mhz = get_vco();
|
||||
cclk_mhz = get_cclk();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
|
||||
* this platform, anyway.
|
||||
*/
|
||||
static int bf537_verify_speed(struct cpufreq_policy *policy)
|
||||
{
|
||||
return cpufreq_frequency_table_verify(policy, &bf537_freq_table);
|
||||
}
|
||||
|
||||
static int __init __bf537_cpu_init(struct cpufreq_policy *policy)
|
||||
{
|
||||
if (policy->cpu != 0)
|
||||
return -EINVAL;
|
||||
|
||||
policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
|
||||
|
||||
policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
|
||||
/*Now ,only support one cpu */
|
||||
policy->cur = bf537_getfreq(0);
|
||||
cpufreq_frequency_table_get_attr(bf537_freq_table, policy->cpu);
|
||||
return cpufreq_frequency_table_cpuinfo(policy, bf537_freq_table);
|
||||
}
|
||||
|
||||
static struct freq_attr *bf537_freq_attr[] = {
|
||||
&cpufreq_freq_attr_scaling_available_freqs,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static struct cpufreq_driver bf537_driver = {
|
||||
.verify = bf537_verify_speed,
|
||||
.target = bf537_target,
|
||||
.get = bf537_getfreq,
|
||||
.init = __bf537_cpu_init,
|
||||
.name = "bf537",
|
||||
.owner = THIS_MODULE,
|
||||
.attr = bf537_freq_attr,
|
||||
};
|
||||
|
||||
static int __init bf537_cpu_init(void)
|
||||
{
|
||||
return cpufreq_register_driver(&bf537_driver);
|
||||
}
|
||||
|
||||
static void __exit bf537_cpu_exit(void)
|
||||
{
|
||||
cpufreq_unregister_driver(&bf537_driver);
|
||||
}
|
||||
|
||||
MODULE_AUTHOR("Mickael Kang");
|
||||
MODULE_DESCRIPTION("cpufreq driver for BF537 CPU");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
module_init(bf537_cpu_init);
|
||||
module_exit(bf537_cpu_exit);
|
||||
@ -26,10 +26,12 @@
|
||||
* to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <asm/blackfin.h>
|
||||
#include <asm/dma.h>
|
||||
|
||||
struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
(struct dma_register *) DMA0_NEXT_DESC_PTR,
|
||||
(struct dma_register *) DMA1_NEXT_DESC_PTR,
|
||||
(struct dma_register *) DMA2_NEXT_DESC_PTR,
|
||||
@ -47,6 +49,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
|
||||
(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
|
||||
};
|
||||
EXPORT_SYMBOL(dma_io_base_addr);
|
||||
|
||||
int channel2irq(unsigned int channel)
|
||||
{
|
||||
|
||||
@ -37,9 +37,6 @@
|
||||
#include <asm/mach/mem_init.h>
|
||||
#endif
|
||||
|
||||
.global __rambase
|
||||
.global __ramstart
|
||||
.global __ramend
|
||||
.extern ___bss_stop
|
||||
.extern ___bss_start
|
||||
.extern _bf53x_relocate_l1_mem
|
||||
@ -180,40 +177,28 @@ ENTRY(__start)
|
||||
SSYNC;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BF537_PORT_H
|
||||
p0.h = hi(PORTH_FER);
|
||||
p0.l = lo(PORTH_FER);
|
||||
R0.L = W[P0]; /* Read */
|
||||
SSYNC;
|
||||
R0 = 0x0000;
|
||||
W[P0] = R0.L; /* Write */
|
||||
SSYNC;
|
||||
W[P0] = R0.L; /* Disable peripheral function of PORTH */
|
||||
SSYNC;
|
||||
#endif
|
||||
|
||||
/* Initialise UART - when booting from u-boot, the UART is not disabled
|
||||
* so if we dont initalize here, our serial console gets hosed */
|
||||
p0.h = hi(UART_LCR);
|
||||
p0.l = lo(UART_LCR);
|
||||
p0.h = hi(BFIN_UART_LCR);
|
||||
p0.l = lo(BFIN_UART_LCR);
|
||||
r0 = 0x0(Z);
|
||||
w[p0] = r0.L; /* To enable DLL writes */
|
||||
ssync;
|
||||
|
||||
p0.h = hi(UART_DLL);
|
||||
p0.l = lo(UART_DLL);
|
||||
p0.h = hi(BFIN_UART_DLL);
|
||||
p0.l = lo(BFIN_UART_DLL);
|
||||
r0 = 0x0(Z);
|
||||
w[p0] = r0.L;
|
||||
ssync;
|
||||
|
||||
p0.h = hi(UART_DLH);
|
||||
p0.l = lo(UART_DLH);
|
||||
p0.h = hi(BFIN_UART_DLH);
|
||||
p0.l = lo(BFIN_UART_DLH);
|
||||
r0 = 0x00(Z);
|
||||
w[p0] = r0.L;
|
||||
ssync;
|
||||
|
||||
p0.h = hi(UART_GCTL);
|
||||
p0.l = lo(UART_GCTL);
|
||||
p0.h = hi(BFIN_UART_GCTL);
|
||||
p0.l = lo(BFIN_UART_GCTL);
|
||||
r0 = 0x0(Z);
|
||||
w[p0] = r0.L; /* To enable UART clock */
|
||||
ssync;
|
||||
@ -483,18 +468,3 @@ ENTRY(_start_dma_code)
|
||||
RTS;
|
||||
ENDPROC(_start_dma_code)
|
||||
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
|
||||
|
||||
.data
|
||||
|
||||
/*
|
||||
* Set up the usable of RAM stuff. Size of RAM is determined then
|
||||
* an initial stack set up at the end.
|
||||
*/
|
||||
|
||||
.align 4
|
||||
__rambase:
|
||||
.long 0
|
||||
__ramstart:
|
||||
.long 0
|
||||
__ramend:
|
||||
.long 0
|
||||
|
||||
@ -5,5 +5,3 @@
|
||||
extra-y := head.o
|
||||
|
||||
obj-y := ints-priority.o dma.o
|
||||
|
||||
obj-$(CONFIG_CPU_FREQ) += cpu.o
|
||||
|
||||
@ -8,5 +8,11 @@ config BFIN548_EZKIT
|
||||
bool "BF548-EZKIT"
|
||||
help
|
||||
BFIN548-EZKIT board support.
|
||||
|
||||
config BFIN548_BLUETECHNIX_CM
|
||||
bool "Bluetechnix CM-BF548"
|
||||
depends on (BF548)
|
||||
help
|
||||
CM-BF548 support for DEV-Board.
|
||||
|
||||
endchoice
|
||||
|
||||
@ -3,3 +3,4 @@
|
||||
#
|
||||
|
||||
obj-$(CONFIG_BFIN548_EZKIT) += ezkit.o led.o
|
||||
obj-$(CONFIG_BFIN548_BLUETECHNIX_CM) += cm_bf548.o
|
||||
|
||||
664
arch/blackfin/mach-bf548/boards/cm_bf548.c
Normal file
664
arch/blackfin/mach-bf548/boards/cm_bf548.c
Normal file
@ -0,0 +1,664 @@
|
||||
/*
|
||||
* File: arch/blackfin/mach-bf548/boards/cm_bf548.c
|
||||
* Based on: arch/blackfin/mach-bf537/boards/ezkit.c
|
||||
* Author: Aidan Williams <aidan@nicta.com.au>
|
||||
*
|
||||
* Created:
|
||||
* Description:
|
||||
*
|
||||
* Modified:
|
||||
* Copyright 2005 National ICT Australia (NICTA)
|
||||
* Copyright 2004-2008 Analog Devices Inc.
|
||||
*
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see the file COPYING, or write
|
||||
* to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/flash.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/usb/musb.h>
|
||||
#include <asm/bfin5xx_spi.h>
|
||||
#include <asm/cplb.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/gpio.h>
|
||||
#include <asm/nand.h>
|
||||
#include <asm/portmux.h>
|
||||
#include <asm/mach/bf54x_keys.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/spi/ad7877.h>
|
||||
|
||||
/*
|
||||
* Name the Board for the /proc/cpuinfo
|
||||
*/
|
||||
const char bfin_board_name[] = "Bluetechnix CM-BF548";
|
||||
|
||||
/*
|
||||
* Driver needs to know address, irq and flag pin.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
|
||||
|
||||
#include <asm/mach/bf54x-lq043.h>
|
||||
|
||||
static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
|
||||
.width = 480,
|
||||
.height = 272,
|
||||
.xres = {480, 480, 480},
|
||||
.yres = {272, 272, 272},
|
||||
.bpp = {24, 24, 24},
|
||||
.disp = GPIO_PE3,
|
||||
};
|
||||
|
||||
static struct resource bf54x_lq043_resources[] = {
|
||||
{
|
||||
.start = IRQ_EPPI0_ERR,
|
||||
.end = IRQ_EPPI0_ERR,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device bf54x_lq043_device = {
|
||||
.name = "bf54x-lq043",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(bf54x_lq043_resources),
|
||||
.resource = bf54x_lq043_resources,
|
||||
.dev = {
|
||||
.platform_data = &bf54x_lq043_data,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
|
||||
static unsigned int bf548_keymap[] = {
|
||||
KEYVAL(0, 0, KEY_ENTER),
|
||||
KEYVAL(0, 1, KEY_HELP),
|
||||
KEYVAL(0, 2, KEY_0),
|
||||
KEYVAL(0, 3, KEY_BACKSPACE),
|
||||
KEYVAL(1, 0, KEY_TAB),
|
||||
KEYVAL(1, 1, KEY_9),
|
||||
KEYVAL(1, 2, KEY_8),
|
||||
KEYVAL(1, 3, KEY_7),
|
||||
KEYVAL(2, 0, KEY_DOWN),
|
||||
KEYVAL(2, 1, KEY_6),
|
||||
KEYVAL(2, 2, KEY_5),
|
||||
KEYVAL(2, 3, KEY_4),
|
||||
KEYVAL(3, 0, KEY_UP),
|
||||
KEYVAL(3, 1, KEY_3),
|
||||
KEYVAL(3, 2, KEY_2),
|
||||
KEYVAL(3, 3, KEY_1),
|
||||
};
|
||||
|
||||
static struct bfin_kpad_platform_data bf54x_kpad_data = {
|
||||
.rows = 4,
|
||||
.cols = 4,
|
||||
.keymap = bf548_keymap,
|
||||
.keymapsize = ARRAY_SIZE(bf548_keymap),
|
||||
.repeat = 0,
|
||||
.debounce_time = 5000, /* ns (5ms) */
|
||||
.coldrive_time = 1000, /* ns (1ms) */
|
||||
.keyup_test_interval = 50, /* ms (50ms) */
|
||||
};
|
||||
|
||||
static struct resource bf54x_kpad_resources[] = {
|
||||
{
|
||||
.start = IRQ_KEY,
|
||||
.end = IRQ_KEY,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device bf54x_kpad_device = {
|
||||
.name = "bf54x-keys",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(bf54x_kpad_resources),
|
||||
.resource = bf54x_kpad_resources,
|
||||
.dev = {
|
||||
.platform_data = &bf54x_kpad_data,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
|
||||
static struct platform_device rtc_device = {
|
||||
.name = "rtc-bfin",
|
||||
.id = -1,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
||||
static struct resource bfin_uart_resources[] = {
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART1
|
||||
{
|
||||
.start = 0xFFC02000,
|
||||
.end = 0xFFC020FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART2
|
||||
{
|
||||
.start = 0xFFC02100,
|
||||
.end = 0xFFC021FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART3
|
||||
{
|
||||
.start = 0xFFC03100,
|
||||
.end = 0xFFC031FF,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_uart_device = {
|
||||
.name = "bfin-uart",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(bfin_uart_resources),
|
||||
.resource = bfin_uart_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
{
|
||||
.start = 0xFFC02000,
|
||||
.end = 0xFFC020FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR2
|
||||
{
|
||||
.start = 0xFFC02100,
|
||||
.end = 0xFFC021FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR3
|
||||
{
|
||||
.start = 0xFFC03100,
|
||||
.end = 0xFFC031FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
|
||||
static struct resource smsc911x_resources[] = {
|
||||
{
|
||||
.name = "smsc911x-memory",
|
||||
.start = 0x24000000,
|
||||
.end = 0x24000000 + 0xFF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_PE6,
|
||||
.end = IRQ_PE6,
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
|
||||
},
|
||||
};
|
||||
static struct platform_device smsc911x_device = {
|
||||
.name = "smsc911x",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(smsc911x_resources),
|
||||
.resource = smsc911x_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
|
||||
static struct resource musb_resources[] = {
|
||||
[0] = {
|
||||
.start = 0xFFC03C00,
|
||||
.end = 0xFFC040FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = { /* general IRQ */
|
||||
.start = IRQ_USB_INT0,
|
||||
.end = IRQ_USB_INT0,
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
|
||||
},
|
||||
[2] = { /* DMA IRQ */
|
||||
.start = IRQ_USB_DMA,
|
||||
.end = IRQ_USB_DMA,
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct musb_hdrc_platform_data musb_plat = {
|
||||
#if defined(CONFIG_USB_MUSB_OTG)
|
||||
.mode = MUSB_OTG,
|
||||
#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
|
||||
.mode = MUSB_HOST,
|
||||
#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
|
||||
.mode = MUSB_PERIPHERAL,
|
||||
#endif
|
||||
.multipoint = 0,
|
||||
};
|
||||
|
||||
static u64 musb_dmamask = ~(u32)0;
|
||||
|
||||
static struct platform_device musb_device = {
|
||||
.name = "musb_hdrc",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &musb_dmamask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
.platform_data = &musb_plat,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(musb_resources),
|
||||
.resource = musb_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
|
||||
static struct resource bfin_atapi_resources[] = {
|
||||
{
|
||||
.start = 0xFFC03800,
|
||||
.end = 0xFFC0386F,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_ATAPI_ERR,
|
||||
.end = IRQ_ATAPI_ERR,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device bfin_atapi_device = {
|
||||
.name = "pata-bf54x",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(bfin_atapi_resources),
|
||||
.resource = bfin_atapi_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
|
||||
static struct mtd_partition partition_info[] = {
|
||||
{
|
||||
.name = "Linux Kernel",
|
||||
.offset = 0,
|
||||
.size = 4 * SIZE_1M,
|
||||
},
|
||||
{
|
||||
.name = "File System",
|
||||
.offset = 4 * SIZE_1M,
|
||||
.size = (256 - 4) * SIZE_1M,
|
||||
},
|
||||
};
|
||||
|
||||
static struct bf5xx_nand_platform bf5xx_nand_platform = {
|
||||
.page_size = NFC_PG_SIZE_256,
|
||||
.data_width = NFC_NWIDTH_8,
|
||||
.partitions = partition_info,
|
||||
.nr_partitions = ARRAY_SIZE(partition_info),
|
||||
.rd_dly = 3,
|
||||
.wr_dly = 3,
|
||||
};
|
||||
|
||||
static struct resource bf5xx_nand_resources[] = {
|
||||
{
|
||||
.start = 0xFFC03B00,
|
||||
.end = 0xFFC03B4F,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = CH_NFC,
|
||||
.end = CH_NFC,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device bf5xx_nand_device = {
|
||||
.name = "bf5xx-nand",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bf5xx_nand_resources),
|
||||
.resource = bf5xx_nand_resources,
|
||||
.dev = {
|
||||
.platform_data = &bf5xx_nand_platform,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
|
||||
static struct platform_device bf54x_sdh_device = {
|
||||
.name = "bfin-sdh",
|
||||
.id = 0,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
/* all SPI peripherals info goes here */
|
||||
#if defined(CONFIG_MTD_M25P80) \
|
||||
|| defined(CONFIG_MTD_M25P80_MODULE)
|
||||
/* SPI flash chip (m25p16) */
|
||||
static struct mtd_partition bfin_spi_flash_partitions[] = {
|
||||
{
|
||||
.name = "bootloader",
|
||||
.size = 0x00040000,
|
||||
.offset = 0,
|
||||
.mask_flags = MTD_CAP_ROM
|
||||
}, {
|
||||
.name = "linux kernel",
|
||||
.size = 0x1c0000,
|
||||
.offset = 0x40000
|
||||
}
|
||||
};
|
||||
|
||||
static struct flash_platform_data bfin_spi_flash_data = {
|
||||
.name = "m25p80",
|
||||
.parts = bfin_spi_flash_partitions,
|
||||
.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
|
||||
.type = "m25p16",
|
||||
};
|
||||
|
||||
static struct bfin5xx_spi_chip spi_flash_chip_info = {
|
||||
.enable_dma = 0, /* use dma transfer with this chip*/
|
||||
.bits_per_word = 8,
|
||||
.cs_change_per_word = 0,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
||||
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
|
||||
.cs_change_per_word = 0,
|
||||
.enable_dma = 0,
|
||||
.bits_per_word = 16,
|
||||
};
|
||||
|
||||
static const struct ad7877_platform_data bfin_ad7877_ts_info = {
|
||||
.model = 7877,
|
||||
.vref_delay_usecs = 50, /* internal, no capacitor */
|
||||
.x_plate_ohms = 419,
|
||||
.y_plate_ohms = 486,
|
||||
.pressure_max = 1000,
|
||||
.pressure_min = 0,
|
||||
.stopacq_polarity = 1,
|
||||
.first_conversion_delay = 3,
|
||||
.acquisition_time = 1,
|
||||
.averaging = 1,
|
||||
.pen_down_acc_interval = 1,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
|
||||
static struct bfin5xx_spi_chip spidev_chip_info = {
|
||||
.enable_dma = 0,
|
||||
.bits_per_word = 8,
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct spi_board_info bf54x_spi_board_info[] __initdata = {
|
||||
#if defined(CONFIG_MTD_M25P80) \
|
||||
|| defined(CONFIG_MTD_M25P80_MODULE)
|
||||
{
|
||||
/* the modalias must be the same as spi device driver name */
|
||||
.modalias = "m25p80", /* Name of spi_driver for this device */
|
||||
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
|
||||
.bus_num = 0, /* Framework bus number */
|
||||
.chip_select = 1, /* SPI_SSEL1*/
|
||||
.platform_data = &bfin_spi_flash_data,
|
||||
.controller_data = &spi_flash_chip_info,
|
||||
.mode = SPI_MODE_3,
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
||||
{
|
||||
.modalias = "ad7877",
|
||||
.platform_data = &bfin_ad7877_ts_info,
|
||||
.irq = IRQ_PJ11,
|
||||
.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
|
||||
.bus_num = 0,
|
||||
.chip_select = 2,
|
||||
.controller_data = &spi_ad7877_chip_info,
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
|
||||
{
|
||||
.modalias = "spidev",
|
||||
.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
|
||||
.bus_num = 0,
|
||||
.chip_select = 1,
|
||||
.controller_data = &spidev_chip_info,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
/* SPI (0) */
|
||||
static struct resource bfin_spi0_resource[] = {
|
||||
[0] = {
|
||||
.start = SPI0_REGBASE,
|
||||
.end = SPI0_REGBASE + 0xFF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = CH_SPI0,
|
||||
.end = CH_SPI0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
}
|
||||
};
|
||||
|
||||
/* SPI (1) */
|
||||
static struct resource bfin_spi1_resource[] = {
|
||||
[0] = {
|
||||
.start = SPI1_REGBASE,
|
||||
.end = SPI1_REGBASE + 0xFF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = CH_SPI1,
|
||||
.end = CH_SPI1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
}
|
||||
};
|
||||
|
||||
/* SPI controller data */
|
||||
static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
|
||||
.num_chipselect = 8,
|
||||
.enable_dma = 1, /* master has the ability to do dma transfer */
|
||||
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
|
||||
};
|
||||
|
||||
static struct platform_device bf54x_spi_master0 = {
|
||||
.name = "bfin-spi",
|
||||
.id = 0, /* Bus number */
|
||||
.num_resources = ARRAY_SIZE(bfin_spi0_resource),
|
||||
.resource = bfin_spi0_resource,
|
||||
.dev = {
|
||||
.platform_data = &bf54x_spi_master_info0, /* Passed to driver */
|
||||
},
|
||||
};
|
||||
|
||||
static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
|
||||
.num_chipselect = 8,
|
||||
.enable_dma = 1, /* master has the ability to do dma transfer */
|
||||
.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
|
||||
};
|
||||
|
||||
static struct platform_device bf54x_spi_master1 = {
|
||||
.name = "bfin-spi",
|
||||
.id = 1, /* Bus number */
|
||||
.num_resources = ARRAY_SIZE(bfin_spi1_resource),
|
||||
.resource = bfin_spi1_resource,
|
||||
.dev = {
|
||||
.platform_data = &bf54x_spi_master_info1, /* Passed to driver */
|
||||
},
|
||||
};
|
||||
#endif /* spi master and devices */
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
static struct resource bfin_twi0_resource[] = {
|
||||
[0] = {
|
||||
.start = TWI0_REGBASE,
|
||||
.end = TWI0_REGBASE + 0xFF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_TWI0,
|
||||
.end = IRQ_TWI0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device i2c_bfin_twi0_device = {
|
||||
.name = "i2c-bfin-twi",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
|
||||
.resource = bfin_twi0_resource,
|
||||
};
|
||||
|
||||
#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
|
||||
static struct resource bfin_twi1_resource[] = {
|
||||
[0] = {
|
||||
.start = TWI1_REGBASE,
|
||||
.end = TWI1_REGBASE + 0xFF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_TWI1,
|
||||
.end = IRQ_TWI1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device i2c_bfin_twi1_device = {
|
||||
.name = "i2c-bfin-twi",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(bfin_twi1_resource),
|
||||
.resource = bfin_twi1_resource,
|
||||
};
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
#include <linux/gpio_keys.h>
|
||||
|
||||
static struct gpio_keys_button bfin_gpio_keys_table[] = {
|
||||
{BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data bfin_gpio_keys_data = {
|
||||
.buttons = bfin_gpio_keys_table,
|
||||
.nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
|
||||
};
|
||||
|
||||
static struct platform_device bfin_device_gpiokeys = {
|
||||
.name = "gpio-keys",
|
||||
.dev = {
|
||||
.platform_data = &bfin_gpio_keys_data,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct platform_device *cm_bf548_devices[] __initdata = {
|
||||
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
|
||||
&rtc_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
|
||||
&bf54x_lq043_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
|
||||
&smsc911x_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
|
||||
&musb_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
|
||||
&bfin_atapi_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
|
||||
&bf5xx_nand_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
|
||||
&bf54x_sdh_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
&bf54x_spi_master0,
|
||||
&bf54x_spi_master1,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
|
||||
&bf54x_kpad_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
/* &i2c_bfin_twi0_device, */
|
||||
#if !defined(CONFIG_BF542)
|
||||
&i2c_bfin_twi1_device,
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
&bfin_device_gpiokeys,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init cm_bf548_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
|
||||
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
spi_register_board_info(bf54x_spi_board_info,
|
||||
ARRAY_SIZE(bf54x_spi_board_info));
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_initcall(cm_bf548_init);
|
||||
@ -36,6 +36,7 @@
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/flash.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/interrupt.h>
|
||||
#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
|
||||
#include <linux/usb/musb.h>
|
||||
@ -187,6 +188,46 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
{
|
||||
.start = 0xFFC02000,
|
||||
.end = 0xFFC020FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR2
|
||||
{
|
||||
.start = 0xFFC02100,
|
||||
.end = 0xFFC021FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR3
|
||||
{
|
||||
.start = 0xFFC03100,
|
||||
.end = 0xFFC031FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
|
||||
static struct resource smsc911x_resources[] = {
|
||||
{
|
||||
@ -330,6 +371,7 @@ static struct platform_device bf54x_sdh_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
static struct mtd_partition ezkit_partitions[] = {
|
||||
{
|
||||
.name = "Bootloader",
|
||||
@ -337,7 +379,7 @@ static struct mtd_partition ezkit_partitions[] = {
|
||||
.offset = 0,
|
||||
}, {
|
||||
.name = "Kernel",
|
||||
.size = 0xE0000,
|
||||
.size = 0x1C0000,
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
}, {
|
||||
.name = "RootFS",
|
||||
@ -367,6 +409,7 @@ static struct platform_device ezkit_flash_device = {
|
||||
.num_resources = 1,
|
||||
.resource = &ezkit_flash_resource,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
/* all SPI peripherals info goes here */
|
||||
@ -400,6 +443,14 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SND_BLACKFIN_AD1836) \
|
||||
|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
|
||||
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
|
||||
.enable_dma = 0,
|
||||
.bits_per_word = 16,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
||||
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
|
||||
.cs_change_per_word = 0,
|
||||
@ -443,6 +494,16 @@ static struct spi_board_info bf54x_spi_board_info[] __initdata = {
|
||||
.mode = SPI_MODE_3,
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_SND_BLACKFIN_AD1836) \
|
||||
|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
|
||||
{
|
||||
.modalias = "ad1836-spi",
|
||||
.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
|
||||
.bus_num = 1,
|
||||
.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
|
||||
.controller_data = &ad1836_spi_chip_info,
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
||||
{
|
||||
.modalias = "ad7877",
|
||||
@ -571,6 +632,29 @@ static struct platform_device i2c_bfin_twi1_device = {
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_I2C_BOARDINFO
|
||||
static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
|
||||
};
|
||||
|
||||
#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
|
||||
static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
|
||||
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
|
||||
{
|
||||
I2C_BOARD_INFO("pcf8574_lcd", 0x22),
|
||||
.type = "pcf8574_lcd",
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
|
||||
{
|
||||
I2C_BOARD_INFO("pcf8574_keypad", 0x27),
|
||||
.type = "pcf8574_keypad",
|
||||
.irq = 212,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
#include <linux/gpio_keys.h>
|
||||
|
||||
@ -616,6 +700,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
|
||||
&bf54x_lq043_device,
|
||||
#endif
|
||||
@ -661,12 +749,25 @@ static struct platform_device *ezkit_devices[] __initdata = {
|
||||
#endif
|
||||
|
||||
&bfin_gpios_device,
|
||||
|
||||
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
&ezkit_flash_device,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init ezkit_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
|
||||
#ifdef CONFIG_I2C_BOARDINFO
|
||||
i2c_register_board_info(0, bfin_i2c_board_info0,
|
||||
ARRAY_SIZE(bfin_i2c_board_info0));
|
||||
#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
|
||||
i2c_register_board_info(1, bfin_i2c_board_info1,
|
||||
ARRAY_SIZE(bfin_i2c_board_info1));
|
||||
#endif
|
||||
#endif
|
||||
|
||||
platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
|
||||
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
|
||||
@ -1,159 +0,0 @@
|
||||
/*
|
||||
* File: arch/blackfin/mach-bf548/cpu.c
|
||||
* Based on:
|
||||
* Author:
|
||||
*
|
||||
* Created:
|
||||
* Description: clock scaling for the bf54x
|
||||
*
|
||||
* Modified:
|
||||
* Copyright 2004-2007 Analog Devices Inc.
|
||||
*
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see the file COPYING, or write
|
||||
* to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <asm/dpmc.h>
|
||||
#include <linux/fs.h>
|
||||
#include <asm/bfin-global.h>
|
||||
|
||||
/* CONFIG_CLKIN_HZ=25000000 */
|
||||
#define VCO5 (CONFIG_CLKIN_HZ*45)
|
||||
#define VCO4 (CONFIG_CLKIN_HZ*36)
|
||||
#define VCO3 (CONFIG_CLKIN_HZ*27)
|
||||
#define VCO2 (CONFIG_CLKIN_HZ*18)
|
||||
#define VCO1 (CONFIG_CLKIN_HZ*9)
|
||||
#define VCO(x) VCO##x
|
||||
|
||||
#define MFREQ(x) {VCO(x),VCO(x)/4},{VCO(x),VCO(x)/2},{VCO(x),VCO(x)}
|
||||
/* frequency */
|
||||
static struct cpufreq_frequency_table bf548_freq_table[] = {
|
||||
MFREQ(1),
|
||||
MFREQ(3),
|
||||
{VCO4, VCO4 / 2}, {VCO4, VCO4},
|
||||
MFREQ(5),
|
||||
{0, CPUFREQ_TABLE_END},
|
||||
};
|
||||
|
||||
/*
|
||||
* dpmc_fops->ioctl()
|
||||
* static int dpmc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
||||
*/
|
||||
static int bf548_getfreq(unsigned int cpu)
|
||||
{
|
||||
unsigned long cclk_mhz;
|
||||
|
||||
/* The driver only support single cpu */
|
||||
if (cpu == 0)
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_GET_CORECLOCK, &cclk_mhz);
|
||||
else
|
||||
cclk_mhz = -1;
|
||||
|
||||
return cclk_mhz;
|
||||
}
|
||||
|
||||
static int bf548_target(struct cpufreq_policy *policy,
|
||||
unsigned int target_freq, unsigned int relation)
|
||||
{
|
||||
unsigned long cclk_mhz;
|
||||
unsigned long vco_mhz;
|
||||
unsigned long flags;
|
||||
unsigned int index;
|
||||
struct cpufreq_freqs freqs;
|
||||
|
||||
if (cpufreq_frequency_table_target(policy, bf548_freq_table, target_freq, relation, &index))
|
||||
return -EINVAL;
|
||||
|
||||
cclk_mhz = bf548_freq_table[index].frequency;
|
||||
vco_mhz = bf548_freq_table[index].index;
|
||||
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_CHANGE_FREQUENCY, &vco_mhz);
|
||||
freqs.old = bf548_getfreq(0);
|
||||
freqs.new = cclk_mhz;
|
||||
freqs.cpu = 0;
|
||||
|
||||
pr_debug("cclk begin change to cclk %d,vco=%d,index=%d,target=%d,oldfreq=%d\n",
|
||||
cclk_mhz, vco_mhz, index, target_freq, freqs.old);
|
||||
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
|
||||
local_irq_save(flags);
|
||||
dpmc_fops.ioctl(NULL, NULL, IOCTL_SET_CCLK, &cclk_mhz);
|
||||
local_irq_restore(flags);
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
|
||||
|
||||
vco_mhz = get_vco();
|
||||
cclk_mhz = get_cclk();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
|
||||
* this platform, anyway.
|
||||
*/
|
||||
static int bf548_verify_speed(struct cpufreq_policy *policy)
|
||||
{
|
||||
return cpufreq_frequency_table_verify(policy, &bf548_freq_table);
|
||||
}
|
||||
|
||||
static int __init __bf548_cpu_init(struct cpufreq_policy *policy)
|
||||
{
|
||||
if (policy->cpu != 0)
|
||||
return -EINVAL;
|
||||
|
||||
policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
|
||||
|
||||
policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
|
||||
/*Now ,only support one cpu */
|
||||
policy->cur = bf548_getfreq(0);
|
||||
cpufreq_frequency_table_get_attr(bf548_freq_table, policy->cpu);
|
||||
return cpufreq_frequency_table_cpuinfo(policy, bf548_freq_table);
|
||||
}
|
||||
|
||||
static struct freq_attr *bf548_freq_attr[] = {
|
||||
&cpufreq_freq_attr_scaling_available_freqs,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static struct cpufreq_driver bf548_driver = {
|
||||
.verify = bf548_verify_speed,
|
||||
.target = bf548_target,
|
||||
.get = bf548_getfreq,
|
||||
.init = __bf548_cpu_init,
|
||||
.name = "bf548",
|
||||
.owner = THIS_MODULE,
|
||||
.attr = bf548_freq_attr,
|
||||
};
|
||||
|
||||
static int __init bf548_cpu_init(void)
|
||||
{
|
||||
return cpufreq_register_driver(&bf548_driver);
|
||||
}
|
||||
|
||||
static void __exit bf548_cpu_exit(void)
|
||||
{
|
||||
cpufreq_unregister_driver(&bf548_driver);
|
||||
}
|
||||
|
||||
MODULE_AUTHOR("Mickael Kang");
|
||||
MODULE_DESCRIPTION("cpufreq driver for BF548 CPU");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
module_init(bf548_cpu_init);
|
||||
module_exit(bf548_cpu_exit);
|
||||
@ -32,7 +32,7 @@
|
||||
#include <asm/blackfin.h>
|
||||
#include <asm/dma.h>
|
||||
|
||||
struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
(struct dma_register *) DMA0_NEXT_DESC_PTR,
|
||||
(struct dma_register *) DMA1_NEXT_DESC_PTR,
|
||||
(struct dma_register *) DMA2_NEXT_DESC_PTR,
|
||||
@ -66,7 +66,7 @@
|
||||
(struct dma_register *) MDMA_D3_NEXT_DESC_PTR,
|
||||
(struct dma_register *) MDMA_S3_NEXT_DESC_PTR,
|
||||
};
|
||||
EXPORT_SYMBOL(base_addr);
|
||||
EXPORT_SYMBOL(dma_io_base_addr);
|
||||
|
||||
int channel2irq(unsigned int channel)
|
||||
{
|
||||
|
||||
@ -36,9 +36,6 @@
|
||||
#include <asm/mach/mem_init.h>
|
||||
#endif
|
||||
|
||||
.global __rambase
|
||||
.global __ramstart
|
||||
.global __ramend
|
||||
.extern ___bss_stop
|
||||
.extern ___bss_start
|
||||
.extern _bf53x_relocate_l1_mem
|
||||
@ -456,18 +453,3 @@ ENTRY(_start_dma_code)
|
||||
RTS;
|
||||
ENDPROC(_start_dma_code)
|
||||
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
|
||||
|
||||
.data
|
||||
|
||||
/*
|
||||
* Set up the usable of RAM stuff. Size of RAM is determined then
|
||||
* an initial stack set up at the end.
|
||||
*/
|
||||
|
||||
.align 4
|
||||
__rambase:
|
||||
.long 0
|
||||
__ramstart:
|
||||
.long 0
|
||||
__ramend:
|
||||
.long 0
|
||||
|
||||
@ -283,6 +283,25 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
|
||||
#define PATA_INT 119
|
||||
|
||||
@ -330,6 +349,10 @@ static struct platform_device *cm_bf561_devices[] __initdata = {
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
|
||||
&isp1362_hcd_device,
|
||||
#endif
|
||||
@ -349,7 +372,7 @@ static struct platform_device *cm_bf561_devices[] __initdata = {
|
||||
|
||||
static int __init cm_bf561_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||
|
||||
@ -78,7 +78,7 @@ int __init bfin_isp1761_init(void)
|
||||
{
|
||||
unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
|
||||
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
|
||||
|
||||
return platform_add_devices(bfin_isp1761_devices, num_devices);
|
||||
@ -220,6 +220,26 @@ static struct platform_device bfin_uart_device = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
static struct resource bfin_sir_resources[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
.start = 0xFFC00400,
|
||||
.end = 0xFFC004FF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device bfin_sir_device = {
|
||||
.name = "bfin_sir",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_sir_resources),
|
||||
.resource = bfin_sir_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
static struct mtd_partition ezkit_partitions[] = {
|
||||
{
|
||||
.name = "Bootloader",
|
||||
@ -227,7 +247,7 @@ static struct mtd_partition ezkit_partitions[] = {
|
||||
.offset = 0,
|
||||
}, {
|
||||
.name = "Kernel",
|
||||
.size = 0xE0000,
|
||||
.size = 0x1C0000,
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
}, {
|
||||
.name = "RootFS",
|
||||
@ -257,6 +277,7 @@ static struct platform_device ezkit_flash_device = {
|
||||
.num_resources = 1,
|
||||
.resource = &ezkit_flash_resource,
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SPI_BFIN
|
||||
#if defined(CONFIG_SND_BLACKFIN_AD1836) \
|
||||
@ -443,6 +464,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
|
||||
&bfin_uart_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||||
&bfin_sir_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
|
||||
&bfin_pata_device,
|
||||
#endif
|
||||
@ -460,7 +485,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
|
||||
#endif
|
||||
|
||||
&bfin_gpios_device,
|
||||
|
||||
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
&ezkit_flash_device,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init ezkit_init(void)
|
||||
|
||||
@ -70,7 +70,7 @@ static struct platform_device *generic_board_devices[] __initdata = {
|
||||
|
||||
static int __init generic_board_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
return platform_add_devices(generic_board_devices,
|
||||
ARRAY_SIZE(generic_board_devices));
|
||||
}
|
||||
|
||||
@ -50,7 +50,7 @@ static struct platform_device *tepla_devices[] __initdata = {
|
||||
|
||||
static int __init tepla_init(void)
|
||||
{
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
|
||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||
return platform_add_devices(tepla_devices, ARRAY_SIZE(tepla_devices));
|
||||
}
|
||||
|
||||
|
||||
@ -26,10 +26,12 @@
|
||||
* to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <asm/blackfin.h>
|
||||
#include <asm/dma.h>
|
||||
|
||||
struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
(struct dma_register *) DMA1_0_NEXT_DESC_PTR,
|
||||
(struct dma_register *) DMA1_1_NEXT_DESC_PTR,
|
||||
(struct dma_register *) DMA1_2_NEXT_DESC_PTR,
|
||||
@ -67,6 +69,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
|
||||
(struct dma_register *) IMDMA_D1_NEXT_DESC_PTR,
|
||||
(struct dma_register *) IMDMA_S1_NEXT_DESC_PTR,
|
||||
};
|
||||
EXPORT_SYMBOL(dma_io_base_addr);
|
||||
|
||||
int channel2irq(unsigned int channel)
|
||||
{
|
||||
|
||||
@ -37,9 +37,6 @@
|
||||
#include <asm/mach/mem_init.h>
|
||||
#endif
|
||||
|
||||
.global __rambase
|
||||
.global __ramstart
|
||||
.global __ramend
|
||||
.extern ___bss_stop
|
||||
.extern ___bss_start
|
||||
.extern _bf53x_relocate_l1_mem
|
||||
@ -139,26 +136,26 @@ ENTRY(__start)
|
||||
|
||||
/* Initialise UART - when booting from u-boot, the UART is not disabled
|
||||
* so if we dont initalize here, our serial console gets hosed */
|
||||
p0.h = hi(UART_LCR);
|
||||
p0.l = lo(UART_LCR);
|
||||
p0.h = hi(BFIN_UART_LCR);
|
||||
p0.l = lo(BFIN_UART_LCR);
|
||||
r0 = 0x0(Z);
|
||||
w[p0] = r0.L; /* To enable DLL writes */
|
||||
ssync;
|
||||
|
||||
p0.h = hi(UART_DLL);
|
||||
p0.l = lo(UART_DLL);
|
||||
p0.h = hi(BFIN_UART_DLL);
|
||||
p0.l = lo(BFIN_UART_DLL);
|
||||
r0 = 0x0(Z);
|
||||
w[p0] = r0.L;
|
||||
ssync;
|
||||
|
||||
p0.h = hi(UART_DLH);
|
||||
p0.l = lo(UART_DLH);
|
||||
p0.h = hi(BFIN_UART_DLH);
|
||||
p0.l = lo(BFIN_UART_DLH);
|
||||
r0 = 0x00(Z);
|
||||
w[p0] = r0.L;
|
||||
ssync;
|
||||
|
||||
p0.h = hi(UART_GCTL);
|
||||
p0.l = lo(UART_GCTL);
|
||||
p0.h = hi(BFIN_UART_GCTL);
|
||||
p0.l = lo(BFIN_UART_GCTL);
|
||||
r0 = 0x0(Z);
|
||||
w[p0] = r0.L; /* To enable UART clock */
|
||||
ssync;
|
||||
@ -411,18 +408,3 @@ ENTRY(_start_dma_code)
|
||||
RTS;
|
||||
ENDPROC(_start_dma_code)
|
||||
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
|
||||
|
||||
.data
|
||||
|
||||
/*
|
||||
* Set up the usable of RAM stuff. Size of RAM is determined then
|
||||
* an initial stack set up at the end.
|
||||
*/
|
||||
|
||||
.align 4
|
||||
__rambase:
|
||||
.long 0
|
||||
__ramstart:
|
||||
.long 0
|
||||
__ramend:
|
||||
.long 0
|
||||
|
||||
@ -6,4 +6,5 @@ obj-y := \
|
||||
cache.o cacheinit.o entry.o \
|
||||
interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o
|
||||
|
||||
obj-$(CONFIG_PM) += pm.o dpmc.o
|
||||
obj-$(CONFIG_PM) += pm.o dpmc.o
|
||||
obj-$(CONFIG_CPU_FREQ) += cpufreq.o
|
||||
|
||||
@ -54,7 +54,8 @@
|
||||
|
||||
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
|
||||
|
||||
#ifdef CONFIG_MEM_SIZE
|
||||
#if (CONFIG_MEM_SIZE % 4)
|
||||
#error "SDRAM mem size must be multible of 4MB"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
194
arch/blackfin/mach-common/cpufreq.c
Normal file
194
arch/blackfin/mach-common/cpufreq.c
Normal file
@ -0,0 +1,194 @@
|
||||
/*
|
||||
* File: arch/blackfin/mach-common/cpufreq.c
|
||||
* Based on:
|
||||
* Author:
|
||||
*
|
||||
* Created:
|
||||
* Description: Blackfin core clock scaling
|
||||
*
|
||||
* Modified:
|
||||
* Copyright 2004-2008 Analog Devices Inc.
|
||||
*
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see the file COPYING, or write
|
||||
* to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <linux/fs.h>
|
||||
#include <asm/blackfin.h>
|
||||
#include <asm/time.h>
|
||||
|
||||
|
||||
/* this is the table of CCLK frequencies, in Hz */
|
||||
/* .index is the entry in the auxillary dpm_state_table[] */
|
||||
static struct cpufreq_frequency_table bfin_freq_table[] = {
|
||||
{
|
||||
.frequency = CPUFREQ_TABLE_END,
|
||||
.index = 0,
|
||||
},
|
||||
{
|
||||
.frequency = CPUFREQ_TABLE_END,
|
||||
.index = 1,
|
||||
},
|
||||
{
|
||||
.frequency = CPUFREQ_TABLE_END,
|
||||
.index = 2,
|
||||
},
|
||||
{
|
||||
.frequency = CPUFREQ_TABLE_END,
|
||||
.index = 0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct bfin_dpm_state {
|
||||
unsigned int csel; /* system clock divider */
|
||||
unsigned int tscale; /* change the divider on the core timer interrupt */
|
||||
} dpm_state_table[3];
|
||||
|
||||
/**************************************************************************/
|
||||
|
||||
static unsigned int bfin_getfreq(unsigned int cpu)
|
||||
{
|
||||
/* The driver only support single cpu */
|
||||
if (cpu != 0)
|
||||
return -1;
|
||||
|
||||
return get_cclk();
|
||||
}
|
||||
|
||||
|
||||
static int bfin_target(struct cpufreq_policy *policy,
|
||||
unsigned int target_freq, unsigned int relation)
|
||||
{
|
||||
unsigned int index, plldiv, tscale;
|
||||
unsigned long flags, cclk_hz;
|
||||
struct cpufreq_freqs freqs;
|
||||
|
||||
if (cpufreq_frequency_table_target(policy, bfin_freq_table,
|
||||
target_freq, relation, &index))
|
||||
return -EINVAL;
|
||||
|
||||
cclk_hz = bfin_freq_table[index].frequency;
|
||||
|
||||
freqs.old = bfin_getfreq(0);
|
||||
freqs.new = cclk_hz;
|
||||
freqs.cpu = 0;
|
||||
|
||||
pr_debug("cpufreq: changing cclk to %lu; target = %u, oldfreq = %u\n",
|
||||
cclk_hz, target_freq, freqs.old);
|
||||
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
|
||||
local_irq_save(flags);
|
||||
plldiv = (bfin_read_PLL_DIV() & SSEL) | dpm_state_table[index].csel;
|
||||
tscale = dpm_state_table[index].tscale;
|
||||
bfin_write_PLL_DIV(plldiv);
|
||||
/* we have to adjust the core timer, because it is using cclk */
|
||||
bfin_write_TSCALE(tscale);
|
||||
SSYNC();
|
||||
local_irq_restore(flags);
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bfin_verify_speed(struct cpufreq_policy *policy)
|
||||
{
|
||||
return cpufreq_frequency_table_verify(policy, bfin_freq_table);
|
||||
}
|
||||
|
||||
static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
|
||||
{
|
||||
|
||||
unsigned long cclk, sclk, csel, min_cclk;
|
||||
int index;
|
||||
|
||||
#ifdef CONFIG_CYCLES_CLOCKSOURCE
|
||||
/*
|
||||
* Clocksource CYCLES is still CONTINUOUS but not longer MONOTONIC in case we enable
|
||||
* CPU frequency scaling, since CYCLES runs off Core Clock.
|
||||
*/
|
||||
printk(KERN_WARNING "CPU frequency scaling not supported: Clocksource not suitable\n"
|
||||
return -ENODEV;
|
||||
#endif
|
||||
|
||||
if (policy->cpu != 0)
|
||||
return -EINVAL;
|
||||
|
||||
cclk = get_cclk();
|
||||
sclk = get_sclk();
|
||||
|
||||
#if ANOMALY_05000273
|
||||
min_cclk = sclk * 2;
|
||||
#else
|
||||
min_cclk = sclk;
|
||||
#endif
|
||||
csel = ((bfin_read_PLL_DIV() & CSEL) >> 4);
|
||||
|
||||
for (index = 0; (cclk >> index) >= min_cclk && csel <= 3; index++, csel++) {
|
||||
bfin_freq_table[index].frequency = cclk >> index;
|
||||
dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */
|
||||
dpm_state_table[index].tscale = (TIME_SCALE / (1 << csel)) - 1;
|
||||
|
||||
pr_debug("cpufreq: freq:%d csel:%d tscale:%d\n",
|
||||
bfin_freq_table[index].frequency,
|
||||
dpm_state_table[index].csel,
|
||||
dpm_state_table[index].tscale);
|
||||
}
|
||||
|
||||
policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
|
||||
|
||||
policy->cpuinfo.transition_latency = (bfin_read_PLL_LOCKCNT() / (sclk / 1000000)) * 1000;
|
||||
/*Now ,only support one cpu */
|
||||
policy->cur = cclk;
|
||||
cpufreq_frequency_table_get_attr(bfin_freq_table, policy->cpu);
|
||||
return cpufreq_frequency_table_cpuinfo(policy, bfin_freq_table);
|
||||
}
|
||||
|
||||
static struct freq_attr *bfin_freq_attr[] = {
|
||||
&cpufreq_freq_attr_scaling_available_freqs,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static struct cpufreq_driver bfin_driver = {
|
||||
.verify = bfin_verify_speed,
|
||||
.target = bfin_target,
|
||||
.get = bfin_getfreq,
|
||||
.init = __bfin_cpu_init,
|
||||
.name = "bfin cpufreq",
|
||||
.owner = THIS_MODULE,
|
||||
.attr = bfin_freq_attr,
|
||||
};
|
||||
|
||||
static int __init bfin_cpu_init(void)
|
||||
{
|
||||
return cpufreq_register_driver(&bfin_driver);
|
||||
}
|
||||
|
||||
static void __exit bfin_cpu_exit(void)
|
||||
{
|
||||
cpufreq_unregister_driver(&bfin_driver);
|
||||
}
|
||||
|
||||
MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
|
||||
MODULE_DESCRIPTION("cpufreq driver for Blackfin");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
module_init(bfin_cpu_init);
|
||||
module_exit(bfin_cpu_exit);
|
||||
@ -38,6 +38,7 @@
|
||||
#include <linux/unistd.h>
|
||||
#include <asm/blackfin.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/fixed_code.h>
|
||||
#include <asm/thread_info.h> /* TIF_NEED_RESCHED */
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/trace.h>
|
||||
@ -52,15 +53,6 @@
|
||||
# define EX_SCRATCH_REG CYCLES
|
||||
#endif
|
||||
|
||||
#if ANOMALY_05000281
|
||||
ENTRY(_safe_speculative_execution)
|
||||
NOP;
|
||||
NOP;
|
||||
NOP;
|
||||
jump _safe_speculative_execution;
|
||||
ENDPROC(_safe_speculative_execution)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
|
||||
.section .l1.text
|
||||
#else
|
||||
@ -121,10 +113,14 @@ ENTRY(_ex_icplb_miss)
|
||||
(R7:6,P5:4) = [sp++];
|
||||
ASTAT = [sp++];
|
||||
SAVE_ALL_SYS
|
||||
DEBUG_HWTRACE_SAVE(p5, r7)
|
||||
#ifdef CONFIG_MPU
|
||||
/* We must load R1 here, _before_ DEBUG_HWTRACE_SAVE, since that
|
||||
* will change the stack pointer. */
|
||||
R0 = SEQSTAT;
|
||||
R1 = SP;
|
||||
#endif
|
||||
DEBUG_HWTRACE_SAVE(p5, r7)
|
||||
#ifdef CONFIG_MPU
|
||||
sp += -12;
|
||||
call _cplb_hdr;
|
||||
sp += 12;
|
||||
@ -191,6 +187,7 @@ ENTRY(_bfin_return_from_exception)
|
||||
ENDPROC(_bfin_return_from_exception)
|
||||
|
||||
ENTRY(_handle_bad_cplb)
|
||||
DEBUG_HWTRACE_RESTORE(p5, r7)
|
||||
/* To get here, we just tried and failed to change a CPLB
|
||||
* so, handle things in trap_c (C code), by lowering to
|
||||
* IRQ5, just like we normally do. Since this is not a
|
||||
@ -225,6 +222,26 @@ ENTRY(_ex_trap_c)
|
||||
[p4] = p5;
|
||||
csync;
|
||||
|
||||
p4.l = lo(DCPLB_FAULT_ADDR);
|
||||
p4.h = hi(DCPLB_FAULT_ADDR);
|
||||
r7 = [p4];
|
||||
p5.h = _saved_dcplb_fault_addr;
|
||||
p5.l = _saved_dcplb_fault_addr;
|
||||
[p5] = r7;
|
||||
|
||||
r7 = [p4 + (ICPLB_FAULT_ADDR - DCPLB_FAULT_ADDR)];
|
||||
p5.h = _saved_icplb_fault_addr;
|
||||
p5.l = _saved_icplb_fault_addr;
|
||||
[p5] = r7;
|
||||
|
||||
p4.l = __retx;
|
||||
p4.h = __retx;
|
||||
r6 = retx;
|
||||
[p4] = r6;
|
||||
p4.l = lo(SAFE_USER_INSTRUCTION);
|
||||
p4.h = hi(SAFE_USER_INSTRUCTION);
|
||||
retx = p4;
|
||||
|
||||
/* Disable all interrupts, but make sure level 5 is enabled so
|
||||
* we can switch to that level. Save the old mask. */
|
||||
cli r6;
|
||||
@ -234,23 +251,6 @@ ENTRY(_ex_trap_c)
|
||||
r6 = 0x3f;
|
||||
sti r6;
|
||||
|
||||
/* Save the excause into a circular buffer, in case the instruction
|
||||
* which caused this excecptions causes others.
|
||||
*/
|
||||
P5.l = _in_ptr_excause;
|
||||
P5.h = _in_ptr_excause;
|
||||
R7 = [P5];
|
||||
R7 += 4;
|
||||
R6 = 0xF;
|
||||
R7 = R7 & R6;
|
||||
[P5] = R7;
|
||||
R6.l = _excause_circ_buf;
|
||||
R6.h = _excause_circ_buf;
|
||||
R7 = R7 + R6;
|
||||
p5 = R7;
|
||||
R6 = SEQSTAT;
|
||||
[P5] = R6;
|
||||
|
||||
(R7:6,P5:4) = [sp++];
|
||||
ASTAT = [sp++];
|
||||
SP = EX_SCRATCH_REG;
|
||||
@ -307,6 +307,11 @@ ENDPROC(_double_fault)
|
||||
ENTRY(_exception_to_level5)
|
||||
SAVE_ALL_SYS
|
||||
|
||||
p4.l = __retx;
|
||||
p4.h = __retx;
|
||||
r6 = [p4];
|
||||
[sp + PT_PC] = r6;
|
||||
|
||||
/* Restore interrupt mask. We haven't pushed RETI, so this
|
||||
* doesn't enable interrupts until we return from this handler. */
|
||||
p4.l = _excpt_saved_imask;
|
||||
@ -328,42 +333,11 @@ ENTRY(_exception_to_level5)
|
||||
r0 = [p2]; /* Read current IPEND */
|
||||
[sp + PT_IPEND] = r0; /* Store IPEND */
|
||||
|
||||
/* Pop the excause from the circular buffer and push it on the stack
|
||||
* (in the right place - if you change the location of SEQSTAT, you
|
||||
* must change this offset.
|
||||
*/
|
||||
.L_excep_to_5_again:
|
||||
P5.l = _out_ptr_excause;
|
||||
P5.h = _out_ptr_excause;
|
||||
R7 = [P5];
|
||||
R7 += 4;
|
||||
R6 = 0xF;
|
||||
R7 = R7 & R6;
|
||||
[P5] = R7;
|
||||
R6.l = _excause_circ_buf;
|
||||
R6.h = _excause_circ_buf;
|
||||
R7 = R7 + R6;
|
||||
P5 = R7;
|
||||
R1 = [P5];
|
||||
[SP + PT_SEQSTAT] = r1;
|
||||
|
||||
r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
|
||||
SP += -12;
|
||||
call _trap_c;
|
||||
SP += 12;
|
||||
|
||||
/* See if anything else is in the exception buffer
|
||||
* if there is, process it
|
||||
*/
|
||||
P5.l = _out_ptr_excause;
|
||||
P5.h = _out_ptr_excause;
|
||||
P4.l = _in_ptr_excause;
|
||||
P4.h = _in_ptr_excause;
|
||||
R6 = [P5];
|
||||
R7 = [P4];
|
||||
CC = R6 == R7;
|
||||
if ! CC JUMP .L_excep_to_5_again
|
||||
|
||||
call _ret_from_exception;
|
||||
RESTORE_ALL_SYS
|
||||
rti;
|
||||
@ -727,8 +701,8 @@ ENTRY(_return_from_int)
|
||||
[p0] = p1;
|
||||
csync;
|
||||
#if ANOMALY_05000281
|
||||
r0.l = _safe_speculative_execution;
|
||||
r0.h = _safe_speculative_execution;
|
||||
r0.l = lo(SAFE_USER_INSTRUCTION);
|
||||
r0.h = hi(SAFE_USER_INSTRUCTION);
|
||||
reti = r0;
|
||||
#endif
|
||||
r0 = 0x801f (z);
|
||||
@ -741,8 +715,8 @@ ENDPROC(_return_from_int)
|
||||
|
||||
ENTRY(_lower_to_irq14)
|
||||
#if ANOMALY_05000281
|
||||
r0.l = _safe_speculative_execution;
|
||||
r0.h = _safe_speculative_execution;
|
||||
r0.l = lo(SAFE_USER_INSTRUCTION);
|
||||
r0.h = hi(SAFE_USER_INSTRUCTION);
|
||||
reti = r0;
|
||||
#endif
|
||||
r0 = 0x401f;
|
||||
@ -809,20 +783,6 @@ _schedule_and_signal:
|
||||
rti;
|
||||
ENDPROC(_lower_to_irq14)
|
||||
|
||||
/* Make sure when we start, that the circular buffer is initialized properly
|
||||
* R0 and P0 are call clobbered, so we can use them here.
|
||||
*/
|
||||
ENTRY(_init_exception_buff)
|
||||
r0 = 0;
|
||||
p0.h = _in_ptr_excause;
|
||||
p0.l = _in_ptr_excause;
|
||||
[p0] = r0;
|
||||
p0.h = _out_ptr_excause;
|
||||
p0.l = _out_ptr_excause;
|
||||
[p0] = r0;
|
||||
rts;
|
||||
ENDPROC(_init_exception_buff)
|
||||
|
||||
/* We handle this 100% in exception space - to reduce overhead
|
||||
* Only potiential problem is if the software buffer gets swapped out of the
|
||||
* CPLB table - then double fault. - so we don't let this happen in other places
|
||||
@ -1398,17 +1358,7 @@ _exception_stack_top:
|
||||
_last_cplb_fault_retx:
|
||||
.long 0;
|
||||
#endif
|
||||
/*
|
||||
* Single instructions can have multiple faults, which need to be
|
||||
* handled by traps.c, in irq5. We store the exception cause to ensure
|
||||
* we don't miss a double fault condition
|
||||
*/
|
||||
ENTRY(_in_ptr_excause)
|
||||
/* Used to save the real RETX when temporarily storing a safe
|
||||
* return address. */
|
||||
__retx:
|
||||
.long 0;
|
||||
ENTRY(_out_ptr_excause)
|
||||
.long 0;
|
||||
ALIGN
|
||||
ENTRY(_excause_circ_buf)
|
||||
.rept 4
|
||||
.long 0
|
||||
.endr
|
||||
|
||||
@ -316,7 +316,7 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
|
||||
printk(KERN_ERR
|
||||
"%s : %s : LINE %d :\nIRQ ?: PERIPHERAL ERROR"
|
||||
" INTERRUPT ASSERTED BUT NO SOURCE FOUND\n",
|
||||
__FUNCTION__, __FILE__, __LINE__);
|
||||
__func__, __FILE__, __LINE__);
|
||||
|
||||
}
|
||||
#endif /* BF537_GENERIC_ERROR_INT_DEMUX */
|
||||
@ -326,6 +326,7 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
|
||||
static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)];
|
||||
static unsigned short gpio_edge_triggered[gpio_bank(MAX_BLACKFIN_GPIOS)];
|
||||
|
||||
extern void bfin_gpio_irq_prepare(unsigned gpio);
|
||||
|
||||
static void bfin_gpio_ack_irq(unsigned int irq)
|
||||
{
|
||||
@ -364,35 +365,25 @@ static void bfin_gpio_unmask_irq(unsigned int irq)
|
||||
|
||||
static unsigned int bfin_gpio_irq_startup(unsigned int irq)
|
||||
{
|
||||
unsigned int ret;
|
||||
u16 gpionr = irq - IRQ_PF0;
|
||||
char buf[8];
|
||||
|
||||
if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
|
||||
snprintf(buf, sizeof buf, "IRQ %d", irq);
|
||||
ret = gpio_request(gpionr, buf);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr)))
|
||||
bfin_gpio_irq_prepare(gpionr);
|
||||
|
||||
gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
|
||||
bfin_gpio_unmask_irq(irq);
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void bfin_gpio_irq_shutdown(unsigned int irq)
|
||||
{
|
||||
bfin_gpio_mask_irq(irq);
|
||||
gpio_free(irq - IRQ_PF0);
|
||||
gpio_enabled[gpio_bank(irq - IRQ_PF0)] &= ~gpio_bit(irq - IRQ_PF0);
|
||||
}
|
||||
|
||||
static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
|
||||
{
|
||||
|
||||
unsigned int ret;
|
||||
char buf[8];
|
||||
u16 gpionr = irq - IRQ_PF0;
|
||||
|
||||
if (type == IRQ_TYPE_PROBE) {
|
||||
@ -404,12 +395,8 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
|
||||
|
||||
if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
|
||||
IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
|
||||
if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
|
||||
snprintf(buf, sizeof buf, "IRQ %d", irq);
|
||||
ret = gpio_request(gpionr, buf);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr)))
|
||||
bfin_gpio_irq_prepare(gpionr);
|
||||
|
||||
gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
|
||||
} else {
|
||||
@ -595,6 +582,8 @@ static struct pin_int_t *pint[NR_PINT_SYS_IRQS] = {
|
||||
(struct pin_int_t *)PINT3_MASK_SET,
|
||||
};
|
||||
|
||||
extern void bfin_gpio_irq_prepare(unsigned gpio);
|
||||
|
||||
inline unsigned short get_irq_base(u8 bank, u8 bmap)
|
||||
{
|
||||
|
||||
@ -697,8 +686,6 @@ static void bfin_gpio_unmask_irq(unsigned int irq)
|
||||
|
||||
static unsigned int bfin_gpio_irq_startup(unsigned int irq)
|
||||
{
|
||||
unsigned int ret;
|
||||
char buf[8];
|
||||
u16 gpionr = irq_to_gpio(irq);
|
||||
u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
|
||||
|
||||
@ -709,17 +696,13 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq)
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
|
||||
snprintf(buf, sizeof buf, "IRQ %d", irq);
|
||||
ret = gpio_request(gpionr, buf);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr)))
|
||||
bfin_gpio_irq_prepare(gpionr);
|
||||
|
||||
gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
|
||||
bfin_gpio_unmask_irq(irq);
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void bfin_gpio_irq_shutdown(unsigned int irq)
|
||||
@ -727,15 +710,12 @@ static void bfin_gpio_irq_shutdown(unsigned int irq)
|
||||
u16 gpionr = irq_to_gpio(irq);
|
||||
|
||||
bfin_gpio_mask_irq(irq);
|
||||
gpio_free(gpionr);
|
||||
gpio_enabled[gpio_bank(gpionr)] &= ~gpio_bit(gpionr);
|
||||
}
|
||||
|
||||
static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
|
||||
{
|
||||
|
||||
unsigned int ret;
|
||||
char buf[8];
|
||||
u16 gpionr = irq_to_gpio(irq);
|
||||
u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
|
||||
u32 pintbit = PINT_BIT(pint_val);
|
||||
@ -753,12 +733,8 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
|
||||
|
||||
if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
|
||||
IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
|
||||
if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
|
||||
snprintf(buf, sizeof buf, "IRQ %d", irq);
|
||||
ret = gpio_request(gpionr, buf);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr)))
|
||||
bfin_gpio_irq_prepare(gpionr);
|
||||
|
||||
gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
|
||||
} else {
|
||||
@ -766,8 +742,6 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
|
||||
return 0;
|
||||
}
|
||||
|
||||
gpio_direction_input(gpionr);
|
||||
|
||||
if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)))
|
||||
pint[bank]->invert_set = pintbit; /* low or falling edge denoted by one */
|
||||
else
|
||||
@ -965,8 +939,6 @@ int __init init_arch_irq(void)
|
||||
|
||||
local_irq_disable();
|
||||
|
||||
init_exception_buff();
|
||||
|
||||
#ifdef CONFIG_BF54x
|
||||
# ifdef CONFIG_PINTx_REASSIGN
|
||||
pint[0]->assign = CONFIG_PINT0_ASSIGN;
|
||||
|
||||
@ -174,7 +174,7 @@ ENTRY(_cache_lock)
|
||||
CLI R3;
|
||||
|
||||
R7 = [P1];
|
||||
R2 = 0xFFFFFF87 (X);
|
||||
R2 = ~(0x78) (X); /* mask out ILOC */
|
||||
R7 = R7 & R2;
|
||||
R0 = R0 << 3;
|
||||
R7 = R0 | R7;
|
||||
|
||||
@ -401,7 +401,7 @@ EXPORT_SYMBOL(l1_data_sram_free);
|
||||
|
||||
void *l1_inst_sram_alloc(size_t size)
|
||||
{
|
||||
#if L1_DATA_A_LENGTH != 0
|
||||
#if L1_CODE_LENGTH != 0
|
||||
unsigned flags;
|
||||
void *addr;
|
||||
|
||||
|
||||
@ -75,7 +75,7 @@ static int op_bfin_start(void)
|
||||
{
|
||||
int ret = -EBUSY;
|
||||
|
||||
printk(KERN_INFO "KSDBG:in %s\n", __FUNCTION__);
|
||||
printk(KERN_INFO "KSDBG:in %s\n", __func__);
|
||||
mutex_lock(&pfmon_lock);
|
||||
if (!pfmon_enabled) {
|
||||
ret = model->start(ctr);
|
||||
|
||||
@ -125,7 +125,7 @@ int pm_overflow_handler(int irq, struct pt_regs *regs)
|
||||
unsigned int pc, pfctl;
|
||||
unsigned int count[2];
|
||||
|
||||
pr_debug("get interrupt in %s\n", __FUNCTION__);
|
||||
pr_debug("get interrupt in %s\n", __func__);
|
||||
if (oprofile_running == 0) {
|
||||
pr_debug("error: entering interrupt when oprofile is stopped.\n\r");
|
||||
return -1;
|
||||
|
||||
@ -481,6 +481,34 @@ config BRIQ_PANEL
|
||||
|
||||
It's safe to say N here.
|
||||
|
||||
config BFIN_OTP
|
||||
tristate "Blackfin On-Chip OTP Memory Support"
|
||||
depends on BLACKFIN && (BF52x || BF54x)
|
||||
default y
|
||||
help
|
||||
If you say Y here, you will get support for a character device
|
||||
interface into the One Time Programmable memory pages that are
|
||||
stored on the Blackfin processor. This will not get you access
|
||||
to the secure memory pages however. You will need to write your
|
||||
own secure code and reader for that.
|
||||
|
||||
To compile this driver as a module, choose M here: the module
|
||||
will be called bfin-otp.
|
||||
|
||||
If unsure, it is safe to say Y.
|
||||
|
||||
config BFIN_OTP_WRITE_ENABLE
|
||||
bool "Enable writing support of OTP pages"
|
||||
depends on BFIN_OTP
|
||||
default n
|
||||
help
|
||||
If you say Y here, you will enable support for writing of the
|
||||
OTP pages. This is dangerous by nature as you can only program
|
||||
the pages once, so only enable this option when you actually
|
||||
need it so as to not inadvertently clobber data.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
config PRINTER
|
||||
tristate "Parallel printer support"
|
||||
depends on PARPORT
|
||||
|
||||
@ -59,6 +59,7 @@ obj-$(CONFIG_VIOTAPE) += viotape.o
|
||||
obj-$(CONFIG_HVCS) += hvcs.o
|
||||
obj-$(CONFIG_SGI_MBCS) += mbcs.o
|
||||
obj-$(CONFIG_BRIQ_PANEL) += briq_panel.o
|
||||
obj-$(CONFIG_BFIN_OTP) += bfin-otp.o
|
||||
|
||||
obj-$(CONFIG_PRINTER) += lp.o
|
||||
obj-$(CONFIG_TIPAR) += tipar.o
|
||||
|
||||
189
drivers/char/bfin-otp.c
Normal file
189
drivers/char/bfin-otp.c
Normal file
@ -0,0 +1,189 @@
|
||||
/*
|
||||
* Blackfin On-Chip OTP Memory Interface
|
||||
* Supports BF52x/BF54x
|
||||
*
|
||||
* Copyright 2007-2008 Analog Devices Inc.
|
||||
*
|
||||
* Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* Licensed under the GPL-2 or later.
|
||||
*/
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/miscdevice.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <asm/blackfin.h>
|
||||
#include <asm/uaccess.h>
|
||||
|
||||
#define stamp(fmt, args...) pr_debug("%s:%i: " fmt "\n", __func__, __LINE__, ## args)
|
||||
#define stampit() stamp("here i am")
|
||||
#define pr_init(fmt, args...) ({ static const __initconst char __fmt[] = fmt; printk(__fmt, ## args); })
|
||||
|
||||
#define DRIVER_NAME "bfin-otp"
|
||||
#define PFX DRIVER_NAME ": "
|
||||
|
||||
static DEFINE_MUTEX(bfin_otp_lock);
|
||||
|
||||
/* OTP Boot ROM functions */
|
||||
#define _BOOTROM_OTP_COMMAND 0xEF000018
|
||||
#define _BOOTROM_OTP_READ 0xEF00001A
|
||||
#define _BOOTROM_OTP_WRITE 0xEF00001C
|
||||
|
||||
static u32 (* const otp_command)(u32 command, u32 value) = (void *)_BOOTROM_OTP_COMMAND;
|
||||
static u32 (* const otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)_BOOTROM_OTP_READ;
|
||||
static u32 (* const otp_write)(u32 page, u32 flags, u64 *page_content) = (void *)_BOOTROM_OTP_WRITE;
|
||||
|
||||
/* otp_command(): defines for "command" */
|
||||
#define OTP_INIT 0x00000001
|
||||
#define OTP_CLOSE 0x00000002
|
||||
|
||||
/* otp_{read,write}(): defines for "flags" */
|
||||
#define OTP_LOWER_HALF 0x00000000 /* select upper/lower 64-bit half (bit 0) */
|
||||
#define OTP_UPPER_HALF 0x00000001
|
||||
#define OTP_NO_ECC 0x00000010 /* do not use ECC */
|
||||
#define OTP_LOCK 0x00000020 /* sets page protection bit for page */
|
||||
#define OTP_ACCESS_READ 0x00001000
|
||||
#define OTP_ACCESS_READWRITE 0x00002000
|
||||
|
||||
/* Return values for all functions */
|
||||
#define OTP_SUCCESS 0x00000000
|
||||
#define OTP_MASTER_ERROR 0x001
|
||||
#define OTP_WRITE_ERROR 0x003
|
||||
#define OTP_READ_ERROR 0x005
|
||||
#define OTP_ACC_VIO_ERROR 0x009
|
||||
#define OTP_DATA_MULT_ERROR 0x011
|
||||
#define OTP_ECC_MULT_ERROR 0x021
|
||||
#define OTP_PREV_WR_ERROR 0x041
|
||||
#define OTP_DATA_SB_WARN 0x100
|
||||
#define OTP_ECC_SB_WARN 0x200
|
||||
|
||||
/**
|
||||
* bfin_otp_read - Read OTP pages
|
||||
*
|
||||
* All reads must be in half page chunks (half page == 64 bits).
|
||||
*/
|
||||
static ssize_t bfin_otp_read(struct file *file, char __user *buff, size_t count, loff_t *pos)
|
||||
{
|
||||
ssize_t bytes_done;
|
||||
u32 page, flags, ret;
|
||||
u64 content;
|
||||
|
||||
stampit();
|
||||
|
||||
if (count % sizeof(u64))
|
||||
return -EMSGSIZE;
|
||||
|
||||
if (mutex_lock_interruptible(&bfin_otp_lock))
|
||||
return -ERESTARTSYS;
|
||||
|
||||
bytes_done = 0;
|
||||
page = *pos / (sizeof(u64) * 2);
|
||||
while (bytes_done < count) {
|
||||
flags = (*pos % (sizeof(u64) * 2) ? OTP_UPPER_HALF : OTP_LOWER_HALF);
|
||||
stamp("processing page %i (%s)", page, (flags == OTP_UPPER_HALF ? "upper" : "lower"));
|
||||
ret = otp_read(page, flags, &content);
|
||||
if (ret & OTP_MASTER_ERROR) {
|
||||
bytes_done = -EIO;
|
||||
break;
|
||||
}
|
||||
if (copy_to_user(buff + bytes_done, &content, sizeof(content))) {
|
||||
bytes_done = -EFAULT;
|
||||
break;
|
||||
}
|
||||
if (flags == OTP_UPPER_HALF)
|
||||
++page;
|
||||
bytes_done += sizeof(content);
|
||||
*pos += sizeof(content);
|
||||
}
|
||||
|
||||
mutex_unlock(&bfin_otp_lock);
|
||||
|
||||
return bytes_done;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_BFIN_OTP_WRITE_ENABLE
|
||||
/**
|
||||
* bfin_otp_write - Write OTP pages
|
||||
*
|
||||
* All writes must be in half page chunks (half page == 64 bits).
|
||||
*/
|
||||
static ssize_t bfin_otp_write(struct file *filp, const char __user *buff, size_t count, loff_t *pos)
|
||||
{
|
||||
stampit();
|
||||
|
||||
if (count % sizeof(u64))
|
||||
return -EMSGSIZE;
|
||||
|
||||
if (mutex_lock_interruptible(&bfin_otp_lock))
|
||||
return -ERESTARTSYS;
|
||||
|
||||
/* need otp_init() documentation before this can be implemented */
|
||||
|
||||
mutex_unlock(&bfin_otp_lock);
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
#else
|
||||
# define bfin_otp_write NULL
|
||||
#endif
|
||||
|
||||
static struct file_operations bfin_otp_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.read = bfin_otp_read,
|
||||
.write = bfin_otp_write,
|
||||
};
|
||||
|
||||
static struct miscdevice bfin_otp_misc_device = {
|
||||
.minor = MISC_DYNAMIC_MINOR,
|
||||
.name = DRIVER_NAME,
|
||||
.fops = &bfin_otp_fops,
|
||||
};
|
||||
|
||||
/**
|
||||
* bfin_otp_init - Initialize module
|
||||
*
|
||||
* Registers the device and notifier handler. Actual device
|
||||
* initialization is handled by bfin_otp_open().
|
||||
*/
|
||||
static int __init bfin_otp_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
stampit();
|
||||
|
||||
ret = misc_register(&bfin_otp_misc_device);
|
||||
if (ret) {
|
||||
pr_init(KERN_ERR PFX "unable to register a misc device\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
pr_init(KERN_INFO PFX "initialized\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* bfin_otp_exit - Deinitialize module
|
||||
*
|
||||
* Unregisters the device and notifier handler. Actual device
|
||||
* deinitialization is handled by bfin_otp_close().
|
||||
*/
|
||||
static void __exit bfin_otp_exit(void)
|
||||
{
|
||||
stampit();
|
||||
|
||||
misc_deregister(&bfin_otp_misc_device);
|
||||
}
|
||||
|
||||
module_init(bfin_otp_init);
|
||||
module_exit(bfin_otp_exit);
|
||||
|
||||
MODULE_AUTHOR("Mike Frysinger <vapier@gentoo.org>");
|
||||
MODULE_DESCRIPTION("Blackfin OTP Memory Interface");
|
||||
MODULE_LICENSE("GPL");
|
||||
@ -827,7 +827,7 @@ config ULTRA32
|
||||
|
||||
config BFIN_MAC
|
||||
tristate "Blackfin 527/536/537 on-chip mac support"
|
||||
depends on NET_ETHERNET && (BF527 || BF537 || BF536) && (!BF537_PORT_H)
|
||||
depends on NET_ETHERNET && (BF527 || BF537 || BF536)
|
||||
select CRC32
|
||||
select MII
|
||||
select PHYLIB
|
||||
|
||||
@ -151,7 +151,8 @@ void kgdb_put_debug_char(int chr)
|
||||
{
|
||||
struct bfin_serial_port *uart;
|
||||
|
||||
if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
|
||||
if (CONFIG_KGDB_UART_PORT < 0
|
||||
|| CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
|
||||
uart = &bfin_serial_ports[0];
|
||||
else
|
||||
uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
|
||||
@ -173,7 +174,8 @@ int kgdb_get_debug_char(void)
|
||||
struct bfin_serial_port *uart;
|
||||
unsigned char chr;
|
||||
|
||||
if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
|
||||
if (CONFIG_KGDB_UART_PORT < 0
|
||||
|| CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
|
||||
uart = &bfin_serial_ports[0];
|
||||
else
|
||||
uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
|
||||
@ -192,7 +194,7 @@ int kgdb_get_debug_char(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if ANOMALY_05000230 && defined(CONFIG_SERIAL_BFIN_PIO)
|
||||
#if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
|
||||
# define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
|
||||
# define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
|
||||
#else
|
||||
@ -237,7 +239,7 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
|
||||
}
|
||||
#endif
|
||||
|
||||
if (ANOMALY_05000230) {
|
||||
if (ANOMALY_05000363) {
|
||||
/* The BF533 (and BF561) family of processors have a nice anomaly
|
||||
* where they continuously generate characters for a "single" break.
|
||||
* We have to basically ignore this flood until the "next" valid
|
||||
@ -249,9 +251,6 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
|
||||
* timeout was picked as it must absolutely be larger than 1
|
||||
* character time +/- some percent. So 1.5 sounds good. All other
|
||||
* Blackfin families operate properly. Woo.
|
||||
* Note: While Anomaly 05000230 does not directly address this,
|
||||
* the changes that went in for it also fixed this issue.
|
||||
* That anomaly was fixed in 0.5+ silicon. I like bunnies.
|
||||
*/
|
||||
if (anomaly_start.tv_sec) {
|
||||
struct timeval curr;
|
||||
@ -285,7 +284,7 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
|
||||
}
|
||||
|
||||
if (status & BI) {
|
||||
if (ANOMALY_05000230)
|
||||
if (ANOMALY_05000363)
|
||||
if (bfin_revid() < 5)
|
||||
do_gettimeofday(&anomaly_start);
|
||||
uart->port.icount.brk++;
|
||||
@ -507,8 +506,7 @@ void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
|
||||
uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
|
||||
}
|
||||
|
||||
uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
|
||||
add_timer(&(uart->rx_dma_timer));
|
||||
mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
|
||||
}
|
||||
|
||||
static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
|
||||
@ -551,9 +549,7 @@ static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
|
||||
clear_dma_irqstat(uart->rx_dma_channel);
|
||||
spin_unlock(&uart->port.lock);
|
||||
|
||||
del_timer(&(uart->rx_dma_timer));
|
||||
uart->rx_dma_timer.expires = jiffies;
|
||||
add_timer(&(uart->rx_dma_timer));
|
||||
mod_timer(&(uart->rx_dma_timer), jiffies);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
@ -749,7 +745,7 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
||||
unsigned long flags;
|
||||
unsigned int baud, quot;
|
||||
unsigned short val, ier, lsr, lcr = 0;
|
||||
unsigned short val, ier, lcr = 0;
|
||||
|
||||
switch (termios->c_cflag & CSIZE) {
|
||||
case CS8:
|
||||
@ -806,10 +802,6 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
|
||||
UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
|
||||
|
||||
do {
|
||||
lsr = UART_GET_LSR(uart);
|
||||
} while (!(lsr & TEMT));
|
||||
|
||||
/* Disable UART */
|
||||
ier = UART_GET_IER(uart);
|
||||
#ifdef CONFIG_BF54x
|
||||
@ -900,6 +892,31 @@ bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable the IrDA function if tty->ldisc.num is N_IRDA.
|
||||
* In other cases, disable IrDA function.
|
||||
*/
|
||||
static void bfin_set_ldisc(struct tty_struct *tty)
|
||||
{
|
||||
int line = tty->index;
|
||||
unsigned short val;
|
||||
|
||||
if (line >= tty->driver->num)
|
||||
return;
|
||||
|
||||
switch (tty->ldisc.num) {
|
||||
case N_IRDA:
|
||||
val = UART_GET_GCTL(&bfin_serial_ports[line]);
|
||||
val |= (IREN | RPOLC);
|
||||
UART_PUT_GCTL(&bfin_serial_ports[line], val);
|
||||
break;
|
||||
default:
|
||||
val = UART_GET_GCTL(&bfin_serial_ports[line]);
|
||||
val &= ~(IREN | RPOLC);
|
||||
UART_PUT_GCTL(&bfin_serial_ports[line], val);
|
||||
}
|
||||
}
|
||||
|
||||
static struct uart_ops bfin_serial_pops = {
|
||||
.tx_empty = bfin_serial_tx_empty,
|
||||
.set_mctrl = bfin_serial_set_mctrl,
|
||||
@ -1172,7 +1189,7 @@ static struct uart_driver bfin_serial_reg = {
|
||||
.dev_name = BFIN_SERIAL_NAME,
|
||||
.major = BFIN_SERIAL_MAJOR,
|
||||
.minor = BFIN_SERIAL_MINOR,
|
||||
.nr = NR_PORTS,
|
||||
.nr = BFIN_UART_NR_PORTS,
|
||||
.cons = BFIN_SERIAL_CONSOLE,
|
||||
};
|
||||
|
||||
@ -1261,6 +1278,7 @@ static int __init bfin_serial_init(void)
|
||||
|
||||
ret = uart_register_driver(&bfin_serial_reg);
|
||||
if (ret == 0) {
|
||||
bfin_serial_reg.tty_driver->set_ldisc = bfin_set_ldisc;
|
||||
ret = platform_driver_register(&bfin_serial_driver);
|
||||
if (ret) {
|
||||
pr_debug("uart register failed\n");
|
||||
|
||||
1
include/asm-blackfin/.gitignore
vendored
Normal file
1
include/asm-blackfin/.gitignore
vendored
Normal file
@ -0,0 +1 @@
|
||||
+mach
|
||||
@ -112,20 +112,10 @@ extern void init_leds(void);
|
||||
|
||||
extern const char bfin_board_name[];
|
||||
extern unsigned long wall_jiffies;
|
||||
extern unsigned long ipdt_table[];
|
||||
extern unsigned long dpdt_table[];
|
||||
extern unsigned long icplb_table[];
|
||||
extern unsigned long dcplb_table[];
|
||||
|
||||
extern unsigned long ipdt_swapcount_table[];
|
||||
extern unsigned long dpdt_swapcount_table[];
|
||||
|
||||
extern unsigned long table_start, table_end;
|
||||
|
||||
extern unsigned long bfin_sic_iwr[];
|
||||
extern u16 _bfin_swrst; /* shadow for Software Reset Register (SWRST) */
|
||||
extern struct file_operations dpmc_fops;
|
||||
extern char _start;
|
||||
extern unsigned long _ramstart, _ramend, _rambase;
|
||||
extern unsigned long memory_start, memory_end, physical_mem_end;
|
||||
extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[],
|
||||
|
||||
@ -1,4 +1,17 @@
|
||||
#ifndef _BLACKFIN_BUG_H
|
||||
#define _BLACKFIN_BUG_H
|
||||
#include <asm-generic/bug.h>
|
||||
|
||||
#ifdef CONFIG_BUG
|
||||
#define HAVE_ARCH_BUG
|
||||
|
||||
#define BUG() do { \
|
||||
dump_bfin_trace_buffer(); \
|
||||
printk(KERN_EMERG "BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
|
||||
panic("BUG!"); \
|
||||
} while (0)
|
||||
|
||||
#endif
|
||||
|
||||
#include <asm-generic/bug.h>
|
||||
|
||||
#endif
|
||||
|
||||
@ -74,32 +74,6 @@
|
||||
#define ASYNC_MEMORY_CPLB_COVERAGE ((ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \
|
||||
ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE) / SIZE_4M)
|
||||
|
||||
/*
|
||||
* Number of required data CPLB switchtable entries
|
||||
* MEMSIZE / 4 (we mostly install 4M page size CPLBs
|
||||
* approx 16 for smaller 1MB page size CPLBs for allignment purposes
|
||||
* 1 for L1 Data Memory
|
||||
* possibly 1 for L2 Data Memory
|
||||
* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
|
||||
* 1 for ASYNC Memory
|
||||
*/
|
||||
|
||||
|
||||
#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1 \
|
||||
+ ASYNC_MEMORY_CPLB_COVERAGE) * 2)
|
||||
|
||||
/*
|
||||
* Number of required instruction CPLB switchtable entries
|
||||
* MEMSIZE / 4 (we mostly install 4M page size CPLBs
|
||||
* approx 12 for smaller 1MB page size CPLBs for allignment purposes
|
||||
* 1 for L1 Instruction Memory
|
||||
* possibly 1 for L2 Instruction Memory
|
||||
* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
|
||||
*/
|
||||
|
||||
#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1 + 1) * 2)
|
||||
|
||||
|
||||
#define CPLB_ENABLE_ICACHE_P 0
|
||||
#define CPLB_ENABLE_DCACHE_P 1
|
||||
#define CPLB_ENABLE_DCACHE2_P 2
|
||||
|
||||
@ -27,6 +27,14 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
|
||||
extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
|
||||
enum dma_data_direction direction);
|
||||
|
||||
static inline dma_addr_t
|
||||
dma_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction dir)
|
||||
{
|
||||
return dma_map_single(dev, page_address(page) + offset, size, dir);
|
||||
}
|
||||
|
||||
/*
|
||||
* Unmap a single streaming mode DMA translation. The dma_addr and size
|
||||
* must match what was provided for in a previous pci_map_single call. All
|
||||
@ -38,6 +46,13 @@ extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
|
||||
extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
|
||||
enum dma_data_direction direction);
|
||||
|
||||
static inline void
|
||||
dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
|
||||
enum dma_data_direction dir)
|
||||
{
|
||||
dma_unmap_single(dev, dma_addr, size, dir);
|
||||
}
|
||||
|
||||
/*
|
||||
* Map a set of buffers described by scatterlist in streaming
|
||||
* mode for DMA. This is the scather-gather version of the
|
||||
|
||||
@ -191,4 +191,7 @@ void clear_dma_irqstat(unsigned int channel);
|
||||
void *dma_memcpy(void *dest, const void *src, size_t count);
|
||||
void *safe_dma_memcpy(void *dest, const void *src, size_t count);
|
||||
|
||||
extern int channel2irq(unsigned int channel);
|
||||
extern struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL];
|
||||
|
||||
#endif
|
||||
|
||||
@ -21,6 +21,18 @@
|
||||
# define MAX_BLACKFIN_GPTIMERS 8
|
||||
# define TIMER0_GROUP_REG TIMER_ENABLE
|
||||
#endif
|
||||
/*
|
||||
* BF54x: 11 timers (BF542: 8 timers):
|
||||
*/
|
||||
#if defined(BF548_FAMILY)
|
||||
# ifdef CONFIG_BF542
|
||||
# define MAX_BLACKFIN_GPTIMERS 8
|
||||
# else
|
||||
# define MAX_BLACKFIN_GPTIMERS 11
|
||||
# define TIMER8_GROUP_REG TIMER_ENABLE1
|
||||
# endif
|
||||
# define TIMER0_GROUP_REG TIMER_ENABLE0
|
||||
#endif
|
||||
/*
|
||||
* BF561: 12 timers:
|
||||
*/
|
||||
@ -44,40 +56,28 @@
|
||||
#define TIMER0bit 0x0001 /* 0001b */
|
||||
#define TIMER1bit 0x0002 /* 0010b */
|
||||
#define TIMER2bit 0x0004 /* 0100b */
|
||||
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 3)
|
||||
# define TIMER3bit 0x0008
|
||||
# define TIMER4bit 0x0010
|
||||
# define TIMER5bit 0x0020
|
||||
# define TIMER6bit 0x0040
|
||||
# define TIMER7bit 0x0080
|
||||
#endif
|
||||
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
# define TIMER8bit 0x0100
|
||||
# define TIMER9bit 0x0200
|
||||
# define TIMER10bit 0x0400
|
||||
# define TIMER11bit 0x0800
|
||||
#endif
|
||||
#define TIMER3bit 0x0008
|
||||
#define TIMER4bit 0x0010
|
||||
#define TIMER5bit 0x0020
|
||||
#define TIMER6bit 0x0040
|
||||
#define TIMER7bit 0x0080
|
||||
#define TIMER8bit 0x0100
|
||||
#define TIMER9bit 0x0200
|
||||
#define TIMER10bit 0x0400
|
||||
#define TIMER11bit 0x0800
|
||||
|
||||
#define TIMER0_id 0
|
||||
#define TIMER1_id 1
|
||||
#define TIMER2_id 2
|
||||
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 3)
|
||||
# define TIMER3_id 3
|
||||
# define TIMER4_id 4
|
||||
# define TIMER5_id 5
|
||||
# define TIMER6_id 6
|
||||
# define TIMER7_id 7
|
||||
#endif
|
||||
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
# define TIMER8_id 8
|
||||
# define TIMER9_id 9
|
||||
# define TIMER10_id 10
|
||||
# define TIMER11_id 11
|
||||
#endif
|
||||
#define TIMER3_id 3
|
||||
#define TIMER4_id 4
|
||||
#define TIMER5_id 5
|
||||
#define TIMER6_id 6
|
||||
#define TIMER7_id 7
|
||||
#define TIMER8_id 8
|
||||
#define TIMER9_id 9
|
||||
#define TIMER10_id 10
|
||||
#define TIMER11_id 11
|
||||
|
||||
/* associated timers for ppi framesync: */
|
||||
|
||||
@ -124,45 +124,31 @@
|
||||
/*
|
||||
* Timer Status Register Bits
|
||||
*/
|
||||
#define TIMER_STATUS_TIMIL0 0x0001
|
||||
#define TIMER_STATUS_TIMIL1 0x0002
|
||||
#define TIMER_STATUS_TIMIL2 0x0004
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 3)
|
||||
# define TIMER_STATUS_TIMIL3 0x00000008
|
||||
# define TIMER_STATUS_TIMIL4 0x00010000
|
||||
# define TIMER_STATUS_TIMIL5 0x00020000
|
||||
# define TIMER_STATUS_TIMIL6 0x00040000
|
||||
# define TIMER_STATUS_TIMIL7 0x00080000
|
||||
# if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
# define TIMER_STATUS_TIMIL8 0x0001
|
||||
# define TIMER_STATUS_TIMIL9 0x0002
|
||||
# define TIMER_STATUS_TIMIL10 0x0004
|
||||
# define TIMER_STATUS_TIMIL11 0x0008
|
||||
# endif
|
||||
# define TIMER_STATUS_INTR 0x000F000F
|
||||
#else
|
||||
# define TIMER_STATUS_INTR 0x0007 /* any timer interrupt */
|
||||
#endif
|
||||
#define TIMER_STATUS_TIMIL0 0x0001
|
||||
#define TIMER_STATUS_TIMIL1 0x0002
|
||||
#define TIMER_STATUS_TIMIL2 0x0004
|
||||
#define TIMER_STATUS_TIMIL3 0x00000008
|
||||
#define TIMER_STATUS_TIMIL4 0x00010000
|
||||
#define TIMER_STATUS_TIMIL5 0x00020000
|
||||
#define TIMER_STATUS_TIMIL6 0x00040000
|
||||
#define TIMER_STATUS_TIMIL7 0x00080000
|
||||
#define TIMER_STATUS_TIMIL8 0x0001
|
||||
#define TIMER_STATUS_TIMIL9 0x0002
|
||||
#define TIMER_STATUS_TIMIL10 0x0004
|
||||
#define TIMER_STATUS_TIMIL11 0x0008
|
||||
|
||||
#define TIMER_STATUS_TOVF0 0x0010 /* timer 0 overflow error */
|
||||
#define TIMER_STATUS_TOVF1 0x0020
|
||||
#define TIMER_STATUS_TOVF2 0x0040
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 3)
|
||||
# define TIMER_STATUS_TOVF3 0x00000080
|
||||
# define TIMER_STATUS_TOVF4 0x00100000
|
||||
# define TIMER_STATUS_TOVF5 0x00200000
|
||||
# define TIMER_STATUS_TOVF6 0x00400000
|
||||
# define TIMER_STATUS_TOVF7 0x00800000
|
||||
# if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
# define TIMER_STATUS_TOVF8 0x0010
|
||||
# define TIMER_STATUS_TOVF9 0x0020
|
||||
# define TIMER_STATUS_TOVF10 0x0040
|
||||
# define TIMER_STATUS_TOVF11 0x0080
|
||||
# endif
|
||||
# define TIMER_STATUS_OFLOW 0x00F000F0
|
||||
#else
|
||||
# define TIMER_STATUS_OFLOW 0x0070 /* any timer overflow */
|
||||
#endif
|
||||
#define TIMER_STATUS_TOVF0 0x0010 /* timer 0 overflow error */
|
||||
#define TIMER_STATUS_TOVF1 0x0020
|
||||
#define TIMER_STATUS_TOVF2 0x0040
|
||||
#define TIMER_STATUS_TOVF3 0x00000080
|
||||
#define TIMER_STATUS_TOVF4 0x00100000
|
||||
#define TIMER_STATUS_TOVF5 0x00200000
|
||||
#define TIMER_STATUS_TOVF6 0x00400000
|
||||
#define TIMER_STATUS_TOVF7 0x00800000
|
||||
#define TIMER_STATUS_TOVF8 0x0010
|
||||
#define TIMER_STATUS_TOVF9 0x0020
|
||||
#define TIMER_STATUS_TOVF10 0x0040
|
||||
#define TIMER_STATUS_TOVF11 0x0080
|
||||
|
||||
/*
|
||||
* Timer Slave Enable Status : write 1 to clear
|
||||
@ -170,22 +156,16 @@
|
||||
#define TIMER_STATUS_TRUN0 0x1000
|
||||
#define TIMER_STATUS_TRUN1 0x2000
|
||||
#define TIMER_STATUS_TRUN2 0x4000
|
||||
#if (MAX_BLACKFIN_GPTIMERS > 3)
|
||||
# define TIMER_STATUS_TRUN3 0x00008000
|
||||
# define TIMER_STATUS_TRUN4 0x10000000
|
||||
# define TIMER_STATUS_TRUN5 0x20000000
|
||||
# define TIMER_STATUS_TRUN6 0x40000000
|
||||
# define TIMER_STATUS_TRUN7 0x80000000
|
||||
# define TIMER_STATUS_TRUN 0xF000F000
|
||||
# if (MAX_BLACKFIN_GPTIMERS > 8)
|
||||
# define TIMER_STATUS_TRUN8 0x1000
|
||||
# define TIMER_STATUS_TRUN9 0x2000
|
||||
# define TIMER_STATUS_TRUN10 0x4000
|
||||
# define TIMER_STATUS_TRUN11 0x8000
|
||||
# endif
|
||||
#else
|
||||
# define TIMER_STATUS_TRUN 0x7000
|
||||
#endif
|
||||
#define TIMER_STATUS_TRUN3 0x00008000
|
||||
#define TIMER_STATUS_TRUN4 0x10000000
|
||||
#define TIMER_STATUS_TRUN5 0x20000000
|
||||
#define TIMER_STATUS_TRUN6 0x40000000
|
||||
#define TIMER_STATUS_TRUN7 0x80000000
|
||||
#define TIMER_STATUS_TRUN 0xF000F000
|
||||
#define TIMER_STATUS_TRUN8 0x1000
|
||||
#define TIMER_STATUS_TRUN9 0x2000
|
||||
#define TIMER_STATUS_TRUN10 0x4000
|
||||
#define TIMER_STATUS_TRUN11 0x8000
|
||||
|
||||
/* The actual gptimer API */
|
||||
|
||||
|
||||
@ -2,12 +2,12 @@
|
||||
* File: include/asm-blackfin/mach-bf527/anomaly.h
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* Copyright (C) 2004-2007 Analog Devices Inc.
|
||||
* Copyright (C) 2004-2008 Analog Devices Inc.
|
||||
* Licensed under the GPL-2 or later.
|
||||
*/
|
||||
|
||||
/* This file shoule be up to date with:
|
||||
* - Revision A, May 30, 2007; ADSP-BF527 Blackfin Processor Anomaly List
|
||||
* - Revision C, 01/25/2008; ADSP-BF527 Blackfin Processor Anomaly List
|
||||
*/
|
||||
|
||||
#ifndef _MACH_ANOMALY_H_
|
||||
@ -15,35 +15,85 @@
|
||||
|
||||
/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
|
||||
#define ANOMALY_05000074 (1)
|
||||
/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
|
||||
#define ANOMALY_05000119 (1)
|
||||
/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
|
||||
#define ANOMALY_05000122 (1)
|
||||
/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
|
||||
#define ANOMALY_05000245 (1)
|
||||
/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
|
||||
#define ANOMALY_05000265 (1)
|
||||
/* Memory-To-Memory DMA Source/Destination Descriptors Must Be in Same Memory Space */
|
||||
#define ANOMALY_05000301 (1)
|
||||
/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
|
||||
#define ANOMALY_05000312 (1)
|
||||
/* Incorrect Access of OTP_STATUS During otp_write() Function */
|
||||
#define ANOMALY_05000328 (1)
|
||||
/* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */
|
||||
#define ANOMALY_05000337 (1)
|
||||
/* TWI Does Not Operate Correctly Under Certain Signal Termination Conditions */
|
||||
/* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */
|
||||
#define ANOMALY_05000341 (1)
|
||||
/* TWI May Not Operate Correctly Under Certain Signal Termination Conditions */
|
||||
#define ANOMALY_05000342 (1)
|
||||
/* Boot ROM Kernel Incorrectly Alters Reset Value of USB Register */
|
||||
/* USB Calibration Value Is Not Initialized */
|
||||
#define ANOMALY_05000346 (1)
|
||||
/* Preboot Routine Incorrectly Alters Reset Value of USB Register */
|
||||
#define ANOMALY_05000347 (1)
|
||||
/* Security Features Are Not Functional */
|
||||
#define ANOMALY_05000348 (__SILICON_REVISION__ < 1)
|
||||
/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
|
||||
#define ANOMALY_05000355 (1)
|
||||
/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
|
||||
#define ANOMALY_05000357 (1)
|
||||
/* Incorrect Revision Number in DSPID Register */
|
||||
#define ANOMALY_05000364 (__SILICON_REVISION__ > 0)
|
||||
/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
|
||||
#define ANOMALY_05000366 (1)
|
||||
/* New Feature: Higher Default CCLK Rate */
|
||||
#define ANOMALY_05000368 (1)
|
||||
/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
|
||||
#define ANOMALY_05000371 (1)
|
||||
/* Authentication Fails To Initiate */
|
||||
#define ANOMALY_05000376 (__SILICON_REVISION__ > 0)
|
||||
/* Data Read From L3 Memory by USB DMA May be Corrupted */
|
||||
#define ANOMALY_05000380 (1)
|
||||
/* USB Full-speed Mode not Fully Tested */
|
||||
#define ANOMALY_05000381 (1)
|
||||
/* New Feature: Boot from OTP Memory */
|
||||
#define ANOMALY_05000385 (1)
|
||||
/* New Feature: bfrom_SysControl() Routine */
|
||||
#define ANOMALY_05000386 (1)
|
||||
/* New Feature: Programmable Preboot Settings */
|
||||
#define ANOMALY_05000387 (1)
|
||||
/* Reset Vector Must Not Be in SDRAM Memory Space */
|
||||
#define ANOMALY_05000389 (1)
|
||||
/* New Feature: pTempCurrent Added to ADI_BOOT_DATA Structure */
|
||||
#define ANOMALY_05000392 (1)
|
||||
/* New Feature: dTempByteCount Value Increased in ADI_BOOT_DATA Structure */
|
||||
#define ANOMALY_05000393 (1)
|
||||
/* New Feature: Log Buffer Functionality */
|
||||
#define ANOMALY_05000394 (1)
|
||||
/* New Feature: Hook Routine Functionality */
|
||||
#define ANOMALY_05000395 (1)
|
||||
/* New Feature: Header Indirect Bit */
|
||||
#define ANOMALY_05000396 (1)
|
||||
/* New Feature: BK_ONES, BK_ZEROS, and BK_DATECODE Constants */
|
||||
#define ANOMALY_05000397 (1)
|
||||
/* New Feature: SWRESET, DFRESET and WDRESET Bits Added to SYSCR Register */
|
||||
#define ANOMALY_05000398 (1)
|
||||
/* New Feature: BCODE_NOBOOT Added to BCODE Field of SYSCR Register */
|
||||
#define ANOMALY_05000399 (1)
|
||||
/* PPI Data Signals D0 and D8 do not Tristate After Disabling PPI */
|
||||
#define ANOMALY_05000401 (1)
|
||||
|
||||
/* Anomalies that don't exist on this proc */
|
||||
#define ANOMALY_05000323 (0)
|
||||
#define ANOMALY_05000244 (0)
|
||||
#define ANOMALY_05000198 (0)
|
||||
#define ANOMALY_05000125 (0)
|
||||
#define ANOMALY_05000158 (0)
|
||||
#define ANOMALY_05000273 (0)
|
||||
#define ANOMALY_05000263 (0)
|
||||
#define ANOMALY_05000311 (0)
|
||||
#define ANOMALY_05000183 (0)
|
||||
#define ANOMALY_05000198 (0)
|
||||
#define ANOMALY_05000230 (0)
|
||||
#define ANOMALY_05000244 (0)
|
||||
#define ANOMALY_05000261 (0)
|
||||
#define ANOMALY_05000263 (0)
|
||||
#define ANOMALY_05000266 (0)
|
||||
#define ANOMALY_05000273 (0)
|
||||
#define ANOMALY_05000311 (0)
|
||||
#define ANOMALY_05000312 (0)
|
||||
#define ANOMALY_05000323 (0)
|
||||
#define ANOMALY_05000363 (0)
|
||||
|
||||
#endif
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user