This is the 5.4.257 stable release
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Merge 5.4.257 into android11-5.4-lts
Changes in 5.4.257
erofs: ensure that the post-EOF tails are all zeroed
ARM: pxa: remove use of symbol_get()
mmc: au1xmmc: force non-modular build and remove symbol_get usage
net: enetc: use EXPORT_SYMBOL_GPL for enetc_phc_index
rtc: ds1685: use EXPORT_SYMBOL_GPL for ds1685_rtc_poweroff
modules: only allow symbol_get of EXPORT_SYMBOL_GPL modules
USB: serial: option: add Quectel EM05G variant (0x030e)
USB: serial: option: add FOXCONN T99W368/T99W373 product
HID: wacom: remove the battery when the EKR is off
staging: rtl8712: fix race condition
Bluetooth: btsdio: fix use after free bug in btsdio_remove due to race condition
serial: sc16is7xx: fix bug when first setting GPIO direction
firmware: stratix10-svc: Fix an NULL vs IS_ERR() bug in probe
fsi: master-ast-cf: Add MODULE_FIRMWARE macro
nilfs2: fix general protection fault in nilfs_lookup_dirty_data_buffers()
nilfs2: fix WARNING in mark_buffer_dirty due to discarded buffer reuse
pinctrl: amd: Don't show `Invalid config param` errors
9p: virtio: make sure 'offs' is initialized in zc_request
ASoC: da7219: Flush pending AAD IRQ when suspending
ASoC: da7219: Check for failure reading AAD IRQ events
ethernet: atheros: fix return value check in atl1c_tso_csum()
vxlan: generalize vxlan_parse_gpe_hdr and remove unused args
m68k: Fix invalid .section syntax
s390/dasd: use correct number of retries for ERP requests
s390/dasd: fix hanging device after request requeue
fs/nls: make load_nls() take a const parameter
ASoc: codecs: ES8316: Fix DMIC config
ASoC: atmel: Fix the 8K sample parameter in I2SC master
platform/x86: intel: hid: Always call BTNL ACPI method
platform/x86: huawei-wmi: Silence ambient light sensor
security: keys: perform capable check only on privileged operations
clk: fixed-mmio: make COMMON_CLK_FIXED_MMIO depend on HAS_IOMEM
net: usb: qmi_wwan: add Quectel EM05GV2
idmaengine: make FSL_EDMA and INTEL_IDMA64 depends on HAS_IOMEM
scsi: qedi: Fix potential deadlock on &qedi_percpu->p_work_lock
netlabel: fix shift wrapping bug in netlbl_catmap_setlong()
bnx2x: fix page fault following EEH recovery
sctp: handle invalid error codes without calling BUG()
cifs: add a warning when the in-flight count goes negative
scsi: storvsc: Always set no_report_opcodes
ALSA: seq: oss: Fix racy open/close of MIDI devices
platform/mellanox: Fix mlxbf-tmfifo not handling all virtio CONSOLE notifications
net: Avoid address overwrite in kernel_connect
powerpc/32s: Fix assembler warning about r0
udf: Check consistency of Space Bitmap Descriptor
udf: Handle error when adding extent to a file
Revert "net: macsec: preserve ingress frame ordering"
reiserfs: Check the return value from __getblk()
eventfd: Export eventfd_ctx_do_read()
eventfd: prevent underflow for eventfd semaphores
new helper: lookup_positive_unlocked()
fs: Fix error checking for d_hash_and_lookup()
tmpfs: verify {g,u}id mount options correctly
OPP: Fix passing 0 to PTR_ERR in _opp_attach_genpd()
x86/asm: Make more symbols local
x86/boot: Annotate local functions
x86/decompressor: Don't rely on upper 32 bits of GPRs being preserved
perf/imx_ddr: don't enable counter0 if none of 4 counters are used
cpufreq: powernow-k8: Use related_cpus instead of cpus in driver.exit()
bpf: Clear the probe_addr for uprobe
tcp: tcp_enter_quickack_mode() should be static
regmap: rbtree: Use alloc_flags for memory allocations
spi: tegra20-sflash: fix to check return value of platform_get_irq() in tegra_sflash_probe()
can: gs_usb: gs_usb_receive_bulk_callback(): count RX overflow errors also in case of OOM
wifi: mwifiex: Fix OOB and integer underflow when rx packets
mwifiex: switch from 'pci_' to 'dma_' API
wifi: mwifiex: fix error recovery in PCIE buffer descriptor management
crypto: stm32 - Properly handle pm_runtime_get failing
Bluetooth: nokia: fix value check in nokia_bluetooth_serdev_probe()
crypto: caam - fix unchecked return value error
hwrng: iproc-rng200 - use semicolons rather than commas to separate statements
hwrng: iproc-rng200 - Implement suspend and resume calls
lwt: Fix return values of BPF xmit ops
lwt: Check LWTUNNEL_XMIT_CONTINUE strictly
fs: ocfs2: namei: check return value of ocfs2_add_entry()
wifi: mwifiex: fix memory leak in mwifiex_histogram_read()
wifi: mwifiex: Fix missed return in oob checks failed path
wifi: ath9k: fix races between ath9k_wmi_cmd and ath9k_wmi_ctrl_rx
wifi: ath9k: protect WMI command response buffer replacement with a lock
wifi: mwifiex: avoid possible NULL skb pointer dereference
wifi: ath9k: use IS_ERR() with debugfs_create_dir()
net: arcnet: Do not call kfree_skb() under local_irq_disable()
mlxsw: i2c: Fix chunk size setting in output mailbox buffer
mlxsw: i2c: Limit single transaction buffer size
net/sched: sch_hfsc: Ensure inner classes have fsc curve
netrom: Deny concurrent connect().
drm/bridge: tc358764: Fix debug print parameter order
quota: avoid increasing DQST_LOOKUPS when iterating over dirty/inuse list
quota: factor out dquot_write_dquot()
quota: rename dquot_active() to inode_quota_active()
quota: add new helper dquot_active()
quota: fix dqput() to follow the guarantees dquot_srcu should provide
drm/amdgpu: avoid integer overflow warning in amdgpu_device_resize_fb_bar()
ARM: dts: BCM53573: Drop nonexistent "default-off" LED trigger
ARM: dts: BCM53573: Add cells sizes to PCIe node
ARM: dts: BCM53573: Use updated "spi-gpio" binding properties
drm/etnaviv: fix dumping of active MMU context
ARM: dts: s3c6410: move fixed clocks under root node in Mini6410
ARM: dts: s3c6410: align node SROM bus node name with dtschema in Mini6410
ARM: dts: s3c64xx: align pinctrl with dtschema
ARM: dts: samsung: s3c6410-mini6410: correct ethernet reg addresses (split)
ARM: dts: s5pv210: add RTC 32 KHz clock in SMDKV210
ARM: dts: s5pv210: use defines for IRQ flags in SMDKV210
ARM: dts: s5pv210: correct ethernet unit address in SMDKV210
ARM: dts: s5pv210: add dummy 5V regulator for backlight on SMDKv210
ARM: dts: samsung: s5pv210-smdkv210: correct ethernet reg addresses (split)
drm: adv7511: Fix low refresh rate register for ADV7533/5
ARM: dts: BCM53573: Fix Ethernet info for Luxul devices
arm64: dts: qcom: sdm845: Add missing RPMh power domain to GCC
drm/amdgpu: Update min() to min_t() in 'amdgpu_info_ioctl'
md/bitmap: don't set max_write_behind if there is no write mostly device
md/md-bitmap: hold 'reconfig_mutex' in backlog_store()
drm/tegra: Remove superfluous error messages around platform_get_irq()
drm/tegra: dpaux: Fix incorrect return value of platform_get_irq
of: unittest: fix null pointer dereferencing in of_unittest_find_node_by_name()
drm/armada: Fix off-by-one error in armada_overlay_get_property()
drm/panel: simple: Add missing connector type and pixel format for AUO T215HVN01
ima: Remove deprecated IMA_TRUSTED_KEYRING Kconfig
drm/msm/mdp5: Don't leak some plane state
smackfs: Prevent underflow in smk_set_cipso()
audit: fix possible soft lockup in __audit_inode_child()
drm/mediatek: Fix potential memory leak if vmap() fail
of: unittest: Fix overlay type in apply/revert check
ALSA: ac97: Fix possible error value of *rac97
ipmi:ssif: Add check for kstrdup
ipmi:ssif: Fix a memory leak when scanning for an adapter
drivers: clk: keystone: Fix parameter judgment in _of_pll_clk_init()
clk: sunxi-ng: Modify mismatched function name
PCI: Mark NVIDIA T4 GPUs to avoid bus reset
PCI: pciehp: Use RMW accessors for changing LNKCTL
PCI/ASPM: Use RMW accessors for changing LNKCTL
clk: imx: composite-8m: fix clock pauses when set_rate would be a no-op
powerpc/fadump: reset dump area size if fadump memory reserve fails
PCI: Add #defines for Enter Compliance, Transmit Margin
drm/amdgpu: Correct Transmit Margin masks
drm/amdgpu: Replace numbers with PCI_EXP_LNKCTL2 definitions
drm/amdgpu: Prefer pcie_capability_read_word()
drm/amdgpu: Use RMW accessors for changing LNKCTL
drm/radeon: Correct Transmit Margin masks
drm/radeon: Replace numbers with PCI_EXP_LNKCTL2 definitions
drm/radeon: Prefer pcie_capability_read_word()
drm/radeon: Use RMW accessors for changing LNKCTL
wifi: ath10k: Use RMW accessors for changing LNKCTL
nfs/blocklayout: Use the passed in gfp flags
powerpc/iommu: Fix notifiers being shared by PCI and VIO buses
jfs: validate max amount of blocks before allocation.
fs: lockd: avoid possible wrong NULL parameter
NFSD: da_addr_body field missing in some GETDEVICEINFO replies
NFS: Guard against READDIR loop when entry names exceed MAXNAMELEN
media: v4l2-fwnode: fix v4l2_fwnode_parse_link handling
media: v4l2-fwnode: simplify v4l2_fwnode_parse_link
media: v4l2-core: Fix a potential resource leak in v4l2_fwnode_parse_link()
drivers: usb: smsusb: fix error handling code in smsusb_init_device
media: dib7000p: Fix potential division by zero
media: dvb-usb: m920x: Fix a potential memory leak in m920x_i2c_xfer()
media: cx24120: Add retval check for cx24120_message_send()
media: mediatek: vcodec: Return NULL if no vdec_fb is found
usb: phy: mxs: fix getting wrong state with mxs_phy_is_otg_host()
scsi: iscsi: Add strlen() check in iscsi_if_set{_host}_param()
scsi: be2iscsi: Add length check when parsing nlattrs
scsi: qla4xxx: Add length check when parsing nlattrs
serial: sprd: getting port index via serial aliases only
serial: sprd: remove redundant sprd_port cleanup
serial: sprd: Assign sprd_port after initialized to avoid wrong access
serial: sprd: Fix DMA buffer leak issue
x86/APM: drop the duplicate APM_MINOR_DEV macro
scsi: qedf: Do not touch __user pointer in qedf_dbg_stop_io_on_error_cmd_read() directly
scsi: qedf: Do not touch __user pointer in qedf_dbg_debug_cmd_read() directly
scsi: qedf: Do not touch __user pointer in qedf_dbg_fp_int_cmd_read() directly
coresight: tmc: Explicit type conversions to prevent integer overflow
dma-buf/sync_file: Fix docs syntax
driver core: test_async: fix an error code
IB/uverbs: Fix an potential error pointer dereference
iommu/vt-d: Fix to flush cache of PASID directory table
media: go7007: Remove redundant if statement
USB: gadget: f_mass_storage: Fix unused variable warning
media: i2c: ov5640: Configure HVP lines in s_power callback
media: ov5640: Enable MIPI interface in ov5640_set_power_mipi()
media: i2c: ov2680: Set V4L2_CTRL_FLAG_MODIFY_LAYOUT on flips
media: ov2680: Remove auto-gain and auto-exposure controls
media: ov2680: Fix ov2680_bayer_order()
media: ov2680: Fix vflip / hflip set functions
media: ov2680: Fix regulators being left enabled on ov2680_power_on() errors
scsi: core: Use 32-bit hostnum in scsi_host_lookup()
scsi: fcoe: Fix potential deadlock on &fip->ctlr_lock
serial: tegra: handle clk prepare error in tegra_uart_hw_init()
amba: bus: fix refcount leak
Revert "IB/isert: Fix incorrect release of isert connection"
RDMA/siw: Balance the reference of cep->kref in the error path
RDMA/siw: Correct wrong debug message
HID: logitech-dj: Fix error handling in logi_dj_recv_switch_to_dj_mode()
HID: multitouch: Correct devm device reference for hidinput input_dev name
x86/speculation: Mark all Skylake CPUs as vulnerable to GDS
tracing: Fix race issue between cpu buffer write and swap
phy/rockchip: inno-hdmi: use correct vco_div_5 macro on rk3328
phy/rockchip: inno-hdmi: round fractal pixclock in rk3328 recalc_rate
phy/rockchip: inno-hdmi: do not power on rk3328 post pll on reg write
rpmsg: glink: Add check for kstrdup
mtd: rawnand: fsmc: handle clk prepare error in fsmc_nand_resume()
um: Fix hostaudio build errors
dmaengine: ste_dma40: Add missing IRQ check in d40_probe
cpufreq: Fix the race condition while updating the transition_task of policy
virtio_ring: fix avail_wrap_counter in virtqueue_add_packed
igmp: limit igmpv3_newpack() packet size to IP_MAX_MTU
netfilter: ipset: add the missing IP_SET_HASH_WITH_NET0 macro for ip_set_hash_netportnet.c
netfilter: xt_u32: validate user space input
netfilter: xt_sctp: validate the flag_info count
skbuff: skb_segment, Call zero copy functions before using skbuff frags
igb: set max size RX buffer when store bad packet is enabled
PM / devfreq: Fix leak in devfreq_dev_release()
ALSA: pcm: Fix missing fixup call in compat hw_refine ioctl
ipmi_si: fix a memleak in try_smi_init()
ARM: OMAP2+: Fix -Warray-bounds warning in _pwrdm_state_switch()
backlight/gpio_backlight: Compare against struct fb_info.device
backlight/bd6107: Compare against struct fb_info.device
backlight/lv5207lp: Compare against struct fb_info.device
xtensa: PMU: fix base address for the newer hardware
media: dvb: symbol fixup for dvb_attach()
ntb: Drop packets when qp link is down
ntb: Clean up tx tail index on link down
ntb: Fix calculation ntb_transport_tx_free_entry()
Revert "PCI: Mark NVIDIA T4 GPUs to avoid bus reset"
procfs: block chmod on /proc/thread-self/comm
parisc: Fix /proc/cpuinfo output for lscpu
dlm: fix plock lookup when using multiple lockspaces
dccp: Fix out of bounds access in DCCP error handler
X.509: if signature is unsupported skip validation
net: handle ARPHRD_PPP in dev_is_mac_header_xmit()
fsverity: skip PKCS#7 parser when keyring is empty
pstore/ram: Check start of empty przs during init
s390/ipl: add missing secure/has_secure file to ipl type 'unknown'
crypto: stm32 - fix loop iterating through scatterlist for DMA
cpufreq: brcmstb-avs-cpufreq: Fix -Warray-bounds bug
sc16is7xx: Set iobase to device index
serial: sc16is7xx: fix broken port 0 uart init
usb: typec: tcpci: clear the fault status bit
udf: initialize newblock to 0
drm: fix double free for gbo in drm_gem_vram_init and drm_gem_vram_create
net/ipv6: SKB symmetric hash should incorporate transport ports
scsi: qla2xxx: fix inconsistent TMF timeout
scsi: qla2xxx: Fix erroneous link up failure
scsi: qla2xxx: Turn off noisy message log
scsi: qla2xxx: Remove unsupported ql2xenabledif option
fbdev/ep93xx-fb: Do not assign to struct fb_info.dev
drm/ast: Fix DRAM init on AST2200
lib/test_meminit: allocate pages up to order MAX_ORDER
parisc: led: Fix LAN receive and transmit LEDs
parisc: led: Reduce CPU overhead for disk & lan LED computation
clk: qcom: gcc-mdm9615: use proper parent for pll0_vote clock
soc: qcom: qmi_encdec: Restrict string length in decode
NFSv4/pnfs: minor fix for cleanup path in nfs4_get_device_info
kconfig: fix possible buffer overflow
perf annotate bpf: Don't enclose non-debug code with an assert()
x86/virt: Drop unnecessary check on extended CPUID level in cpu_has_svm()
perf top: Don't pass an ERR_PTR() directly to perf_session__delete()
watchdog: intel-mid_wdt: add MODULE_ALIAS() to allow auto-load
pwm: lpc32xx: Remove handling of PWM channels
sctp: annotate data-races around sk->sk_wmem_queued
ipv4: annotate data-races around fi->fib_dead
net: read sk->sk_family once in sk_mc_loop()
igb: disable virtualization features on 82580
veth: Fixing transmit return status for dropped packets
net: ipv6/addrconf: avoid integer underflow in ipv6_create_tempaddr
af_unix: Fix data-races around user->unix_inflight.
af_unix: Fix data-race around unix_tot_inflight.
af_unix: Fix data-races around sk->sk_shutdown.
af_unix: Fix data race around sk->sk_err.
net: sched: sch_qfq: Fix UAF in qfq_dequeue()
kcm: Destroy mutex in kcm_exit_net()
igc: Change IGC_MIN to allow set rx/tx value between 64 and 80
igbvf: Change IGBVF_MIN to allow set rx/tx value between 64 and 80
igb: Change IGB_MIN to allow set rx/tx value between 64 and 80
s390/zcrypt: don't leak memory if dev_set_name() fails
idr: fix param name in idr_alloc_cyclic() doc
ip_tunnels: use DEV_STATS_INC()
netfilter: nfnetlink_osf: avoid OOB read
net: hns3: fix the port information display when sfp is absent
sh: boards: Fix CEU buffer size passed to dma_declare_coherent_memory()
ata: sata_gemini: Add missing MODULE_DESCRIPTION
ata: pata_ftide010: Add missing MODULE_DESCRIPTION
fuse: nlookup missing decrement in fuse_direntplus_link
btrfs: don't start transaction when joining with TRANS_JOIN_NOSTART
btrfs: use the correct superblock to compare fsid in btrfs_validate_super
mtd: rawnand: brcmnand: Fix crash during the panic_write
mtd: rawnand: brcmnand: Fix potential out-of-bounds access in oob write
mtd: rawnand: brcmnand: Fix potential false time out warning
perf hists browser: Fix hierarchy mode header
perf tools: Handle old data in PERF_RECORD_ATTR
usb: typec: tcpm: Refactor tcpm_handle_vdm_request payload handling
usb: typec: tcpm: Refactor tcpm_handle_vdm_request
usb: typec: bus: verify partner exists in typec_altmode_attention
ARM: dts: BCM5301X: Extend RAM to full 256MB for Linksys EA6500 V2
clk: imx8mm: Move 1443X/1416X PLL clock structure to common place
net: ipv4: fix one memleak in __inet_del_ifa()
net: ethernet: mvpp2_main: fix possible OOB write in mvpp2_ethtool_get_rxnfc()
net: ethernet: mtk_eth_soc: fix possible NULL pointer dereference in mtk_hwlro_get_fdir_all()
r8152: check budget for r8152_poll()
kcm: Fix memory leak in error path of kcm_sendmsg()
platform/mellanox: mlxbf-tmfifo: Drop the Rx packet if no more descriptors
mlxbf-tmfifo: sparse tags for config access
platform/mellanox: mlxbf-tmfifo: Drop jumbo frames
net/tls: do not free tls_rec on async operation in bpf_exec_tx_verdict()
ixgbe: fix timestamp configuration code
kcm: Fix error handling for SOCK_DGRAM in kcm_sendmsg().
drm/amd/display: Fix a bug when searching for insert_above_mpcc
parisc: Drop loops_per_jiffy from per_cpu struct
autofs: fix memory leak of waitqueues in autofs_catatonic_mode
btrfs: output extra debug info if we failed to find an inline backref
locks: fix KASAN: use-after-free in trace_event_raw_event_filelock_lock
ACPICA: Add AML_NO_OPERAND_RESOLVE flag to Timer
kernel/fork: beware of __put_task_struct() calling context
ACPI: video: Add backlight=native DMI quirk for Lenovo Ideapad Z470
perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09
hw_breakpoint: fix single-stepping when using bpf_overflow_handler
devlink: remove reload failed checks in params get/set callbacks
wifi: ath9k: fix printk specifier
wifi: mwifiex: fix fortify warning
crypto: lib/mpi - avoid null pointer deref in mpi_cmp_ui()
tpm_tis: Resend command to recover from data transfer errors
mmc: sdhci-esdhc-imx: improve ESDHC_FLAG_ERR010450
alx: fix OOB-read compiler warning
wifi: mac80211_hwsim: drop short frames
drm/exynos: fix a possible null-pointer dereference due to data race in exynos_drm_crtc_atomic_disable()
bus: ti-sysc: Configure uart quirks for k3 SoC
md: raid1: fix potential OOB in raid1_remove_disk()
ext2: fix datatype of block number in ext2_xattr_set2()
fs/jfs: prevent double-free in dbUnmount() after failed jfs_remount()
jfs: fix invalid free of JFS_IP(ipimap)->i_imap in diUnmount
powerpc/pseries: fix possible memory leak in ibmebus_bus_init()
media: dvb-usb-v2: af9035: Fix null-ptr-deref in af9035_i2c_master_xfer
media: dw2102: Fix null-ptr-deref in dw2102_i2c_transfer()
media: af9005: Fix null-ptr-deref in af9005_i2c_xfer
media: anysee: fix null-ptr-deref in anysee_master_xfer
media: az6007: Fix null-ptr-deref in az6007_i2c_xfer()
media: tuners: qt1010: replace BUG_ON with a regular error
media: pci: cx23885: replace BUG with error return
usb: gadget: fsl_qe_udc: validate endpoint index for ch9 udc
scsi: target: iscsi: Fix buffer overflow in lio_target_nacl_info_show()
serial: cpm_uart: Avoid suspicious locking
media: pci: ipu3-cio2: Initialise timing struct to avoid a compiler warning
kobject: Add sanity check for kset->kobj.ktype in kset_register()
tools features: Add feature test to check if libbfd has buildid support
perf jevents: Make build dependency on test JSONs
perf tools: Add an option to build without libbfd
btrfs: move btrfs_pinned_by_swapfile prototype into volumes.h
btrfs: add a helper to read the superblock metadata_uuid
btrfs: compare the correct fsid/metadata_uuid in btrfs_validate_super
selftests: tracing: Fix to unmount tracefs for recovering environment
md/raid1: fix error: ISO C90 forbids mixed declarations
attr: block mode changes of symlinks
btrfs: fix lockdep splat and potential deadlock after failure running delayed items
tracing: Have current_trace inc the trace array ref count
tracing: Have option files inc the trace array ref count
nfsd: fix change_info in NFSv4 RENAME replies
tracefs: Add missing lockdown check to tracefs_create_dir()
i2c: aspeed: Reset the i2c controller when timeout occurs
scsi: megaraid_sas: Fix deadlock on firmware crashdump
ext4: fix rec_len verify error
mtd: rawnand: brcmnand: Fix ECC level field setting for v7.2 controller
drm/amdgpu: fix amdgpu_cs_p1_user_fence
net/sched: Retire rsvp classifier
Linux 5.4.257
Change-Id: I99f6978fc0d802b5803005fe903a90aed315d88d
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
commit
2b44f56202
@ -134,6 +134,9 @@ stable kernels.
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+----------------+-----------------+-----------------+-----------------------------+
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| Hisilicon | Hip08 SMMU PMCG | #162001800 | N/A |
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+----------------+-----------------+-----------------+-----------------------------+
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| Hisilicon | Hip08 SMMU PMCG | #162001900 | N/A |
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| | Hip09 SMMU PMCG | | |
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+----------------+-----------------+-----------------+-----------------------------+
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+----------------+-----------------+-----------------+-----------------------------+
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| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
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+----------------+-----------------+-----------------+-----------------------------+
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2
Makefile
2
Makefile
@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 4
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SUBLEVEL = 256
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SUBLEVEL = 257
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EXTRAVERSION =
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NAME = Kleptomaniac Octopus
|
||||
|
||||
|
||||
@ -19,7 +19,8 @@
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x08000000>;
|
||||
reg = <0x00000000 0x08000000>,
|
||||
<0x88000000 0x08000000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
|
||||
@ -26,7 +26,6 @@
|
||||
wlan {
|
||||
label = "bcm53xx:blue:wlan";
|
||||
gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
system {
|
||||
@ -46,3 +45,16 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&bcm54210e>;
|
||||
|
||||
mdio {
|
||||
/delete-node/ switch@1e;
|
||||
|
||||
bcm54210e: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -26,7 +26,6 @@
|
||||
5ghz {
|
||||
label = "bcm53xx:blue:5ghz";
|
||||
gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
system {
|
||||
@ -42,7 +41,6 @@
|
||||
2ghz {
|
||||
label = "bcm53xx:blue:2ghz";
|
||||
gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
};
|
||||
|
||||
@ -83,3 +81,16 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&bcm54210e>;
|
||||
|
||||
mdio {
|
||||
/delete-node/ switch@1e;
|
||||
|
||||
bcm54210e: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -127,6 +127,9 @@
|
||||
|
||||
pcie0: pcie@2000 {
|
||||
reg = <0x00002000 0x1000>;
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
};
|
||||
|
||||
usb2: usb2@4000 {
|
||||
|
||||
@ -60,9 +60,9 @@
|
||||
spi {
|
||||
compatible = "spi-gpio";
|
||||
num-chipselects = <1>;
|
||||
gpio-sck = <&chipcommon 21 0>;
|
||||
gpio-miso = <&chipcommon 22 0>;
|
||||
gpio-mosi = <&chipcommon 23 0>;
|
||||
sck-gpios = <&chipcommon 21 0>;
|
||||
miso-gpios = <&chipcommon 22 0>;
|
||||
mosi-gpios = <&chipcommon 23 0>;
|
||||
cs-gpios = <&chipcommon 24 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
@ -28,29 +28,21 @@
|
||||
bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1";
|
||||
};
|
||||
|
||||
clocks {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
fin_pll: oscillator@0 {
|
||||
compatible = "fixed-clock";
|
||||
reg = <0>;
|
||||
clock-frequency = <12000000>;
|
||||
clock-output-names = "fin_pll";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
xusbxti: oscillator@1 {
|
||||
compatible = "fixed-clock";
|
||||
reg = <1>;
|
||||
clock-output-names = "xusbxti";
|
||||
clock-frequency = <48000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
fin_pll: oscillator-0 {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
clock-output-names = "fin_pll";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
srom-cs1@18000000 {
|
||||
xusbxti: oscillator-1 {
|
||||
compatible = "fixed-clock";
|
||||
clock-output-names = "xusbxti";
|
||||
clock-frequency = <48000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
srom-cs1-bus@18000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -59,7 +51,7 @@
|
||||
|
||||
ethernet@18000000 {
|
||||
compatible = "davicom,dm9000";
|
||||
reg = <0x18000000 0x2 0x18000004 0x2>;
|
||||
reg = <0x18000000 0x2>, <0x18000004 0x2>;
|
||||
interrupt-parent = <&gpn>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
davicom,no-eeprom;
|
||||
@ -201,12 +193,12 @@
|
||||
};
|
||||
|
||||
&pinctrl0 {
|
||||
gpio_leds: gpio-leds {
|
||||
gpio_leds: gpio-leds-pins {
|
||||
samsung,pins = "gpk-4", "gpk-5", "gpk-6", "gpk-7";
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
gpio_keys: gpio-keys {
|
||||
gpio_keys: gpio-keys-pins {
|
||||
samsung,pins = "gpn-0", "gpn-1", "gpn-2", "gpn-3",
|
||||
"gpn-4", "gpn-5", "gpl-11", "gpl-12";
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
|
||||
@ -16,111 +16,111 @@
|
||||
* Pin banks
|
||||
*/
|
||||
|
||||
gpa: gpa {
|
||||
gpa: gpa-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpb: gpb {
|
||||
gpb: gpb-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpc: gpc {
|
||||
gpc: gpc-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpd: gpd {
|
||||
gpd: gpd-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpe: gpe {
|
||||
gpe: gpe-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
gpf: gpf {
|
||||
gpf: gpf-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpg: gpg {
|
||||
gpg: gpg-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gph: gph {
|
||||
gph: gph-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpi: gpi {
|
||||
gpi: gpi-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
gpj: gpj {
|
||||
gpj: gpj-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
gpk: gpk {
|
||||
gpk: gpk-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
gpl: gpl {
|
||||
gpl: gpl-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpm: gpm {
|
||||
gpm: gpm-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpn: gpn {
|
||||
gpn: gpn-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpo: gpo {
|
||||
gpo: gpo-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpp: gpp {
|
||||
gpp: gpp-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpq: gpq {
|
||||
gpq: gpq-gpio-bank {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
@ -131,225 +131,225 @@
|
||||
* Pin groups
|
||||
*/
|
||||
|
||||
uart0_data: uart0-data {
|
||||
uart0_data: uart0-data-pins {
|
||||
samsung,pins = "gpa-0", "gpa-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
uart0_fctl: uart0-fctl {
|
||||
uart0_fctl: uart0-fctl-pins {
|
||||
samsung,pins = "gpa-2", "gpa-3";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
uart1_data: uart1-data {
|
||||
uart1_data: uart1-data-pins {
|
||||
samsung,pins = "gpa-4", "gpa-5";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
uart1_fctl: uart1-fctl {
|
||||
uart1_fctl: uart1-fctl-pins {
|
||||
samsung,pins = "gpa-6", "gpa-7";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
uart2_data: uart2-data {
|
||||
uart2_data: uart2-data-pins {
|
||||
samsung,pins = "gpb-0", "gpb-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
uart3_data: uart3-data {
|
||||
uart3_data: uart3-data-pins {
|
||||
samsung,pins = "gpb-2", "gpb-3";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
ext_dma_0: ext-dma-0 {
|
||||
ext_dma_0: ext-dma-0-pins {
|
||||
samsung,pins = "gpb-0", "gpb-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
ext_dma_1: ext-dma-1 {
|
||||
ext_dma_1: ext-dma-1-pins {
|
||||
samsung,pins = "gpb-2", "gpb-3";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
irda_data_0: irda-data-0 {
|
||||
irda_data_0: irda-data-0-pins {
|
||||
samsung,pins = "gpb-0", "gpb-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
irda_data_1: irda-data-1 {
|
||||
irda_data_1: irda-data-1-pins {
|
||||
samsung,pins = "gpb-2", "gpb-3";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
irda_sdbw: irda-sdbw {
|
||||
irda_sdbw: irda-sdbw-pins {
|
||||
samsung,pins = "gpb-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
i2c0_bus: i2c0-bus {
|
||||
i2c0_bus: i2c0-bus-pins {
|
||||
samsung,pins = "gpb-5", "gpb-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
|
||||
};
|
||||
|
||||
i2c1_bus: i2c1-bus {
|
||||
i2c1_bus: i2c1-bus-pins {
|
||||
/* S3C6410-only */
|
||||
samsung,pins = "gpb-2", "gpb-3";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_6>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
|
||||
};
|
||||
|
||||
spi0_bus: spi0-bus {
|
||||
spi0_bus: spi0-bus-pins {
|
||||
samsung,pins = "gpc-0", "gpc-1", "gpc-2";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
|
||||
};
|
||||
|
||||
spi0_cs: spi0-cs {
|
||||
spi0_cs: spi0-cs-pins {
|
||||
samsung,pins = "gpc-3";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
spi1_bus: spi1-bus {
|
||||
spi1_bus: spi1-bus-pins {
|
||||
samsung,pins = "gpc-4", "gpc-5", "gpc-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
|
||||
};
|
||||
|
||||
spi1_cs: spi1-cs {
|
||||
spi1_cs: spi1-cs-pins {
|
||||
samsung,pins = "gpc-7";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd0_cmd: sd0-cmd {
|
||||
sd0_cmd: sd0-cmd-pins {
|
||||
samsung,pins = "gpg-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd0_clk: sd0-clk {
|
||||
sd0_clk: sd0-clk-pins {
|
||||
samsung,pins = "gpg-0";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd0_bus1: sd0-bus1 {
|
||||
sd0_bus1: sd0-bus1-pins {
|
||||
samsung,pins = "gpg-2";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd0_bus4: sd0-bus4 {
|
||||
sd0_bus4: sd0-bus4-pins {
|
||||
samsung,pins = "gpg-2", "gpg-3", "gpg-4", "gpg-5";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd0_cd: sd0-cd {
|
||||
sd0_cd: sd0-cd-pins {
|
||||
samsung,pins = "gpg-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
|
||||
};
|
||||
|
||||
sd1_cmd: sd1-cmd {
|
||||
sd1_cmd: sd1-cmd-pins {
|
||||
samsung,pins = "gph-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd1_clk: sd1-clk {
|
||||
sd1_clk: sd1-clk-pins {
|
||||
samsung,pins = "gph-0";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd1_bus1: sd1-bus1 {
|
||||
sd1_bus1: sd1-bus1-pins {
|
||||
samsung,pins = "gph-2";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd1_bus4: sd1-bus4 {
|
||||
sd1_bus4: sd1-bus4-pins {
|
||||
samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd1_bus8: sd1-bus8 {
|
||||
sd1_bus8: sd1-bus8-pins {
|
||||
samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5",
|
||||
"gph-6", "gph-7", "gph-8", "gph-9";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd1_cd: sd1-cd {
|
||||
sd1_cd: sd1-cd-pins {
|
||||
samsung,pins = "gpg-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
|
||||
};
|
||||
|
||||
sd2_cmd: sd2-cmd {
|
||||
sd2_cmd: sd2-cmd-pins {
|
||||
samsung,pins = "gpc-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd2_clk: sd2-clk {
|
||||
sd2_clk: sd2-clk-pins {
|
||||
samsung,pins = "gpc-5";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd2_bus1: sd2-bus1 {
|
||||
sd2_bus1: sd2-bus1-pins {
|
||||
samsung,pins = "gph-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
sd2_bus4: sd2-bus4 {
|
||||
sd2_bus4: sd2-bus4-pins {
|
||||
samsung,pins = "gph-6", "gph-7", "gph-8", "gph-9";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
i2s0_bus: i2s0-bus {
|
||||
i2s0_bus: i2s0-bus-pins {
|
||||
samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
i2s0_cdclk: i2s0-cdclk {
|
||||
i2s0_cdclk: i2s0-cdclk-pins {
|
||||
samsung,pins = "gpd-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
i2s1_bus: i2s1-bus {
|
||||
i2s1_bus: i2s1-bus-pins {
|
||||
samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
i2s1_cdclk: i2s1-cdclk {
|
||||
i2s1_cdclk: i2s1-cdclk-pins {
|
||||
samsung,pins = "gpe-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
i2s2_bus: i2s2-bus {
|
||||
i2s2_bus: i2s2-bus-pins {
|
||||
/* S3C6410-only */
|
||||
samsung,pins = "gpc-4", "gpc-5", "gpc-6", "gph-6",
|
||||
"gph-8", "gph-9";
|
||||
@ -357,50 +357,50 @@
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
i2s2_cdclk: i2s2-cdclk {
|
||||
i2s2_cdclk: i2s2-cdclk-pins {
|
||||
/* S3C6410-only */
|
||||
samsung,pins = "gph-7";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
pcm0_bus: pcm0-bus {
|
||||
pcm0_bus: pcm0-bus-pins {
|
||||
samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
pcm0_extclk: pcm0-extclk {
|
||||
pcm0_extclk: pcm0-extclk-pins {
|
||||
samsung,pins = "gpd-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
pcm1_bus: pcm1-bus {
|
||||
pcm1_bus: pcm1-bus-pins {
|
||||
samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
pcm1_extclk: pcm1-extclk {
|
||||
pcm1_extclk: pcm1-extclk-pins {
|
||||
samsung,pins = "gpe-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
ac97_bus_0: ac97-bus-0 {
|
||||
ac97_bus_0: ac97-bus-0-pins {
|
||||
samsung,pins = "gpd-0", "gpd-1", "gpd-2", "gpd-3", "gpd-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
ac97_bus_1: ac97-bus-1 {
|
||||
ac97_bus_1: ac97-bus-1-pins {
|
||||
samsung,pins = "gpe-0", "gpe-1", "gpe-2", "gpe-3", "gpe-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
cam_port: cam-port {
|
||||
cam_port: cam-port-pins {
|
||||
samsung,pins = "gpf-0", "gpf-1", "gpf-2", "gpf-4",
|
||||
"gpf-5", "gpf-6", "gpf-7", "gpf-8",
|
||||
"gpf-9", "gpf-10", "gpf-11", "gpf-12";
|
||||
@ -408,242 +408,242 @@
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
cam_rst: cam-rst {
|
||||
cam_rst: cam-rst-pins {
|
||||
samsung,pins = "gpf-3";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
cam_field: cam-field {
|
||||
cam_field: cam-field-pins {
|
||||
/* S3C6410-only */
|
||||
samsung,pins = "gpb-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
pwm_extclk: pwm-extclk {
|
||||
pwm_extclk: pwm-extclk-pins {
|
||||
samsung,pins = "gpf-13";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
pwm0_out: pwm0-out {
|
||||
pwm0_out: pwm0-out-pins {
|
||||
samsung,pins = "gpf-14";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
pwm1_out: pwm1-out {
|
||||
pwm1_out: pwm1-out-pins {
|
||||
samsung,pins = "gpf-15";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
clkout0: clkout-0 {
|
||||
clkout0: clkout-0-pins {
|
||||
samsung,pins = "gpf-14";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col0_0: keypad-col0-0 {
|
||||
keypad_col0_0: keypad-col0-0-pins {
|
||||
samsung,pins = "gph-0";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col1_0: keypad-col1-0 {
|
||||
keypad_col1_0: keypad-col1-0-pins {
|
||||
samsung,pins = "gph-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col2_0: keypad-col2-0 {
|
||||
keypad_col2_0: keypad-col2-0-pins {
|
||||
samsung,pins = "gph-2";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col3_0: keypad-col3-0 {
|
||||
keypad_col3_0: keypad-col3-0-pins {
|
||||
samsung,pins = "gph-3";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col4_0: keypad-col4-0 {
|
||||
keypad_col4_0: keypad-col4-0-pins {
|
||||
samsung,pins = "gph-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col5_0: keypad-col5-0 {
|
||||
keypad_col5_0: keypad-col5-0-pins {
|
||||
samsung,pins = "gph-5";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col6_0: keypad-col6-0 {
|
||||
keypad_col6_0: keypad-col6-0-pins {
|
||||
samsung,pins = "gph-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col7_0: keypad-col7-0 {
|
||||
keypad_col7_0: keypad-col7-0-pins {
|
||||
samsung,pins = "gph-7";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col0_1: keypad-col0-1 {
|
||||
keypad_col0_1: keypad-col0-1-pins {
|
||||
samsung,pins = "gpl-0";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col1_1: keypad-col1-1 {
|
||||
keypad_col1_1: keypad-col1-1-pins {
|
||||
samsung,pins = "gpl-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col2_1: keypad-col2-1 {
|
||||
keypad_col2_1: keypad-col2-1-pins {
|
||||
samsung,pins = "gpl-2";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col3_1: keypad-col3-1 {
|
||||
keypad_col3_1: keypad-col3-1-pins {
|
||||
samsung,pins = "gpl-3";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col4_1: keypad-col4-1 {
|
||||
keypad_col4_1: keypad-col4-1-pins {
|
||||
samsung,pins = "gpl-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col5_1: keypad-col5-1 {
|
||||
keypad_col5_1: keypad-col5-1-pins {
|
||||
samsung,pins = "gpl-5";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col6_1: keypad-col6-1 {
|
||||
keypad_col6_1: keypad-col6-1-pins {
|
||||
samsung,pins = "gpl-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_col7_1: keypad-col7-1 {
|
||||
keypad_col7_1: keypad-col7-1-pins {
|
||||
samsung,pins = "gpl-7";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row0_0: keypad-row0-0 {
|
||||
keypad_row0_0: keypad-row0-0-pins {
|
||||
samsung,pins = "gpk-8";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row1_0: keypad-row1-0 {
|
||||
keypad_row1_0: keypad-row1-0-pins {
|
||||
samsung,pins = "gpk-9";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row2_0: keypad-row2-0 {
|
||||
keypad_row2_0: keypad-row2-0-pins {
|
||||
samsung,pins = "gpk-10";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row3_0: keypad-row3-0 {
|
||||
keypad_row3_0: keypad-row3-0-pins {
|
||||
samsung,pins = "gpk-11";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row4_0: keypad-row4-0 {
|
||||
keypad_row4_0: keypad-row4-0-pins {
|
||||
samsung,pins = "gpk-12";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row5_0: keypad-row5-0 {
|
||||
keypad_row5_0: keypad-row5-0-pins {
|
||||
samsung,pins = "gpk-13";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row6_0: keypad-row6-0 {
|
||||
keypad_row6_0: keypad-row6-0-pins {
|
||||
samsung,pins = "gpk-14";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row7_0: keypad-row7-0 {
|
||||
keypad_row7_0: keypad-row7-0-pins {
|
||||
samsung,pins = "gpk-15";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row0_1: keypad-row0-1 {
|
||||
keypad_row0_1: keypad-row0-1-pins {
|
||||
samsung,pins = "gpn-0";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row1_1: keypad-row1-1 {
|
||||
keypad_row1_1: keypad-row1-1-pins {
|
||||
samsung,pins = "gpn-1";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row2_1: keypad-row2-1 {
|
||||
keypad_row2_1: keypad-row2-1-pins {
|
||||
samsung,pins = "gpn-2";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row3_1: keypad-row3-1 {
|
||||
keypad_row3_1: keypad-row3-1-pins {
|
||||
samsung,pins = "gpn-3";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row4_1: keypad-row4-1 {
|
||||
keypad_row4_1: keypad-row4-1-pins {
|
||||
samsung,pins = "gpn-4";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row5_1: keypad-row5-1 {
|
||||
keypad_row5_1: keypad-row5-1-pins {
|
||||
samsung,pins = "gpn-5";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row6_1: keypad-row6-1 {
|
||||
keypad_row6_1: keypad-row6-1-pins {
|
||||
samsung,pins = "gpn-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
keypad_row7_1: keypad-row7-1 {
|
||||
keypad_row7_1: keypad-row7-1-pins {
|
||||
samsung,pins = "gpn-7";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
lcd_ctrl: lcd-ctrl {
|
||||
lcd_ctrl: lcd-ctrl-pins {
|
||||
samsung,pins = "gpj-8", "gpj-9", "gpj-10", "gpj-11";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
lcd_data16: lcd-data-width16 {
|
||||
lcd_data16: lcd-data-width16-pins {
|
||||
samsung,pins = "gpi-3", "gpi-4", "gpi-5", "gpi-6",
|
||||
"gpi-7", "gpi-10", "gpi-11", "gpi-12",
|
||||
"gpi-13", "gpi-14", "gpi-15", "gpj-3",
|
||||
@ -652,7 +652,7 @@
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
lcd_data18: lcd-data-width18 {
|
||||
lcd_data18: lcd-data-width18-pins {
|
||||
samsung,pins = "gpi-2", "gpi-3", "gpi-4", "gpi-5",
|
||||
"gpi-6", "gpi-7", "gpi-10", "gpi-11",
|
||||
"gpi-12", "gpi-13", "gpi-14", "gpi-15",
|
||||
@ -662,7 +662,7 @@
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
lcd_data24: lcd-data-width24 {
|
||||
lcd_data24: lcd-data-width24-pins {
|
||||
samsung,pins = "gpi-0", "gpi-1", "gpi-2", "gpi-3",
|
||||
"gpi-4", "gpi-5", "gpi-6", "gpi-7",
|
||||
"gpi-8", "gpi-9", "gpi-10", "gpi-11",
|
||||
@ -673,7 +673,7 @@
|
||||
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
|
||||
};
|
||||
|
||||
hsi_bus: hsi-bus {
|
||||
hsi_bus: hsi-bus-pins {
|
||||
samsung,pins = "gpk-0", "gpk-1", "gpk-2", "gpk-3",
|
||||
"gpk-4", "gpk-5", "gpk-6", "gpk-7";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
|
||||
|
||||
@ -15,6 +15,7 @@
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "s5pv210.dtsi"
|
||||
|
||||
@ -31,11 +32,18 @@
|
||||
reg = <0x20000000 0x40000000>;
|
||||
};
|
||||
|
||||
ethernet@18000000 {
|
||||
pmic_ap_clk: clock-0 {
|
||||
/* Workaround for missing PMIC and its clock */
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
ethernet@a8000000 {
|
||||
compatible = "davicom,dm9000";
|
||||
reg = <0xA8000000 0x2 0xA8000002 0x2>;
|
||||
reg = <0xa8000000 0x2>, <0xa8000002 0x2>;
|
||||
interrupt-parent = <&gph1>;
|
||||
interrupts = <1 4>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
|
||||
local-mac-address = [00 00 de ad be ef];
|
||||
davicom,no-eeprom;
|
||||
};
|
||||
@ -47,6 +55,14 @@
|
||||
default-brightness-level = <6>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm3_out>;
|
||||
power-supply = <&dc5v_reg>;
|
||||
};
|
||||
|
||||
dc5v_reg: regulator-0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "DC5V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -147,6 +163,8 @@
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
clocks = <&clocks CLK_RTC>, <&pmic_ap_clk>;
|
||||
clock-names = "rtc", "rtc_src";
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
|
||||
@ -623,7 +623,7 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,
|
||||
hw->address &= ~alignment_mask;
|
||||
hw->ctrl.len <<= offset;
|
||||
|
||||
if (is_default_overflow_handler(bp)) {
|
||||
if (uses_default_overflow_handler(bp)) {
|
||||
/*
|
||||
* Mismatch breakpoints are required for single-stepping
|
||||
* breakpoints.
|
||||
@ -795,7 +795,7 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
|
||||
* Otherwise, insert a temporary mismatch breakpoint so that
|
||||
* we can single-step over the watchpoint trigger.
|
||||
*/
|
||||
if (!is_default_overflow_handler(wp))
|
||||
if (!uses_default_overflow_handler(wp))
|
||||
continue;
|
||||
step:
|
||||
enable_single_step(wp, instruction_pointer(regs));
|
||||
@ -808,7 +808,7 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
|
||||
info->trigger = addr;
|
||||
pr_debug("watchpoint fired: address = 0x%x\n", info->trigger);
|
||||
perf_bp_event(wp, regs);
|
||||
if (is_default_overflow_handler(wp))
|
||||
if (uses_default_overflow_handler(wp))
|
||||
enable_single_step(wp, instruction_pointer(regs));
|
||||
}
|
||||
|
||||
@ -883,7 +883,7 @@ static void breakpoint_handler(unsigned long unknown, struct pt_regs *regs)
|
||||
info->trigger = addr;
|
||||
pr_debug("breakpoint fired: address = 0x%x\n", addr);
|
||||
perf_bp_event(bp, regs);
|
||||
if (is_default_overflow_handler(bp))
|
||||
if (uses_default_overflow_handler(bp))
|
||||
enable_single_step(bp, addr);
|
||||
goto unlock;
|
||||
}
|
||||
|
||||
@ -174,7 +174,7 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
|
||||
break;
|
||||
case PWRDM_STATE_PREV:
|
||||
prev = pwrdm_read_prev_pwrst(pwrdm);
|
||||
if (pwrdm->state != prev)
|
||||
if (prev >= 0 && pwrdm->state != prev)
|
||||
pwrdm->state_counter[prev]++;
|
||||
if (prev == PWRDM_POWER_RET)
|
||||
_update_logic_membank_counters(pwrdm);
|
||||
|
||||
@ -220,8 +220,6 @@ void sharpsl_battery_kick(void)
|
||||
{
|
||||
schedule_delayed_work(&sharpsl_bat, msecs_to_jiffies(125));
|
||||
}
|
||||
EXPORT_SYMBOL(sharpsl_battery_kick);
|
||||
|
||||
|
||||
static void sharpsl_battery_thread(struct work_struct *private_)
|
||||
{
|
||||
|
||||
@ -9,7 +9,6 @@
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h> /* symbol_get ; symbol_put */
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
@ -514,17 +513,6 @@ static struct pxa2xx_spi_chip spitz_ads7846_chip = {
|
||||
.gpio_cs = SPITZ_GPIO_ADS7846_CS,
|
||||
};
|
||||
|
||||
static void spitz_bl_kick_battery(void)
|
||||
{
|
||||
void (*kick_batt)(void);
|
||||
|
||||
kick_batt = symbol_get(sharpsl_battery_kick);
|
||||
if (kick_batt) {
|
||||
kick_batt();
|
||||
symbol_put(sharpsl_battery_kick);
|
||||
}
|
||||
}
|
||||
|
||||
static struct corgi_lcd_platform_data spitz_lcdcon_info = {
|
||||
.init_mode = CORGI_LCD_MODE_VGA,
|
||||
.max_intensity = 0x2f,
|
||||
@ -532,7 +520,7 @@ static struct corgi_lcd_platform_data spitz_lcdcon_info = {
|
||||
.limit_mask = 0x0b,
|
||||
.gpio_backlight_cont = SPITZ_GPIO_BACKLIGHT_CONT,
|
||||
.gpio_backlight_on = SPITZ_GPIO_BACKLIGHT_ON,
|
||||
.kick_battery = spitz_bl_kick_battery,
|
||||
.kick_battery = sharpsl_battery_kick,
|
||||
};
|
||||
|
||||
static struct pxa2xx_spi_chip spitz_lcdcon_chip = {
|
||||
|
||||
@ -715,6 +715,7 @@
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
power-domains = <&rpmhpd SDM845_CX>;
|
||||
};
|
||||
|
||||
qfprom@784000 {
|
||||
|
||||
@ -654,7 +654,7 @@ static int breakpoint_handler(unsigned long unused, unsigned int esr,
|
||||
perf_bp_event(bp, regs);
|
||||
|
||||
/* Do we need to handle the stepping? */
|
||||
if (is_default_overflow_handler(bp))
|
||||
if (uses_default_overflow_handler(bp))
|
||||
step = 1;
|
||||
unlock:
|
||||
rcu_read_unlock();
|
||||
@ -733,7 +733,7 @@ static u64 get_distance_from_watchpoint(unsigned long addr, u64 val,
|
||||
static int watchpoint_report(struct perf_event *wp, unsigned long addr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
int step = is_default_overflow_handler(wp);
|
||||
int step = uses_default_overflow_handler(wp);
|
||||
struct arch_hw_breakpoint *info = counter_arch_bp(wp);
|
||||
|
||||
info->trigger = addr;
|
||||
|
||||
@ -499,12 +499,12 @@ in_ea:
|
||||
dbf %d0,morein
|
||||
rts
|
||||
|
||||
.section .fixup,#alloc,#execinstr
|
||||
.section .fixup,"ax"
|
||||
.even
|
||||
1:
|
||||
jbra fpsp040_die
|
||||
|
||||
.section __ex_table,#alloc
|
||||
.section __ex_table,"a"
|
||||
.align 4
|
||||
|
||||
.long in_ea,1b
|
||||
|
||||
@ -379,11 +379,11 @@ _060_real_access:
|
||||
|
||||
|
||||
| Execption handling for movs access to illegal memory
|
||||
.section .fixup,#alloc,#execinstr
|
||||
.section .fixup,"ax"
|
||||
.even
|
||||
1: moveq #-1,%d1
|
||||
rts
|
||||
.section __ex_table,#alloc
|
||||
.section __ex_table,"a"
|
||||
.align 4
|
||||
.long dmrbuae,1b
|
||||
.long dmrwuae,1b
|
||||
|
||||
@ -26,7 +26,7 @@ ENTRY(relocate_new_kernel)
|
||||
lea %pc@(.Lcopy),%a4
|
||||
2: addl #0x00000000,%a4 /* virt_to_phys() */
|
||||
|
||||
.section ".m68k_fixup","aw"
|
||||
.section .m68k_fixup,"aw"
|
||||
.long M68K_FIXUP_MEMOFFSET, 2b+2
|
||||
.previous
|
||||
|
||||
@ -49,7 +49,7 @@ ENTRY(relocate_new_kernel)
|
||||
lea %pc@(.Lcont040),%a4
|
||||
5: addl #0x00000000,%a4 /* virt_to_phys() */
|
||||
|
||||
.section ".m68k_fixup","aw"
|
||||
.section .m68k_fixup,"aw"
|
||||
.long M68K_FIXUP_MEMOFFSET, 5b+2
|
||||
.previous
|
||||
|
||||
|
||||
@ -14,7 +14,6 @@
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/spi/spi.h>
|
||||
@ -167,12 +166,7 @@ static struct platform_device db1x00_audio_dev = {
|
||||
|
||||
static irqreturn_t db1100_mmc_cd(int irq, void *ptr)
|
||||
{
|
||||
void (*mmc_cd)(struct mmc_host *, unsigned long);
|
||||
/* link against CONFIG_MMC=m */
|
||||
mmc_cd = symbol_get(mmc_detect_change);
|
||||
mmc_cd(ptr, msecs_to_jiffies(500));
|
||||
symbol_put(mmc_detect_change);
|
||||
|
||||
mmc_detect_change(ptr, msecs_to_jiffies(500));
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
||||
@ -10,7 +10,6 @@
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/leds.h>
|
||||
@ -340,14 +339,7 @@ static irqreturn_t db1200_mmc_cd(int irq, void *ptr)
|
||||
|
||||
static irqreturn_t db1200_mmc_cdfn(int irq, void *ptr)
|
||||
{
|
||||
void (*mmc_cd)(struct mmc_host *, unsigned long);
|
||||
|
||||
/* link against CONFIG_MMC=m */
|
||||
mmc_cd = symbol_get(mmc_detect_change);
|
||||
if (mmc_cd) {
|
||||
mmc_cd(ptr, msecs_to_jiffies(200));
|
||||
symbol_put(mmc_detect_change);
|
||||
}
|
||||
mmc_detect_change(ptr, msecs_to_jiffies(200));
|
||||
|
||||
msleep(100); /* debounce */
|
||||
if (irq == DB1200_SD0_INSERT_INT)
|
||||
@ -431,14 +423,7 @@ static irqreturn_t pb1200_mmc1_cd(int irq, void *ptr)
|
||||
|
||||
static irqreturn_t pb1200_mmc1_cdfn(int irq, void *ptr)
|
||||
{
|
||||
void (*mmc_cd)(struct mmc_host *, unsigned long);
|
||||
|
||||
/* link against CONFIG_MMC=m */
|
||||
mmc_cd = symbol_get(mmc_detect_change);
|
||||
if (mmc_cd) {
|
||||
mmc_cd(ptr, msecs_to_jiffies(200));
|
||||
symbol_put(mmc_detect_change);
|
||||
}
|
||||
mmc_detect_change(ptr, msecs_to_jiffies(200));
|
||||
|
||||
msleep(100); /* debounce */
|
||||
if (irq == PB1200_SD1_INSERT_INT)
|
||||
|
||||
@ -17,7 +17,6 @@
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/ata_platform.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/platnand.h>
|
||||
#include <linux/platform_device.h>
|
||||
@ -459,14 +458,7 @@ static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
|
||||
|
||||
static irqreturn_t db1300_mmc_cdfn(int irq, void *ptr)
|
||||
{
|
||||
void (*mmc_cd)(struct mmc_host *, unsigned long);
|
||||
|
||||
/* link against CONFIG_MMC=m. We can only be called once MMC core has
|
||||
* initialized the controller, so symbol_get() should always succeed.
|
||||
*/
|
||||
mmc_cd = symbol_get(mmc_detect_change);
|
||||
mmc_cd(ptr, msecs_to_jiffies(200));
|
||||
symbol_put(mmc_detect_change);
|
||||
mmc_detect_change(ptr, msecs_to_jiffies(200));
|
||||
|
||||
msleep(100); /* debounce */
|
||||
if (irq == DB1300_SD1_INSERT_INT)
|
||||
|
||||
@ -11,8 +11,8 @@
|
||||
#define LED1 0x02
|
||||
#define LED0 0x01 /* bottom (or furthest left) LED */
|
||||
|
||||
#define LED_LAN_TX LED0 /* for LAN transmit activity */
|
||||
#define LED_LAN_RCV LED1 /* for LAN receive activity */
|
||||
#define LED_LAN_RCV LED0 /* for LAN receive activity */
|
||||
#define LED_LAN_TX LED1 /* for LAN transmit activity */
|
||||
#define LED_DISK_IO LED2 /* for disk activity */
|
||||
#define LED_HEARTBEAT LED3 /* heartbeat */
|
||||
|
||||
|
||||
@ -97,7 +97,6 @@ struct cpuinfo_parisc {
|
||||
unsigned long cpu_loc; /* CPU location from PAT firmware */
|
||||
unsigned int state;
|
||||
struct parisc_device *dev;
|
||||
unsigned long loops_per_jiffy;
|
||||
};
|
||||
|
||||
extern struct system_cpuinfo_parisc boot_cpu_data;
|
||||
|
||||
@ -163,7 +163,6 @@ static int __init processor_probe(struct parisc_device *dev)
|
||||
if (cpuid)
|
||||
memset(p, 0, sizeof(struct cpuinfo_parisc));
|
||||
|
||||
p->loops_per_jiffy = loops_per_jiffy;
|
||||
p->dev = dev; /* Save IODC data in case we need it */
|
||||
p->hpa = dev->hpa.start; /* save CPU hpa */
|
||||
p->cpuid = cpuid; /* save CPU id */
|
||||
@ -373,10 +372,18 @@ int
|
||||
show_cpuinfo (struct seq_file *m, void *v)
|
||||
{
|
||||
unsigned long cpu;
|
||||
char cpu_name[60], *p;
|
||||
|
||||
/* strip PA path from CPU name to not confuse lscpu */
|
||||
strlcpy(cpu_name, per_cpu(cpu_data, 0).dev->name, sizeof(cpu_name));
|
||||
p = strrchr(cpu_name, '[');
|
||||
if (p)
|
||||
*(--p) = 0;
|
||||
|
||||
for_each_online_cpu(cpu) {
|
||||
const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
|
||||
#ifdef CONFIG_SMP
|
||||
const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
|
||||
|
||||
if (0 == cpuinfo->hpa)
|
||||
continue;
|
||||
#endif
|
||||
@ -421,8 +428,7 @@ show_cpuinfo (struct seq_file *m, void *v)
|
||||
|
||||
seq_printf(m, "model\t\t: %s - %s\n",
|
||||
boot_cpu_data.pdc.sys_model_name,
|
||||
cpuinfo->dev ?
|
||||
cpuinfo->dev->name : "Unknown");
|
||||
cpu_name);
|
||||
|
||||
seq_printf(m, "hversion\t: 0x%08x\n"
|
||||
"sversion\t: 0x%08x\n",
|
||||
@ -433,8 +439,8 @@ show_cpuinfo (struct seq_file *m, void *v)
|
||||
show_cache_info(m);
|
||||
|
||||
seq_printf(m, "bogomips\t: %lu.%02lu\n",
|
||||
cpuinfo->loops_per_jiffy / (500000 / HZ),
|
||||
(cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100);
|
||||
loops_per_jiffy / (500000 / HZ),
|
||||
loops_per_jiffy / (5000 / HZ) % 100);
|
||||
|
||||
seq_printf(m, "software id\t: %ld\n\n",
|
||||
boot_cpu_data.pdc.model.sw_id);
|
||||
|
||||
@ -629,6 +629,7 @@ int __init fadump_reserve_mem(void)
|
||||
return ret;
|
||||
error_out:
|
||||
fw_dump.fadump_enabled = 0;
|
||||
fw_dump.reserve_dump_area_size = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -922,7 +922,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
|
||||
*/
|
||||
lis r5, abatron_pteptrs@h
|
||||
ori r5, r5, abatron_pteptrs@l
|
||||
stw r5, 0xf0(r0) /* This much match your Abatron config */
|
||||
stw r5, 0xf0(0) /* This much match your Abatron config */
|
||||
lis r6, swapper_pg_dir@h
|
||||
ori r6, r6, swapper_pg_dir@l
|
||||
tophys(r5, r5)
|
||||
|
||||
@ -133,17 +133,28 @@ static int fail_iommu_bus_notify(struct notifier_block *nb,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct notifier_block fail_iommu_bus_notifier = {
|
||||
/*
|
||||
* PCI and VIO buses need separate notifier_block structs, since they're linked
|
||||
* list nodes. Sharing a notifier_block would mean that any notifiers later
|
||||
* registered for PCI buses would also get called by VIO buses and vice versa.
|
||||
*/
|
||||
static struct notifier_block fail_iommu_pci_bus_notifier = {
|
||||
.notifier_call = fail_iommu_bus_notify
|
||||
};
|
||||
|
||||
#ifdef CONFIG_IBMVIO
|
||||
static struct notifier_block fail_iommu_vio_bus_notifier = {
|
||||
.notifier_call = fail_iommu_bus_notify
|
||||
};
|
||||
#endif
|
||||
|
||||
static int __init fail_iommu_setup(void)
|
||||
{
|
||||
#ifdef CONFIG_PCI
|
||||
bus_register_notifier(&pci_bus_type, &fail_iommu_bus_notifier);
|
||||
bus_register_notifier(&pci_bus_type, &fail_iommu_pci_bus_notifier);
|
||||
#endif
|
||||
#ifdef CONFIG_IBMVIO
|
||||
bus_register_notifier(&vio_bus_type, &fail_iommu_bus_notifier);
|
||||
bus_register_notifier(&vio_bus_type, &fail_iommu_vio_bus_notifier);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
||||
@ -450,6 +450,7 @@ static int __init ibmebus_bus_init(void)
|
||||
if (err) {
|
||||
printk(KERN_WARNING "%s: device_register returned %i\n",
|
||||
__func__, err);
|
||||
put_device(&ibmebus_bus_device);
|
||||
bus_unregister(&ibmebus_bus_type);
|
||||
|
||||
return err;
|
||||
|
||||
@ -429,6 +429,8 @@ static struct attribute_group ipl_ccw_attr_group_lpar = {
|
||||
|
||||
static struct attribute *ipl_unknown_attrs[] = {
|
||||
&sys_ipl_type_attr.attr,
|
||||
&sys_ipl_secure_attr.attr,
|
||||
&sys_ipl_has_secure_attr.attr,
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
||||
@ -529,7 +529,7 @@ static int __init ap325rxa_devices_setup(void)
|
||||
device_initialize(&ap325rxa_ceu_device.dev);
|
||||
dma_declare_coherent_memory(&ap325rxa_ceu_device.dev,
|
||||
ceu_dma_membase, ceu_dma_membase,
|
||||
ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1);
|
||||
CEU_BUFFER_MEMORY_SIZE);
|
||||
|
||||
platform_device_add(&ap325rxa_ceu_device);
|
||||
|
||||
|
||||
@ -1442,15 +1442,13 @@ static int __init arch_setup(void)
|
||||
device_initialize(&ecovec_ceu_devices[0]->dev);
|
||||
dma_declare_coherent_memory(&ecovec_ceu_devices[0]->dev,
|
||||
ceu0_dma_membase, ceu0_dma_membase,
|
||||
ceu0_dma_membase +
|
||||
CEU_BUFFER_MEMORY_SIZE - 1);
|
||||
CEU_BUFFER_MEMORY_SIZE);
|
||||
platform_device_add(ecovec_ceu_devices[0]);
|
||||
|
||||
device_initialize(&ecovec_ceu_devices[1]->dev);
|
||||
dma_declare_coherent_memory(&ecovec_ceu_devices[1]->dev,
|
||||
ceu1_dma_membase, ceu1_dma_membase,
|
||||
ceu1_dma_membase +
|
||||
CEU_BUFFER_MEMORY_SIZE - 1);
|
||||
CEU_BUFFER_MEMORY_SIZE);
|
||||
platform_device_add(ecovec_ceu_devices[1]);
|
||||
|
||||
gpiod_add_lookup_table(&cn12_power_gpiod_table);
|
||||
|
||||
@ -603,7 +603,7 @@ static int __init kfr2r09_devices_setup(void)
|
||||
device_initialize(&kfr2r09_ceu_device.dev);
|
||||
dma_declare_coherent_memory(&kfr2r09_ceu_device.dev,
|
||||
ceu_dma_membase, ceu_dma_membase,
|
||||
ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1);
|
||||
CEU_BUFFER_MEMORY_SIZE);
|
||||
|
||||
platform_device_add(&kfr2r09_ceu_device);
|
||||
|
||||
|
||||
@ -604,7 +604,7 @@ static int __init migor_devices_setup(void)
|
||||
device_initialize(&migor_ceu_device.dev);
|
||||
dma_declare_coherent_memory(&migor_ceu_device.dev,
|
||||
ceu_dma_membase, ceu_dma_membase,
|
||||
ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1);
|
||||
CEU_BUFFER_MEMORY_SIZE);
|
||||
|
||||
platform_device_add(&migor_ceu_device);
|
||||
|
||||
|
||||
@ -939,15 +939,13 @@ static int __init devices_setup(void)
|
||||
device_initialize(&ms7724se_ceu_devices[0]->dev);
|
||||
dma_declare_coherent_memory(&ms7724se_ceu_devices[0]->dev,
|
||||
ceu0_dma_membase, ceu0_dma_membase,
|
||||
ceu0_dma_membase +
|
||||
CEU_BUFFER_MEMORY_SIZE - 1);
|
||||
CEU_BUFFER_MEMORY_SIZE);
|
||||
platform_device_add(ms7724se_ceu_devices[0]);
|
||||
|
||||
device_initialize(&ms7724se_ceu_devices[1]->dev);
|
||||
dma_declare_coherent_memory(&ms7724se_ceu_devices[1]->dev,
|
||||
ceu1_dma_membase, ceu1_dma_membase,
|
||||
ceu1_dma_membase +
|
||||
CEU_BUFFER_MEMORY_SIZE - 1);
|
||||
CEU_BUFFER_MEMORY_SIZE);
|
||||
platform_device_add(ms7724se_ceu_devices[1]);
|
||||
|
||||
return platform_add_devices(ms7724se_devices,
|
||||
|
||||
@ -35,6 +35,7 @@ CONFIG_TTY_CHAN=y
|
||||
CONFIG_XTERM_CHAN=y
|
||||
CONFIG_CON_CHAN="pts"
|
||||
CONFIG_SSL_CHAN="pts"
|
||||
CONFIG_SOUND=m
|
||||
CONFIG_UML_SOUND=m
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
|
||||
@ -33,6 +33,7 @@ CONFIG_TTY_CHAN=y
|
||||
CONFIG_XTERM_CHAN=y
|
||||
CONFIG_CON_CHAN="pts"
|
||||
CONFIG_SSL_CHAN="pts"
|
||||
CONFIG_SOUND=m
|
||||
CONFIG_UML_SOUND=m
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
|
||||
@ -104,24 +104,14 @@ config SSL_CHAN
|
||||
|
||||
config UML_SOUND
|
||||
tristate "Sound support"
|
||||
depends on SOUND
|
||||
select SOUND_OSS_CORE
|
||||
help
|
||||
This option enables UML sound support. If enabled, it will pull in
|
||||
soundcore and the UML hostaudio relay, which acts as a intermediary
|
||||
the UML hostaudio relay, which acts as a intermediary
|
||||
between the host's dsp and mixer devices and the UML sound system.
|
||||
It is safe to say 'Y' here.
|
||||
|
||||
config SOUND
|
||||
tristate
|
||||
default UML_SOUND
|
||||
|
||||
config SOUND_OSS_CORE
|
||||
bool
|
||||
default UML_SOUND
|
||||
|
||||
config HOSTAUDIO
|
||||
tristate
|
||||
default UML_SOUND
|
||||
|
||||
endmenu
|
||||
|
||||
menu "UML Network Devices"
|
||||
|
||||
@ -52,7 +52,7 @@ obj-$(CONFIG_UML_NET) += net.o
|
||||
obj-$(CONFIG_MCONSOLE) += mconsole.o
|
||||
obj-$(CONFIG_MMAPPER) += mmapper_kern.o
|
||||
obj-$(CONFIG_BLK_DEV_UBD) += ubd.o
|
||||
obj-$(CONFIG_HOSTAUDIO) += hostaudio.o
|
||||
obj-$(CONFIG_UML_SOUND) += hostaudio.o
|
||||
obj-$(CONFIG_NULL_CHAN) += null.o
|
||||
obj-$(CONFIG_PORT_CHAN) += port.o
|
||||
obj-$(CONFIG_PTY_CHAN) += pty.o
|
||||
|
||||
@ -210,7 +210,7 @@ ENDPROC(efi32_stub_entry)
|
||||
#endif
|
||||
|
||||
.text
|
||||
.Lrelocated:
|
||||
SYM_FUNC_START_LOCAL_NOALIGN(.Lrelocated)
|
||||
|
||||
/*
|
||||
* Clear BSS (stack is currently empty)
|
||||
@ -261,6 +261,7 @@ ENDPROC(efi32_stub_entry)
|
||||
*/
|
||||
xorl %ebx, %ebx
|
||||
jmp *%eax
|
||||
SYM_FUNC_END(.Lrelocated)
|
||||
|
||||
#ifdef CONFIG_EFI_STUB
|
||||
.data
|
||||
|
||||
@ -381,11 +381,25 @@ ENTRY(startup_64)
|
||||
/* Save the trampoline address in RCX */
|
||||
movq %rax, %rcx
|
||||
|
||||
/* Set up 32-bit addressable stack */
|
||||
leaq TRAMPOLINE_32BIT_STACK_END(%rcx), %rsp
|
||||
|
||||
/*
|
||||
* Load the address of trampoline_return() into RDI.
|
||||
* It will be used by the trampoline to return to the main code.
|
||||
* Preserve live 64-bit registers on the stack: this is necessary
|
||||
* because the architecture does not guarantee that GPRs will retain
|
||||
* their full 64-bit values across a 32-bit mode switch.
|
||||
*/
|
||||
pushq %rbp
|
||||
pushq %rbx
|
||||
pushq %rsi
|
||||
|
||||
/*
|
||||
* Push the 64-bit address of trampoline_return() onto the new stack.
|
||||
* It will be used by the trampoline to return to the main code. Due to
|
||||
* the 32-bit mode switch, it cannot be kept it in a register either.
|
||||
*/
|
||||
leaq trampoline_return(%rip), %rdi
|
||||
pushq %rdi
|
||||
|
||||
/* Switch to compatibility mode (CS.L = 0 CS.D = 1) via far return */
|
||||
pushq $__KERNEL32_CS
|
||||
@ -393,6 +407,11 @@ ENTRY(startup_64)
|
||||
pushq %rax
|
||||
lretq
|
||||
trampoline_return:
|
||||
/* Restore live 64-bit registers */
|
||||
popq %rsi
|
||||
popq %rbx
|
||||
popq %rbp
|
||||
|
||||
/* Restore the stack, the 32-bit trampoline uses its own stack */
|
||||
leaq boot_stack_end(%rbx), %rsp
|
||||
|
||||
@ -517,7 +536,7 @@ ENDPROC(efi64_stub_entry)
|
||||
#endif
|
||||
|
||||
.text
|
||||
.Lrelocated:
|
||||
SYM_FUNC_START_LOCAL_NOALIGN(.Lrelocated)
|
||||
|
||||
/*
|
||||
* Clear BSS (stack is currently empty)
|
||||
@ -546,6 +565,7 @@ ENDPROC(efi64_stub_entry)
|
||||
* Jump to the decompressed kernel.
|
||||
*/
|
||||
jmp *%rax
|
||||
SYM_FUNC_END(.Lrelocated)
|
||||
|
||||
/*
|
||||
* Adjust the global offset table
|
||||
@ -572,7 +592,7 @@ ENDPROC(efi64_stub_entry)
|
||||
/*
|
||||
* This is the 32-bit trampoline that will be copied over to low memory.
|
||||
*
|
||||
* RDI contains the return address (might be above 4G).
|
||||
* Return address is at the top of the stack (might be above 4G).
|
||||
* ECX contains the base address of the trampoline memory.
|
||||
* Non zero RDX means trampoline needs to enable 5-level paging.
|
||||
*/
|
||||
@ -582,9 +602,6 @@ ENTRY(trampoline_32bit_src)
|
||||
movl %eax, %ds
|
||||
movl %eax, %ss
|
||||
|
||||
/* Set up new stack */
|
||||
leal TRAMPOLINE_32BIT_STACK_END(%ecx), %esp
|
||||
|
||||
/* Disable paging */
|
||||
movl %cr0, %eax
|
||||
btrl $X86_CR0_PG_BIT, %eax
|
||||
@ -641,9 +658,10 @@ ENTRY(trampoline_32bit_src)
|
||||
lret
|
||||
|
||||
.code64
|
||||
.Lpaging_enabled:
|
||||
SYM_FUNC_START_LOCAL_NOALIGN(.Lpaging_enabled)
|
||||
/* Return from the trampoline */
|
||||
jmp *%rdi
|
||||
retq
|
||||
SYM_FUNC_END(.Lpaging_enabled)
|
||||
|
||||
/*
|
||||
* The trampoline code has a size limit.
|
||||
@ -653,11 +671,12 @@ ENTRY(trampoline_32bit_src)
|
||||
.org trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_SIZE
|
||||
|
||||
.code32
|
||||
.Lno_longmode:
|
||||
SYM_FUNC_START_LOCAL_NOALIGN(.Lno_longmode)
|
||||
/* This isn't an x86-64 CPU, so hang intentionally, we cannot continue */
|
||||
1:
|
||||
hlt
|
||||
jmp 1b
|
||||
SYM_FUNC_END(.Lno_longmode)
|
||||
|
||||
#include "../../kernel/verify_cpu.S"
|
||||
|
||||
|
||||
@ -40,13 +40,13 @@ GLOBAL(protected_mode_jump)
|
||||
|
||||
# Transition to 32-bit mode
|
||||
.byte 0x66, 0xea # ljmpl opcode
|
||||
2: .long in_pm32 # offset
|
||||
2: .long .Lin_pm32 # offset
|
||||
.word __BOOT_CS # segment
|
||||
ENDPROC(protected_mode_jump)
|
||||
|
||||
.code32
|
||||
.section ".text32","ax"
|
||||
GLOBAL(in_pm32)
|
||||
SYM_FUNC_START_LOCAL_NOALIGN(.Lin_pm32)
|
||||
# Set up data segments for flat 32-bit mode
|
||||
movl %ecx, %ds
|
||||
movl %ecx, %es
|
||||
@ -72,4 +72,4 @@ GLOBAL(in_pm32)
|
||||
lldt %cx
|
||||
|
||||
jmpl *%eax # Jump to the 32-bit entrypoint
|
||||
ENDPROC(in_pm32)
|
||||
SYM_FUNC_END(.Lin_pm32)
|
||||
|
||||
@ -618,7 +618,7 @@ ret_from_intr:
|
||||
jz retint_kernel
|
||||
|
||||
/* Interrupt came from user space */
|
||||
GLOBAL(retint_user)
|
||||
.Lretint_user:
|
||||
mov %rsp,%rdi
|
||||
call prepare_exit_to_usermode
|
||||
TRACE_IRQS_IRETQ
|
||||
@ -1392,7 +1392,7 @@ ENTRY(error_exit)
|
||||
TRACE_IRQS_OFF
|
||||
testb $3, CS(%rsp)
|
||||
jz retint_kernel
|
||||
jmp retint_user
|
||||
jmp .Lretint_user
|
||||
END(error_exit)
|
||||
|
||||
/*
|
||||
|
||||
@ -95,12 +95,6 @@ static inline int cpu_has_svm(const char **msg)
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (boot_cpu_data.extended_cpuid_level < SVM_CPUID_FUNC) {
|
||||
if (msg)
|
||||
*msg = "can't execute cpuid_8000000a";
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (!boot_cpu_has(X86_FEATURE_SVM)) {
|
||||
if (msg)
|
||||
*msg = "svm not available";
|
||||
|
||||
@ -237,12 +237,6 @@
|
||||
extern int (*console_blank_hook)(int);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The apm_bios device is one of the misc char devices.
|
||||
* This is its minor number.
|
||||
*/
|
||||
#define APM_MINOR_DEV 134
|
||||
|
||||
/*
|
||||
* Various options can be changed at boot time as follows:
|
||||
* (We allow underscores for compatibility with the modules code)
|
||||
|
||||
@ -1147,11 +1147,11 @@ static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {
|
||||
VULNBL_INTEL_STEPPINGS(BROADWELL_G, X86_STEPPING_ANY, SRBDS),
|
||||
VULNBL_INTEL_STEPPINGS(BROADWELL_X, X86_STEPPING_ANY, MMIO),
|
||||
VULNBL_INTEL_STEPPINGS(BROADWELL, X86_STEPPING_ANY, SRBDS),
|
||||
VULNBL_INTEL_STEPPINGS(SKYLAKE_L, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED),
|
||||
VULNBL_INTEL_STEPPINGS(SKYLAKE_X, X86_STEPPING_ANY, MMIO | RETBLEED | GDS),
|
||||
VULNBL_INTEL_STEPPINGS(SKYLAKE, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED),
|
||||
VULNBL_INTEL_STEPPINGS(KABYLAKE_L, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED | GDS),
|
||||
VULNBL_INTEL_STEPPINGS(KABYLAKE, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED | GDS),
|
||||
VULNBL_INTEL_STEPPINGS(SKYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
|
||||
VULNBL_INTEL_STEPPINGS(SKYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
|
||||
VULNBL_INTEL_STEPPINGS(KABYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
|
||||
VULNBL_INTEL_STEPPINGS(KABYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
|
||||
VULNBL_INTEL_STEPPINGS(CANNONLAKE_L, X86_STEPPING_ANY, RETBLEED),
|
||||
VULNBL_INTEL_STEPPINGS(ICELAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
|
||||
VULNBL_INTEL_STEPPINGS(ICELAKE_D, X86_STEPPING_ANY, MMIO | GDS),
|
||||
|
||||
@ -73,7 +73,7 @@ ENTRY(wakeup_start)
|
||||
movw %ax, %fs
|
||||
movw %ax, %gs
|
||||
|
||||
lidtl wakeup_idt
|
||||
lidtl .Lwakeup_idt
|
||||
|
||||
/* Clear the EFLAGS */
|
||||
pushl $0
|
||||
@ -171,8 +171,8 @@ END(wakeup_gdt)
|
||||
|
||||
/* This is the standard real-mode IDT */
|
||||
.balign 16
|
||||
GLOBAL(wakeup_idt)
|
||||
.Lwakeup_idt:
|
||||
.word 0xffff /* limit */
|
||||
.long 0 /* address */
|
||||
.word 0
|
||||
END(wakeup_idt)
|
||||
END(.Lwakeup_idt)
|
||||
|
||||
@ -18,4 +18,13 @@
|
||||
#define XCHAL_SPANNING_WAY 0
|
||||
#endif
|
||||
|
||||
#ifndef XCHAL_HW_MIN_VERSION
|
||||
#if defined(XCHAL_HW_MIN_VERSION_MAJOR) && defined(XCHAL_HW_MIN_VERSION_MINOR)
|
||||
#define XCHAL_HW_MIN_VERSION (XCHAL_HW_MIN_VERSION_MAJOR * 100 + \
|
||||
XCHAL_HW_MIN_VERSION_MINOR)
|
||||
#else
|
||||
#define XCHAL_HW_MIN_VERSION 0
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@ -13,17 +13,26 @@
|
||||
#include <linux/perf_event.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <asm/core.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/stacktrace.h>
|
||||
|
||||
#define XTENSA_HWVERSION_RG_2015_0 260000
|
||||
|
||||
#if XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RG_2015_0
|
||||
#define XTENSA_PMU_ERI_BASE 0x00101000
|
||||
#else
|
||||
#define XTENSA_PMU_ERI_BASE 0x00001000
|
||||
#endif
|
||||
|
||||
/* Global control/status for all perf counters */
|
||||
#define XTENSA_PMU_PMG 0x1000
|
||||
#define XTENSA_PMU_PMG XTENSA_PMU_ERI_BASE
|
||||
/* Perf counter values */
|
||||
#define XTENSA_PMU_PM(i) (0x1080 + (i) * 4)
|
||||
#define XTENSA_PMU_PM(i) (XTENSA_PMU_ERI_BASE + 0x80 + (i) * 4)
|
||||
/* Perf counter control registers */
|
||||
#define XTENSA_PMU_PMCTRL(i) (0x1100 + (i) * 4)
|
||||
#define XTENSA_PMU_PMCTRL(i) (XTENSA_PMU_ERI_BASE + 0x100 + (i) * 4)
|
||||
/* Perf counter status registers */
|
||||
#define XTENSA_PMU_PMSTAT(i) (0x1180 + (i) * 4)
|
||||
#define XTENSA_PMU_PMSTAT(i) (XTENSA_PMU_ERI_BASE + 0x180 + (i) * 4)
|
||||
|
||||
#define XTENSA_PMU_PMG_PMEN 0x1
|
||||
|
||||
|
||||
@ -129,6 +129,11 @@ int x509_check_for_self_signed(struct x509_certificate *cert)
|
||||
if (strcmp(cert->pub->pkey_algo, cert->sig->pkey_algo) != 0)
|
||||
goto out;
|
||||
|
||||
if (cert->unsupported_sig) {
|
||||
ret = 0;
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = public_key_verify_signature(cert->pub, cert->sig);
|
||||
if (ret < 0) {
|
||||
if (ret == -ENOPKG) {
|
||||
|
||||
@ -603,7 +603,7 @@ const struct acpi_opcode_info acpi_gbl_aml_op_info[AML_NUM_OPCODES] = {
|
||||
|
||||
/* 7E */ ACPI_OP("Timer", ARGP_TIMER_OP, ARGI_TIMER_OP, ACPI_TYPE_ANY,
|
||||
AML_CLASS_EXECUTE, AML_TYPE_EXEC_0A_0T_1R,
|
||||
AML_FLAGS_EXEC_0A_0T_1R),
|
||||
AML_FLAGS_EXEC_0A_0T_1R | AML_NO_OPERAND_RESOLVE),
|
||||
|
||||
/* ACPI 5.0 opcodes */
|
||||
|
||||
|
||||
@ -1393,7 +1393,10 @@ static void __init arm_smmu_v3_pmcg_init_resources(struct resource *res,
|
||||
static struct acpi_platform_list pmcg_plat_info[] __initdata = {
|
||||
/* HiSilicon Hip08 Platform */
|
||||
{"HISI ", "HIP08 ", 0, ACPI_SIG_IORT, greater_than_or_equal,
|
||||
"Erratum #162001800", IORT_SMMU_V3_PMCG_HISI_HIP08},
|
||||
"Erratum #162001800, Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP08},
|
||||
/* HiSilicon Hip09 Platform */
|
||||
{"HISI ", "HIP09 ", 0, ACPI_SIG_IORT, greater_than_or_equal,
|
||||
"Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
|
||||
{ }
|
||||
};
|
||||
|
||||
|
||||
@ -310,6 +310,15 @@ static const struct dmi_system_id video_detect_dmi_table[] = {
|
||||
DMI_MATCH(DMI_BOARD_NAME, "Lenovo IdeaPad S405"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/* https://bugzilla.suse.com/show_bug.cgi?id=1208724 */
|
||||
.callback = video_detect_force_native,
|
||||
/* Lenovo Ideapad Z470 */
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
|
||||
DMI_MATCH(DMI_PRODUCT_VERSION, "IdeaPad Z470"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/* https://bugzilla.redhat.com/show_bug.cgi?id=1187004 */
|
||||
.callback = video_detect_force_native,
|
||||
|
||||
@ -364,6 +364,7 @@ static void amba_device_release(struct device *dev)
|
||||
{
|
||||
struct amba_device *d = to_amba_device(dev);
|
||||
|
||||
of_node_put(d->dev.of_node);
|
||||
if (d->res.parent)
|
||||
release_resource(&d->res);
|
||||
kfree(d);
|
||||
|
||||
@ -570,6 +570,7 @@ static struct platform_driver pata_ftide010_driver = {
|
||||
};
|
||||
module_platform_driver(pata_ftide010_driver);
|
||||
|
||||
MODULE_DESCRIPTION("low level driver for Faraday Technology FTIDE010");
|
||||
MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("platform:" DRV_NAME);
|
||||
|
||||
@ -435,6 +435,7 @@ static struct platform_driver gemini_sata_driver = {
|
||||
};
|
||||
module_platform_driver(gemini_sata_driver);
|
||||
|
||||
MODULE_DESCRIPTION("low level driver for Cortina Systems Gemini SATA bridge");
|
||||
MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("platform:" DRV_NAME);
|
||||
|
||||
@ -277,7 +277,7 @@ static int regcache_rbtree_insert_to_block(struct regmap *map,
|
||||
|
||||
blk = krealloc(rbnode->block,
|
||||
blklen * map->cache_word_size,
|
||||
GFP_KERNEL);
|
||||
map->alloc_flags);
|
||||
if (!blk)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -286,7 +286,7 @@ static int regcache_rbtree_insert_to_block(struct regmap *map,
|
||||
if (BITS_TO_LONGS(blklen) > BITS_TO_LONGS(rbnode->blklen)) {
|
||||
present = krealloc(rbnode->cache_present,
|
||||
BITS_TO_LONGS(blklen) * sizeof(*present),
|
||||
GFP_KERNEL);
|
||||
map->alloc_flags);
|
||||
if (!present)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -320,7 +320,7 @@ regcache_rbtree_node_alloc(struct regmap *map, unsigned int reg)
|
||||
const struct regmap_range *range;
|
||||
int i;
|
||||
|
||||
rbnode = kzalloc(sizeof(*rbnode), GFP_KERNEL);
|
||||
rbnode = kzalloc(sizeof(*rbnode), map->alloc_flags);
|
||||
if (!rbnode)
|
||||
return NULL;
|
||||
|
||||
@ -346,13 +346,13 @@ regcache_rbtree_node_alloc(struct regmap *map, unsigned int reg)
|
||||
}
|
||||
|
||||
rbnode->block = kmalloc_array(rbnode->blklen, map->cache_word_size,
|
||||
GFP_KERNEL);
|
||||
map->alloc_flags);
|
||||
if (!rbnode->block)
|
||||
goto err_free;
|
||||
|
||||
rbnode->cache_present = kcalloc(BITS_TO_LONGS(rbnode->blklen),
|
||||
sizeof(*rbnode->cache_present),
|
||||
GFP_KERNEL);
|
||||
map->alloc_flags);
|
||||
if (!rbnode->cache_present)
|
||||
goto err_free_block;
|
||||
|
||||
|
||||
@ -84,7 +84,7 @@ test_platform_device_register_node(char *name, int id, int nid)
|
||||
|
||||
pdev = platform_device_alloc(name, id);
|
||||
if (!pdev)
|
||||
return NULL;
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
if (nid != NUMA_NO_NODE)
|
||||
set_dev_node(&pdev->dev, nid);
|
||||
|
||||
@ -346,6 +346,7 @@ static void btsdio_remove(struct sdio_func *func)
|
||||
if (!data)
|
||||
return;
|
||||
|
||||
cancel_work_sync(&data->work);
|
||||
hdev = data->hdev;
|
||||
|
||||
sdio_set_drvdata(func, NULL);
|
||||
|
||||
@ -734,7 +734,11 @@ static int nokia_bluetooth_serdev_probe(struct serdev_device *serdev)
|
||||
return err;
|
||||
}
|
||||
|
||||
clk_prepare_enable(sysclk);
|
||||
err = clk_prepare_enable(sysclk);
|
||||
if (err) {
|
||||
dev_err(dev, "could not enable sysclk: %d", err);
|
||||
return err;
|
||||
}
|
||||
btdev->sysclk_speed = clk_get_rate(sysclk);
|
||||
clk_disable_unprepare(sysclk);
|
||||
|
||||
|
||||
@ -1379,6 +1379,8 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
|
||||
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47424e03, 0xffffffff,
|
||||
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
|
||||
|
||||
/* Quirks that need to be set based on the module address */
|
||||
SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -ENODEV, 0x50000800, 0xffffffff,
|
||||
|
||||
@ -202,10 +202,12 @@ static int iproc_rng200_probe(struct platform_device *pdev)
|
||||
return PTR_ERR(priv->base);
|
||||
}
|
||||
|
||||
priv->rng.name = "iproc-rng200",
|
||||
priv->rng.read = iproc_rng200_read,
|
||||
priv->rng.init = iproc_rng200_init,
|
||||
priv->rng.cleanup = iproc_rng200_cleanup,
|
||||
dev_set_drvdata(dev, priv);
|
||||
|
||||
priv->rng.name = "iproc-rng200";
|
||||
priv->rng.read = iproc_rng200_read;
|
||||
priv->rng.init = iproc_rng200_init;
|
||||
priv->rng.cleanup = iproc_rng200_cleanup;
|
||||
|
||||
/* Register driver */
|
||||
ret = devm_hwrng_register(dev, &priv->rng);
|
||||
@ -219,6 +221,28 @@ static int iproc_rng200_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __maybe_unused iproc_rng200_suspend(struct device *dev)
|
||||
{
|
||||
struct iproc_rng200_dev *priv = dev_get_drvdata(dev);
|
||||
|
||||
iproc_rng200_cleanup(&priv->rng);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __maybe_unused iproc_rng200_resume(struct device *dev)
|
||||
{
|
||||
struct iproc_rng200_dev *priv = dev_get_drvdata(dev);
|
||||
|
||||
iproc_rng200_init(&priv->rng);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops iproc_rng200_pm_ops = {
|
||||
SET_SYSTEM_SLEEP_PM_OPS(iproc_rng200_suspend, iproc_rng200_resume)
|
||||
};
|
||||
|
||||
static const struct of_device_id iproc_rng200_of_match[] = {
|
||||
{ .compatible = "brcm,bcm7211-rng200", },
|
||||
{ .compatible = "brcm,bcm7278-rng200", },
|
||||
@ -231,6 +255,7 @@ static struct platform_driver iproc_rng200_driver = {
|
||||
.driver = {
|
||||
.name = "iproc-rng200",
|
||||
.of_match_table = iproc_rng200_of_match,
|
||||
.pm = &iproc_rng200_pm_ops,
|
||||
},
|
||||
.probe = iproc_rng200_probe,
|
||||
};
|
||||
|
||||
@ -2086,6 +2086,11 @@ static int try_smi_init(struct smi_info *new_smi)
|
||||
new_smi->io.io_cleanup = NULL;
|
||||
}
|
||||
|
||||
if (rv && new_smi->si_sm) {
|
||||
kfree(new_smi->si_sm);
|
||||
new_smi->si_sm = NULL;
|
||||
}
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
|
||||
@ -1410,7 +1410,7 @@ static struct ssif_addr_info *ssif_info_find(unsigned short addr,
|
||||
restart:
|
||||
list_for_each_entry(info, &ssif_infos, link) {
|
||||
if (info->binfo.addr == addr) {
|
||||
if (info->addr_src == SI_SMBIOS)
|
||||
if (info->addr_src == SI_SMBIOS && !info->adapter_name)
|
||||
info->adapter_name = kstrdup(adapter_name,
|
||||
GFP_KERNEL);
|
||||
|
||||
@ -1609,6 +1609,11 @@ static int ssif_add_infos(struct i2c_client *client)
|
||||
info->addr_src = SI_ACPI;
|
||||
info->client = client;
|
||||
info->adapter_name = kstrdup(client->adapter->name, GFP_KERNEL);
|
||||
if (!info->adapter_name) {
|
||||
kfree(info);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
info->binfo.addr = client->addr;
|
||||
list_add_tail(&info->link, &ssif_infos);
|
||||
return 0;
|
||||
|
||||
@ -421,10 +421,17 @@ static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
|
||||
int rc;
|
||||
u32 ordinal;
|
||||
unsigned long dur;
|
||||
unsigned int try;
|
||||
|
||||
rc = tpm_tis_send_data(chip, buf, len);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
for (try = 0; try < TPM_RETRY; try++) {
|
||||
rc = tpm_tis_send_data(chip, buf, len);
|
||||
if (rc >= 0)
|
||||
/* Data transfer done successfully */
|
||||
break;
|
||||
else if (rc != -EIO)
|
||||
/* Data transfer failed, not recoverable */
|
||||
return rc;
|
||||
}
|
||||
|
||||
/* go and do it */
|
||||
rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
|
||||
|
||||
@ -302,6 +302,7 @@ config COMMON_CLK_BD718XX
|
||||
config COMMON_CLK_FIXED_MMIO
|
||||
bool "Clock driver for Memory Mapped Fixed values"
|
||||
depends on COMMON_CLK && OF
|
||||
depends on HAS_IOMEM
|
||||
help
|
||||
Support for Memory Mapped IO Fixed clocks
|
||||
|
||||
|
||||
@ -95,7 +95,7 @@ static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw,
|
||||
int prediv_value;
|
||||
int div_value;
|
||||
int ret;
|
||||
u32 val;
|
||||
u32 orig, val;
|
||||
|
||||
ret = imx8m_clk_composite_compute_dividers(rate, parent_rate,
|
||||
&prediv_value, &div_value);
|
||||
@ -104,13 +104,15 @@ static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw,
|
||||
|
||||
spin_lock_irqsave(divider->lock, flags);
|
||||
|
||||
val = readl(divider->reg);
|
||||
val &= ~((clk_div_mask(divider->width) << divider->shift) |
|
||||
(clk_div_mask(PCG_DIV_WIDTH) << PCG_DIV_SHIFT));
|
||||
orig = readl(divider->reg);
|
||||
val = orig & ~((clk_div_mask(divider->width) << divider->shift) |
|
||||
(clk_div_mask(PCG_DIV_WIDTH) << PCG_DIV_SHIFT));
|
||||
|
||||
val |= (u32)(prediv_value - 1) << divider->shift;
|
||||
val |= (u32)(div_value - 1) << PCG_DIV_SHIFT;
|
||||
writel(val, divider->reg);
|
||||
|
||||
if (val != orig)
|
||||
writel(val, divider->reg);
|
||||
|
||||
spin_unlock_irqrestore(divider->lock, flags);
|
||||
|
||||
|
||||
@ -26,73 +26,6 @@ static u32 share_count_disp;
|
||||
static u32 share_count_pdm;
|
||||
static u32 share_count_nand;
|
||||
|
||||
static const struct imx_pll14xx_rate_table imx8mm_pll1416x_tbl[] = {
|
||||
PLL_1416X_RATE(1800000000U, 225, 3, 0),
|
||||
PLL_1416X_RATE(1600000000U, 200, 3, 0),
|
||||
PLL_1416X_RATE(1200000000U, 300, 3, 1),
|
||||
PLL_1416X_RATE(1000000000U, 250, 3, 1),
|
||||
PLL_1416X_RATE(800000000U, 200, 3, 1),
|
||||
PLL_1416X_RATE(750000000U, 250, 2, 2),
|
||||
PLL_1416X_RATE(700000000U, 350, 3, 2),
|
||||
PLL_1416X_RATE(600000000U, 300, 3, 2),
|
||||
};
|
||||
|
||||
static const struct imx_pll14xx_rate_table imx8mm_audiopll_tbl[] = {
|
||||
PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),
|
||||
PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),
|
||||
};
|
||||
|
||||
static const struct imx_pll14xx_rate_table imx8mm_videopll_tbl[] = {
|
||||
PLL_1443X_RATE(650000000U, 325, 3, 2, 0),
|
||||
PLL_1443X_RATE(594000000U, 198, 2, 2, 0),
|
||||
};
|
||||
|
||||
static const struct imx_pll14xx_rate_table imx8mm_drampll_tbl[] = {
|
||||
PLL_1443X_RATE(650000000U, 325, 3, 2, 0),
|
||||
};
|
||||
|
||||
static struct imx_pll14xx_clk imx8mm_audio_pll = {
|
||||
.type = PLL_1443X,
|
||||
.rate_table = imx8mm_audiopll_tbl,
|
||||
.rate_count = ARRAY_SIZE(imx8mm_audiopll_tbl),
|
||||
};
|
||||
|
||||
static struct imx_pll14xx_clk imx8mm_video_pll = {
|
||||
.type = PLL_1443X,
|
||||
.rate_table = imx8mm_videopll_tbl,
|
||||
.rate_count = ARRAY_SIZE(imx8mm_videopll_tbl),
|
||||
};
|
||||
|
||||
static struct imx_pll14xx_clk imx8mm_dram_pll = {
|
||||
.type = PLL_1443X,
|
||||
.rate_table = imx8mm_drampll_tbl,
|
||||
.rate_count = ARRAY_SIZE(imx8mm_drampll_tbl),
|
||||
};
|
||||
|
||||
static struct imx_pll14xx_clk imx8mm_arm_pll = {
|
||||
.type = PLL_1416X,
|
||||
.rate_table = imx8mm_pll1416x_tbl,
|
||||
.rate_count = ARRAY_SIZE(imx8mm_pll1416x_tbl),
|
||||
};
|
||||
|
||||
static struct imx_pll14xx_clk imx8mm_gpu_pll = {
|
||||
.type = PLL_1416X,
|
||||
.rate_table = imx8mm_pll1416x_tbl,
|
||||
.rate_count = ARRAY_SIZE(imx8mm_pll1416x_tbl),
|
||||
};
|
||||
|
||||
static struct imx_pll14xx_clk imx8mm_vpu_pll = {
|
||||
.type = PLL_1416X,
|
||||
.rate_table = imx8mm_pll1416x_tbl,
|
||||
.rate_count = ARRAY_SIZE(imx8mm_pll1416x_tbl),
|
||||
};
|
||||
|
||||
static struct imx_pll14xx_clk imx8mm_sys_pll = {
|
||||
.type = PLL_1416X,
|
||||
.rate_table = imx8mm_pll1416x_tbl,
|
||||
.rate_count = ARRAY_SIZE(imx8mm_pll1416x_tbl),
|
||||
};
|
||||
|
||||
static const char *pll_ref_sels[] = { "osc_24m", "dummy", "dummy", "dummy", };
|
||||
static const char *audio_pll1_bypass_sels[] = {"audio_pll1", "audio_pll1_ref_sel", };
|
||||
static const char *audio_pll2_bypass_sels[] = {"audio_pll2", "audio_pll2_ref_sel", };
|
||||
@ -396,16 +329,16 @@ static int imx8mm_clocks_probe(struct platform_device *pdev)
|
||||
clks[IMX8MM_SYS_PLL2_REF_SEL] = imx_clk_mux("sys_pll2_ref_sel", base + 0x104, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
|
||||
clks[IMX8MM_SYS_PLL3_REF_SEL] = imx_clk_mux("sys_pll3_ref_sel", base + 0x114, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
|
||||
|
||||
clks[IMX8MM_AUDIO_PLL1] = imx_clk_pll14xx("audio_pll1", "audio_pll1_ref_sel", base, &imx8mm_audio_pll);
|
||||
clks[IMX8MM_AUDIO_PLL2] = imx_clk_pll14xx("audio_pll2", "audio_pll2_ref_sel", base + 0x14, &imx8mm_audio_pll);
|
||||
clks[IMX8MM_VIDEO_PLL1] = imx_clk_pll14xx("video_pll1", "video_pll1_ref_sel", base + 0x28, &imx8mm_video_pll);
|
||||
clks[IMX8MM_DRAM_PLL] = imx_clk_pll14xx("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx8mm_dram_pll);
|
||||
clks[IMX8MM_GPU_PLL] = imx_clk_pll14xx("gpu_pll", "gpu_pll_ref_sel", base + 0x64, &imx8mm_gpu_pll);
|
||||
clks[IMX8MM_VPU_PLL] = imx_clk_pll14xx("vpu_pll", "vpu_pll_ref_sel", base + 0x74, &imx8mm_vpu_pll);
|
||||
clks[IMX8MM_ARM_PLL] = imx_clk_pll14xx("arm_pll", "arm_pll_ref_sel", base + 0x84, &imx8mm_arm_pll);
|
||||
clks[IMX8MM_SYS_PLL1] = imx_clk_pll14xx("sys_pll1", "sys_pll1_ref_sel", base + 0x94, &imx8mm_sys_pll);
|
||||
clks[IMX8MM_SYS_PLL2] = imx_clk_pll14xx("sys_pll2", "sys_pll2_ref_sel", base + 0x104, &imx8mm_sys_pll);
|
||||
clks[IMX8MM_SYS_PLL3] = imx_clk_pll14xx("sys_pll3", "sys_pll3_ref_sel", base + 0x114, &imx8mm_sys_pll);
|
||||
clks[IMX8MM_AUDIO_PLL1] = imx_clk_pll14xx("audio_pll1", "audio_pll1_ref_sel", base, &imx_1443x_pll);
|
||||
clks[IMX8MM_AUDIO_PLL2] = imx_clk_pll14xx("audio_pll2", "audio_pll2_ref_sel", base + 0x14, &imx_1443x_pll);
|
||||
clks[IMX8MM_VIDEO_PLL1] = imx_clk_pll14xx("video_pll1", "video_pll1_ref_sel", base + 0x28, &imx_1443x_pll);
|
||||
clks[IMX8MM_DRAM_PLL] = imx_clk_pll14xx("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx_1443x_pll);
|
||||
clks[IMX8MM_GPU_PLL] = imx_clk_pll14xx("gpu_pll", "gpu_pll_ref_sel", base + 0x64, &imx_1416x_pll);
|
||||
clks[IMX8MM_VPU_PLL] = imx_clk_pll14xx("vpu_pll", "vpu_pll_ref_sel", base + 0x74, &imx_1416x_pll);
|
||||
clks[IMX8MM_ARM_PLL] = imx_clk_pll14xx("arm_pll", "arm_pll_ref_sel", base + 0x84, &imx_1416x_pll);
|
||||
clks[IMX8MM_SYS_PLL1] = imx_clk_pll14xx("sys_pll1", "sys_pll1_ref_sel", base + 0x94, &imx_1416x_pll);
|
||||
clks[IMX8MM_SYS_PLL2] = imx_clk_pll14xx("sys_pll2", "sys_pll2_ref_sel", base + 0x104, &imx_1416x_pll);
|
||||
clks[IMX8MM_SYS_PLL3] = imx_clk_pll14xx("sys_pll3", "sys_pll3_ref_sel", base + 0x114, &imx_1416x_pll);
|
||||
|
||||
/* PLL bypass out */
|
||||
clks[IMX8MM_AUDIO_PLL1_BYPASS] = imx_clk_mux_flags("audio_pll1_bypass", base, 16, 1, audio_pll1_bypass_sels, ARRAY_SIZE(audio_pll1_bypass_sels), CLK_SET_RATE_PARENT);
|
||||
|
||||
@ -41,6 +41,36 @@ struct clk_pll14xx {
|
||||
|
||||
#define to_clk_pll14xx(_hw) container_of(_hw, struct clk_pll14xx, hw)
|
||||
|
||||
const struct imx_pll14xx_rate_table imx_pll1416x_tbl[] = {
|
||||
PLL_1416X_RATE(1800000000U, 225, 3, 0),
|
||||
PLL_1416X_RATE(1600000000U, 200, 3, 0),
|
||||
PLL_1416X_RATE(1200000000U, 300, 3, 1),
|
||||
PLL_1416X_RATE(1000000000U, 250, 3, 1),
|
||||
PLL_1416X_RATE(800000000U, 200, 3, 1),
|
||||
PLL_1416X_RATE(750000000U, 250, 2, 2),
|
||||
PLL_1416X_RATE(700000000U, 350, 3, 2),
|
||||
PLL_1416X_RATE(600000000U, 300, 3, 2),
|
||||
};
|
||||
|
||||
const struct imx_pll14xx_rate_table imx_pll1443x_tbl[] = {
|
||||
PLL_1443X_RATE(650000000U, 325, 3, 2, 0),
|
||||
PLL_1443X_RATE(594000000U, 198, 2, 2, 0),
|
||||
PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),
|
||||
PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),
|
||||
};
|
||||
|
||||
struct imx_pll14xx_clk imx_1443x_pll = {
|
||||
.type = PLL_1443X,
|
||||
.rate_table = imx_pll1443x_tbl,
|
||||
.rate_count = ARRAY_SIZE(imx_pll1443x_tbl),
|
||||
};
|
||||
|
||||
struct imx_pll14xx_clk imx_1416x_pll = {
|
||||
.type = PLL_1416X,
|
||||
.rate_table = imx_pll1416x_tbl,
|
||||
.rate_count = ARRAY_SIZE(imx_pll1416x_tbl),
|
||||
};
|
||||
|
||||
static const struct imx_pll14xx_rate_table *imx_get_pll_settings(
|
||||
struct clk_pll14xx *pll, unsigned long rate)
|
||||
{
|
||||
|
||||
@ -50,6 +50,9 @@ struct imx_pll14xx_clk {
|
||||
int flags;
|
||||
};
|
||||
|
||||
extern struct imx_pll14xx_clk imx_1416x_pll;
|
||||
extern struct imx_pll14xx_clk imx_1443x_pll;
|
||||
|
||||
#define imx_clk_cpu(name, parent_name, div, mux, pll, step) \
|
||||
to_clk(imx_clk_hw_cpu(name, parent_name, div, mux, pll, step))
|
||||
|
||||
|
||||
@ -209,7 +209,7 @@ static void __init _of_pll_clk_init(struct device_node *node, bool pllctrl)
|
||||
}
|
||||
|
||||
clk = clk_register_pll(NULL, node->name, parent_name, pll_data);
|
||||
if (clk) {
|
||||
if (!IS_ERR_OR_NULL(clk)) {
|
||||
of_clk_add_provider(node, of_clk_src_simple_get, clk);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -58,7 +58,7 @@ static struct clk_regmap pll0_vote = {
|
||||
.enable_mask = BIT(0),
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "pll0_vote",
|
||||
.parent_names = (const char *[]){ "pll8" },
|
||||
.parent_names = (const char *[]){ "pll0" },
|
||||
.num_parents = 1,
|
||||
.ops = &clk_pll_vote_ops,
|
||||
},
|
||||
|
||||
@ -43,7 +43,7 @@ int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode)
|
||||
EXPORT_SYMBOL_GPL(sunxi_ccu_set_mmc_timing_mode);
|
||||
|
||||
/**
|
||||
* sunxi_ccu_set_mmc_timing_mode: Get the current MMC clock timing mode
|
||||
* sunxi_ccu_get_mmc_timing_mode: Get the current MMC clock timing mode
|
||||
* @clk: clock to query
|
||||
*
|
||||
* Returns 0 if the clock is in old timing mode, > 0 if it is in
|
||||
|
||||
@ -410,7 +410,11 @@ brcm_avs_get_freq_table(struct device *dev, struct private_data *priv)
|
||||
if (ret)
|
||||
return ERR_PTR(ret);
|
||||
|
||||
table = devm_kcalloc(dev, AVS_PSTATE_MAX + 1, sizeof(*table),
|
||||
/*
|
||||
* We allocate space for the 5 different P-STATES AVS,
|
||||
* plus extra space for a terminating element.
|
||||
*/
|
||||
table = devm_kcalloc(dev, AVS_PSTATE_MAX + 1 + 1, sizeof(*table),
|
||||
GFP_KERNEL);
|
||||
if (!table)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
@ -451,8 +451,10 @@ void cpufreq_freq_transition_end(struct cpufreq_policy *policy,
|
||||
|
||||
cpufreq_notify_post_transition(policy, freqs, transition_failed);
|
||||
|
||||
spin_lock(&policy->transition_lock);
|
||||
policy->transition_ongoing = false;
|
||||
policy->transition_task = NULL;
|
||||
spin_unlock(&policy->transition_lock);
|
||||
|
||||
wake_up(&policy->transition_wait);
|
||||
}
|
||||
|
||||
@ -1101,7 +1101,8 @@ static int powernowk8_cpu_exit(struct cpufreq_policy *pol)
|
||||
|
||||
kfree(data->powernow_table);
|
||||
kfree(data);
|
||||
for_each_cpu(cpu, pol->cpus)
|
||||
/* pol->cpus will be empty here, use related_cpus instead. */
|
||||
for_each_cpu(cpu, pol->related_cpus)
|
||||
per_cpu(powernow_data, cpu) = NULL;
|
||||
|
||||
return 0;
|
||||
|
||||
@ -225,7 +225,9 @@ static int caam_rsa_count_leading_zeros(struct scatterlist *sgl,
|
||||
if (len && *buff)
|
||||
break;
|
||||
|
||||
sg_miter_next(&miter);
|
||||
if (!sg_miter_next(&miter))
|
||||
break;
|
||||
|
||||
buff = miter.addr;
|
||||
len = miter.length;
|
||||
|
||||
|
||||
@ -562,9 +562,9 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev)
|
||||
}
|
||||
|
||||
for_each_sg(rctx->sg, tsg, rctx->nents, i) {
|
||||
sg[0] = *tsg;
|
||||
len = sg->length;
|
||||
|
||||
sg[0] = *tsg;
|
||||
if (sg_is_last(sg)) {
|
||||
if (hdev->dma_mode == 1) {
|
||||
len = (ALIGN(sg->length, 16) - 16);
|
||||
@ -1553,9 +1553,7 @@ static int stm32_hash_remove(struct platform_device *pdev)
|
||||
if (!hdev)
|
||||
return -ENODEV;
|
||||
|
||||
ret = pm_runtime_resume_and_get(hdev->dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
ret = pm_runtime_get_sync(hdev->dev);
|
||||
|
||||
stm32_hash_unregister_algs(hdev);
|
||||
|
||||
@ -1571,7 +1569,8 @@ static int stm32_hash_remove(struct platform_device *pdev)
|
||||
pm_runtime_disable(hdev->dev);
|
||||
pm_runtime_put_noidle(hdev->dev);
|
||||
|
||||
clk_disable_unprepare(hdev->clk);
|
||||
if (ret >= 0)
|
||||
clk_disable_unprepare(hdev->clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -595,6 +595,7 @@ static void devfreq_dev_release(struct device *dev)
|
||||
devfreq->profile->exit(devfreq->dev.parent);
|
||||
|
||||
mutex_destroy(&devfreq->lock);
|
||||
srcu_cleanup_notifier_head(&devfreq->transition_notifier_list);
|
||||
kfree(devfreq);
|
||||
}
|
||||
|
||||
|
||||
@ -208,6 +208,7 @@ config FSL_DMA
|
||||
config FSL_EDMA
|
||||
tristate "Freescale eDMA engine support"
|
||||
depends on OF
|
||||
depends on HAS_IOMEM
|
||||
select DMA_ENGINE
|
||||
select DMA_VIRTUAL_CHANNELS
|
||||
help
|
||||
@ -268,6 +269,7 @@ config IMX_SDMA
|
||||
|
||||
config INTEL_IDMA64
|
||||
tristate "Intel integrated DMA 64-bit support"
|
||||
depends on HAS_IOMEM
|
||||
select DMA_ENGINE
|
||||
select DMA_VIRTUAL_CHANNELS
|
||||
help
|
||||
|
||||
@ -3599,6 +3599,10 @@ static int __init d40_probe(struct platform_device *pdev)
|
||||
spin_lock_init(&base->lcla_pool.lock);
|
||||
|
||||
base->irq = platform_get_irq(pdev, 0);
|
||||
if (base->irq < 0) {
|
||||
ret = base->irq;
|
||||
goto destroy_cache;
|
||||
}
|
||||
|
||||
ret = request_irq(base->irq, d40_handle_interrupt, 0, D40_NAME, base);
|
||||
if (ret) {
|
||||
|
||||
@ -616,7 +616,7 @@ svc_create_memory_pool(struct platform_device *pdev,
|
||||
paddr = begin;
|
||||
size = end - begin;
|
||||
va = devm_memremap(dev, paddr, size, MEMREMAP_WC);
|
||||
if (!va) {
|
||||
if (IS_ERR(va)) {
|
||||
dev_err(dev, "fail to remap shared memory\n");
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
@ -1438,3 +1438,4 @@ static struct platform_driver fsi_master_acf = {
|
||||
|
||||
module_platform_driver(fsi_master_acf);
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_FIRMWARE(FW_FILE_NAME);
|
||||
|
||||
@ -43,7 +43,6 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
|
||||
struct drm_gem_object *gobj;
|
||||
struct amdgpu_bo *bo;
|
||||
unsigned long size;
|
||||
int r;
|
||||
|
||||
gobj = drm_gem_object_lookup(p->filp, data->handle);
|
||||
if (gobj == NULL)
|
||||
@ -58,23 +57,14 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
|
||||
drm_gem_object_put_unlocked(gobj);
|
||||
|
||||
size = amdgpu_bo_size(bo);
|
||||
if (size != PAGE_SIZE || (data->offset + 8) > size) {
|
||||
r = -EINVAL;
|
||||
goto error_unref;
|
||||
}
|
||||
if (size != PAGE_SIZE || data->offset > (size - 8))
|
||||
return -EINVAL;
|
||||
|
||||
if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm)) {
|
||||
r = -EINVAL;
|
||||
goto error_unref;
|
||||
}
|
||||
if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm))
|
||||
return -EINVAL;
|
||||
|
||||
*offset = data->offset;
|
||||
|
||||
return 0;
|
||||
|
||||
error_unref:
|
||||
amdgpu_bo_unref(&bo);
|
||||
return r;
|
||||
}
|
||||
|
||||
static int amdgpu_cs_bo_handles_chunk(struct amdgpu_cs_parser *p,
|
||||
|
||||
@ -759,6 +759,9 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
|
||||
u16 cmd;
|
||||
int r;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_PHYS_ADDR_T_64BIT))
|
||||
return 0;
|
||||
|
||||
/* Bypass for VF */
|
||||
if (amdgpu_sriov_vf(adev))
|
||||
return 0;
|
||||
|
||||
@ -471,6 +471,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
|
||||
crtc = (struct drm_crtc *)minfo->crtcs[i];
|
||||
if (crtc && crtc->base.id == info->mode_crtc.id) {
|
||||
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
|
||||
|
||||
ui32 = amdgpu_crtc->crtc_id;
|
||||
found = 1;
|
||||
break;
|
||||
@ -489,7 +490,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = copy_to_user(out, &ip, min((size_t)size, sizeof(ip)));
|
||||
ret = copy_to_user(out, &ip, min_t(size_t, size, sizeof(ip)));
|
||||
return ret ? -EFAULT : 0;
|
||||
}
|
||||
case AMDGPU_INFO_HW_IP_COUNT: {
|
||||
@ -625,17 +626,18 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
|
||||
? -EFAULT : 0;
|
||||
}
|
||||
case AMDGPU_INFO_READ_MMR_REG: {
|
||||
unsigned n, alloc_size;
|
||||
unsigned int n, alloc_size;
|
||||
uint32_t *regs;
|
||||
unsigned se_num = (info->read_mmr_reg.instance >>
|
||||
unsigned int se_num = (info->read_mmr_reg.instance >>
|
||||
AMDGPU_INFO_MMR_SE_INDEX_SHIFT) &
|
||||
AMDGPU_INFO_MMR_SE_INDEX_MASK;
|
||||
unsigned sh_num = (info->read_mmr_reg.instance >>
|
||||
unsigned int sh_num = (info->read_mmr_reg.instance >>
|
||||
AMDGPU_INFO_MMR_SH_INDEX_SHIFT) &
|
||||
AMDGPU_INFO_MMR_SH_INDEX_MASK;
|
||||
|
||||
/* set full masks if the userspace set all bits
|
||||
* in the bitfields */
|
||||
* in the bitfields
|
||||
*/
|
||||
if (se_num == AMDGPU_INFO_MMR_SE_INDEX_MASK)
|
||||
se_num = 0xffffffff;
|
||||
else if (se_num >= AMDGPU_GFX_MAX_SE)
|
||||
@ -766,7 +768,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
|
||||
min((size_t)size, sizeof(dev_info))) ? -EFAULT : 0;
|
||||
}
|
||||
case AMDGPU_INFO_VCE_CLOCK_TABLE: {
|
||||
unsigned i;
|
||||
unsigned int i;
|
||||
struct drm_amdgpu_info_vce_clock_table vce_clk_table = {};
|
||||
struct amd_vce_state *vce_state;
|
||||
|
||||
|
||||
@ -1384,7 +1384,6 @@ static int cik_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk)
|
||||
static void cik_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
{
|
||||
struct pci_dev *root = adev->pdev->bus->self;
|
||||
int bridge_pos, gpu_pos;
|
||||
u32 speed_cntl, current_data_rate;
|
||||
int i;
|
||||
u16 tmp16;
|
||||
@ -1419,12 +1418,7 @@ static void cik_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
DRM_INFO("enabling PCIE gen 2 link speeds, disable with amdgpu.pcie_gen2=0\n");
|
||||
}
|
||||
|
||||
bridge_pos = pci_pcie_cap(root);
|
||||
if (!bridge_pos)
|
||||
return;
|
||||
|
||||
gpu_pos = pci_pcie_cap(adev->pdev);
|
||||
if (!gpu_pos)
|
||||
if (!pci_is_pcie(root) || !pci_is_pcie(adev->pdev))
|
||||
return;
|
||||
|
||||
if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) {
|
||||
@ -1434,14 +1428,8 @@ static void cik_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
u16 bridge_cfg2, gpu_cfg2;
|
||||
u32 max_lw, current_lw, tmp;
|
||||
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL, &bridge_cfg);
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg);
|
||||
|
||||
tmp16 = bridge_cfg | PCI_EXP_LNKCTL_HAWD;
|
||||
pci_write_config_word(root, bridge_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
|
||||
tmp16 = gpu_cfg | PCI_EXP_LNKCTL_HAWD;
|
||||
pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
pcie_capability_set_word(root, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_HAWD);
|
||||
pcie_capability_set_word(adev->pdev, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_HAWD);
|
||||
|
||||
tmp = RREG32_PCIE(ixPCIE_LC_STATUS1);
|
||||
max_lw = (tmp & PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH_MASK) >>
|
||||
@ -1465,15 +1453,23 @@ static void cik_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
|
||||
for (i = 0; i < 10; i++) {
|
||||
/* check status */
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_DEVSTA, &tmp16);
|
||||
pcie_capability_read_word(adev->pdev,
|
||||
PCI_EXP_DEVSTA,
|
||||
&tmp16);
|
||||
if (tmp16 & PCI_EXP_DEVSTA_TRPND)
|
||||
break;
|
||||
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL, &bridge_cfg);
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg);
|
||||
pcie_capability_read_word(root, PCI_EXP_LNKCTL,
|
||||
&bridge_cfg);
|
||||
pcie_capability_read_word(adev->pdev,
|
||||
PCI_EXP_LNKCTL,
|
||||
&gpu_cfg);
|
||||
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL2, &bridge_cfg2);
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &gpu_cfg2);
|
||||
pcie_capability_read_word(root, PCI_EXP_LNKCTL2,
|
||||
&bridge_cfg2);
|
||||
pcie_capability_read_word(adev->pdev,
|
||||
PCI_EXP_LNKCTL2,
|
||||
&gpu_cfg2);
|
||||
|
||||
tmp = RREG32_PCIE(ixPCIE_LC_CNTL4);
|
||||
tmp |= PCIE_LC_CNTL4__LC_SET_QUIESCE_MASK;
|
||||
@ -1486,26 +1482,38 @@ static void cik_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
msleep(100);
|
||||
|
||||
/* linkctl */
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL, &tmp16);
|
||||
tmp16 &= ~PCI_EXP_LNKCTL_HAWD;
|
||||
tmp16 |= (bridge_cfg & PCI_EXP_LNKCTL_HAWD);
|
||||
pci_write_config_word(root, bridge_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &tmp16);
|
||||
tmp16 &= ~PCI_EXP_LNKCTL_HAWD;
|
||||
tmp16 |= (gpu_cfg & PCI_EXP_LNKCTL_HAWD);
|
||||
pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
pcie_capability_clear_and_set_word(root, PCI_EXP_LNKCTL,
|
||||
PCI_EXP_LNKCTL_HAWD,
|
||||
bridge_cfg &
|
||||
PCI_EXP_LNKCTL_HAWD);
|
||||
pcie_capability_clear_and_set_word(adev->pdev, PCI_EXP_LNKCTL,
|
||||
PCI_EXP_LNKCTL_HAWD,
|
||||
gpu_cfg &
|
||||
PCI_EXP_LNKCTL_HAWD);
|
||||
|
||||
/* linkctl2 */
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~((1 << 4) | (7 << 9));
|
||||
tmp16 |= (bridge_cfg2 & ((1 << 4) | (7 << 9)));
|
||||
pci_write_config_word(root, bridge_pos + PCI_EXP_LNKCTL2, tmp16);
|
||||
pcie_capability_read_word(root, PCI_EXP_LNKCTL2,
|
||||
&tmp16);
|
||||
tmp16 &= ~(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN);
|
||||
tmp16 |= (bridge_cfg2 &
|
||||
(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN));
|
||||
pcie_capability_write_word(root,
|
||||
PCI_EXP_LNKCTL2,
|
||||
tmp16);
|
||||
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~((1 << 4) | (7 << 9));
|
||||
tmp16 |= (gpu_cfg2 & ((1 << 4) | (7 << 9)));
|
||||
pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16);
|
||||
pcie_capability_read_word(adev->pdev,
|
||||
PCI_EXP_LNKCTL2,
|
||||
&tmp16);
|
||||
tmp16 &= ~(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN);
|
||||
tmp16 |= (gpu_cfg2 &
|
||||
(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN));
|
||||
pcie_capability_write_word(adev->pdev,
|
||||
PCI_EXP_LNKCTL2,
|
||||
tmp16);
|
||||
|
||||
tmp = RREG32_PCIE(ixPCIE_LC_CNTL4);
|
||||
tmp &= ~PCIE_LC_CNTL4__LC_SET_QUIESCE_MASK;
|
||||
@ -1520,15 +1528,16 @@ static void cik_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
speed_cntl &= ~PCIE_LC_SPEED_CNTL__LC_FORCE_DIS_SW_SPEED_CHANGE_MASK;
|
||||
WREG32_PCIE(ixPCIE_LC_SPEED_CNTL, speed_cntl);
|
||||
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~0xf;
|
||||
pcie_capability_read_word(adev->pdev, PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~PCI_EXP_LNKCTL2_TLS;
|
||||
|
||||
if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)
|
||||
tmp16 |= 3; /* gen3 */
|
||||
tmp16 |= PCI_EXP_LNKCTL2_TLS_8_0GT; /* gen3 */
|
||||
else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2)
|
||||
tmp16 |= 2; /* gen2 */
|
||||
tmp16 |= PCI_EXP_LNKCTL2_TLS_5_0GT; /* gen2 */
|
||||
else
|
||||
tmp16 |= 1; /* gen1 */
|
||||
pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16);
|
||||
tmp16 |= PCI_EXP_LNKCTL2_TLS_2_5GT; /* gen1 */
|
||||
pcie_capability_write_word(adev->pdev, PCI_EXP_LNKCTL2, tmp16);
|
||||
|
||||
speed_cntl = RREG32_PCIE(ixPCIE_LC_SPEED_CNTL);
|
||||
speed_cntl |= PCIE_LC_SPEED_CNTL__LC_INITIATE_LINK_SPEED_CHANGE_MASK;
|
||||
|
||||
@ -1633,7 +1633,6 @@ static void si_init_golden_registers(struct amdgpu_device *adev)
|
||||
static void si_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
{
|
||||
struct pci_dev *root = adev->pdev->bus->self;
|
||||
int bridge_pos, gpu_pos;
|
||||
u32 speed_cntl, current_data_rate;
|
||||
int i;
|
||||
u16 tmp16;
|
||||
@ -1668,12 +1667,7 @@ static void si_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
DRM_INFO("enabling PCIE gen 2 link speeds, disable with amdgpu.pcie_gen2=0\n");
|
||||
}
|
||||
|
||||
bridge_pos = pci_pcie_cap(root);
|
||||
if (!bridge_pos)
|
||||
return;
|
||||
|
||||
gpu_pos = pci_pcie_cap(adev->pdev);
|
||||
if (!gpu_pos)
|
||||
if (!pci_is_pcie(root) || !pci_is_pcie(adev->pdev))
|
||||
return;
|
||||
|
||||
if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) {
|
||||
@ -1682,14 +1676,8 @@ static void si_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
u16 bridge_cfg2, gpu_cfg2;
|
||||
u32 max_lw, current_lw, tmp;
|
||||
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL, &bridge_cfg);
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg);
|
||||
|
||||
tmp16 = bridge_cfg | PCI_EXP_LNKCTL_HAWD;
|
||||
pci_write_config_word(root, bridge_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
|
||||
tmp16 = gpu_cfg | PCI_EXP_LNKCTL_HAWD;
|
||||
pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
pcie_capability_set_word(root, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_HAWD);
|
||||
pcie_capability_set_word(adev->pdev, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_HAWD);
|
||||
|
||||
tmp = RREG32_PCIE(PCIE_LC_STATUS1);
|
||||
max_lw = (tmp & LC_DETECTED_LINK_WIDTH_MASK) >> LC_DETECTED_LINK_WIDTH_SHIFT;
|
||||
@ -1706,15 +1694,23 @@ static void si_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
}
|
||||
|
||||
for (i = 0; i < 10; i++) {
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_DEVSTA, &tmp16);
|
||||
pcie_capability_read_word(adev->pdev,
|
||||
PCI_EXP_DEVSTA,
|
||||
&tmp16);
|
||||
if (tmp16 & PCI_EXP_DEVSTA_TRPND)
|
||||
break;
|
||||
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL, &bridge_cfg);
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg);
|
||||
pcie_capability_read_word(root, PCI_EXP_LNKCTL,
|
||||
&bridge_cfg);
|
||||
pcie_capability_read_word(adev->pdev,
|
||||
PCI_EXP_LNKCTL,
|
||||
&gpu_cfg);
|
||||
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL2, &bridge_cfg2);
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &gpu_cfg2);
|
||||
pcie_capability_read_word(root, PCI_EXP_LNKCTL2,
|
||||
&bridge_cfg2);
|
||||
pcie_capability_read_word(adev->pdev,
|
||||
PCI_EXP_LNKCTL2,
|
||||
&gpu_cfg2);
|
||||
|
||||
tmp = RREG32_PCIE_PORT(PCIE_LC_CNTL4);
|
||||
tmp |= LC_SET_QUIESCE;
|
||||
@ -1726,25 +1722,37 @@ static void si_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
|
||||
mdelay(100);
|
||||
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL, &tmp16);
|
||||
tmp16 &= ~PCI_EXP_LNKCTL_HAWD;
|
||||
tmp16 |= (bridge_cfg & PCI_EXP_LNKCTL_HAWD);
|
||||
pci_write_config_word(root, bridge_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
pcie_capability_clear_and_set_word(root, PCI_EXP_LNKCTL,
|
||||
PCI_EXP_LNKCTL_HAWD,
|
||||
bridge_cfg &
|
||||
PCI_EXP_LNKCTL_HAWD);
|
||||
pcie_capability_clear_and_set_word(adev->pdev, PCI_EXP_LNKCTL,
|
||||
PCI_EXP_LNKCTL_HAWD,
|
||||
gpu_cfg &
|
||||
PCI_EXP_LNKCTL_HAWD);
|
||||
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &tmp16);
|
||||
tmp16 &= ~PCI_EXP_LNKCTL_HAWD;
|
||||
tmp16 |= (gpu_cfg & PCI_EXP_LNKCTL_HAWD);
|
||||
pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
pcie_capability_read_word(root, PCI_EXP_LNKCTL2,
|
||||
&tmp16);
|
||||
tmp16 &= ~(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN);
|
||||
tmp16 |= (bridge_cfg2 &
|
||||
(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN));
|
||||
pcie_capability_write_word(root,
|
||||
PCI_EXP_LNKCTL2,
|
||||
tmp16);
|
||||
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~((1 << 4) | (7 << 9));
|
||||
tmp16 |= (bridge_cfg2 & ((1 << 4) | (7 << 9)));
|
||||
pci_write_config_word(root, bridge_pos + PCI_EXP_LNKCTL2, tmp16);
|
||||
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~((1 << 4) | (7 << 9));
|
||||
tmp16 |= (gpu_cfg2 & ((1 << 4) | (7 << 9)));
|
||||
pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16);
|
||||
pcie_capability_read_word(adev->pdev,
|
||||
PCI_EXP_LNKCTL2,
|
||||
&tmp16);
|
||||
tmp16 &= ~(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN);
|
||||
tmp16 |= (gpu_cfg2 &
|
||||
(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN));
|
||||
pcie_capability_write_word(adev->pdev,
|
||||
PCI_EXP_LNKCTL2,
|
||||
tmp16);
|
||||
|
||||
tmp = RREG32_PCIE_PORT(PCIE_LC_CNTL4);
|
||||
tmp &= ~LC_SET_QUIESCE;
|
||||
@ -1757,15 +1765,16 @@ static void si_pcie_gen3_enable(struct amdgpu_device *adev)
|
||||
speed_cntl &= ~LC_FORCE_DIS_SW_SPEED_CHANGE;
|
||||
WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
|
||||
|
||||
pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~0xf;
|
||||
pcie_capability_read_word(adev->pdev, PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~PCI_EXP_LNKCTL2_TLS;
|
||||
|
||||
if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)
|
||||
tmp16 |= 3;
|
||||
tmp16 |= PCI_EXP_LNKCTL2_TLS_8_0GT; /* gen3 */
|
||||
else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2)
|
||||
tmp16 |= 2;
|
||||
tmp16 |= PCI_EXP_LNKCTL2_TLS_5_0GT; /* gen2 */
|
||||
else
|
||||
tmp16 |= 1;
|
||||
pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16);
|
||||
tmp16 |= PCI_EXP_LNKCTL2_TLS_2_5GT; /* gen1 */
|
||||
pcie_capability_write_word(adev->pdev, PCI_EXP_LNKCTL2, tmp16);
|
||||
|
||||
speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
|
||||
speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE;
|
||||
|
||||
@ -199,8 +199,9 @@ struct mpcc *mpc1_insert_plane(
|
||||
/* check insert_above_mpcc exist in tree->opp_list */
|
||||
struct mpcc *temp_mpcc = tree->opp_list;
|
||||
|
||||
while (temp_mpcc && temp_mpcc->mpcc_bot != insert_above_mpcc)
|
||||
temp_mpcc = temp_mpcc->mpcc_bot;
|
||||
if (temp_mpcc != insert_above_mpcc)
|
||||
while (temp_mpcc && temp_mpcc->mpcc_bot != insert_above_mpcc)
|
||||
temp_mpcc = temp_mpcc->mpcc_bot;
|
||||
if (temp_mpcc == NULL)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@ -4,6 +4,8 @@
|
||||
* Rewritten from the dovefb driver, and Armada510 manuals.
|
||||
*/
|
||||
|
||||
#include <linux/bitfield.h>
|
||||
|
||||
#include <drm/armada_drm.h>
|
||||
#include <drm/drm_atomic.h>
|
||||
#include <drm/drm_atomic_helper.h>
|
||||
@ -446,8 +448,8 @@ static int armada_overlay_get_property(struct drm_plane *plane,
|
||||
drm_to_overlay_state(state)->colorkey_ug,
|
||||
drm_to_overlay_state(state)->colorkey_vb, 0);
|
||||
} else if (property == priv->colorkey_mode_prop) {
|
||||
*val = (drm_to_overlay_state(state)->colorkey_mode &
|
||||
CFG_CKMODE_MASK) >> ffs(CFG_CKMODE_MASK);
|
||||
*val = FIELD_GET(CFG_CKMODE_MASK,
|
||||
drm_to_overlay_state(state)->colorkey_mode);
|
||||
} else if (property == priv->brightness_prop) {
|
||||
*val = drm_to_overlay_state(state)->brightness + 256;
|
||||
} else if (property == priv->contrast_prop) {
|
||||
|
||||
@ -294,7 +294,7 @@ static void ast_init_dram_reg(struct drm_device *dev)
|
||||
;
|
||||
} while (ast_read32(ast, 0x10100) != 0xa8);
|
||||
} else {/* AST2100/1100 */
|
||||
if (ast->chip == AST2100 || ast->chip == 2200)
|
||||
if (ast->chip == AST2100 || ast->chip == AST2200)
|
||||
dram_reg_info = ast2100_dram_table_data;
|
||||
else
|
||||
dram_reg_info = ast1100_dram_table_data;
|
||||
|
||||
@ -759,8 +759,13 @@ static void adv7511_mode_set(struct adv7511 *adv7511,
|
||||
else
|
||||
low_refresh_rate = ADV7511_LOW_REFRESH_RATE_NONE;
|
||||
|
||||
regmap_update_bits(adv7511->regmap, 0xfb,
|
||||
0x6, low_refresh_rate << 1);
|
||||
if (adv7511->type == ADV7511)
|
||||
regmap_update_bits(adv7511->regmap, 0xfb,
|
||||
0x6, low_refresh_rate << 1);
|
||||
else
|
||||
regmap_update_bits(adv7511->regmap, 0x4a,
|
||||
0xc, low_refresh_rate << 2);
|
||||
|
||||
regmap_update_bits(adv7511->regmap, 0x17,
|
||||
0x60, (vsync_polarity << 6) | (hsync_polarity << 5));
|
||||
|
||||
|
||||
@ -180,7 +180,7 @@ static void tc358764_read(struct tc358764 *ctx, u16 addr, u32 *val)
|
||||
if (ret >= 0)
|
||||
le32_to_cpus(val);
|
||||
|
||||
dev_dbg(ctx->dev, "read: %d, addr: %d\n", addr, *val);
|
||||
dev_dbg(ctx->dev, "read: addr=0x%04x data=0x%08x\n", addr, *val);
|
||||
}
|
||||
|
||||
static void tc358764_write(struct tc358764 *ctx, u16 addr, u32 val)
|
||||
|
||||
@ -73,6 +73,10 @@ static void drm_gem_vram_placement(struct drm_gem_vram_object *gbo,
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Note that on error, drm_gem_vram_init will free the buffer object.
|
||||
*/
|
||||
|
||||
static int drm_gem_vram_init(struct drm_device *dev,
|
||||
struct ttm_bo_device *bdev,
|
||||
struct drm_gem_vram_object *gbo,
|
||||
@ -86,8 +90,10 @@ static int drm_gem_vram_init(struct drm_device *dev,
|
||||
gbo->bo.base.funcs = &drm_gem_vram_object_funcs;
|
||||
|
||||
ret = drm_gem_object_init(dev, &gbo->bo.base, size);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
kfree(gbo);
|
||||
return ret;
|
||||
}
|
||||
|
||||
acc_size = ttm_bo_dma_acc_size(bdev, size, sizeof(*gbo));
|
||||
|
||||
@ -98,13 +104,13 @@ static int drm_gem_vram_init(struct drm_device *dev,
|
||||
&gbo->placement, pg_align, interruptible, acc_size,
|
||||
NULL, NULL, ttm_buffer_object_destroy);
|
||||
if (ret)
|
||||
goto err_drm_gem_object_release;
|
||||
/*
|
||||
* A failing ttm_bo_init will call ttm_buffer_object_destroy
|
||||
* to release gbo->bo.base and kfree gbo.
|
||||
*/
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
|
||||
err_drm_gem_object_release:
|
||||
drm_gem_object_release(&gbo->bo.base);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -134,13 +140,9 @@ struct drm_gem_vram_object *drm_gem_vram_create(struct drm_device *dev,
|
||||
|
||||
ret = drm_gem_vram_init(dev, bdev, gbo, size, pg_align, interruptible);
|
||||
if (ret < 0)
|
||||
goto err_kfree;
|
||||
return ERR_PTR(ret);
|
||||
|
||||
return gbo;
|
||||
|
||||
err_kfree:
|
||||
kfree(gbo);
|
||||
return ERR_PTR(ret);
|
||||
}
|
||||
EXPORT_SYMBOL(drm_gem_vram_create);
|
||||
|
||||
|
||||
@ -125,9 +125,9 @@ void etnaviv_core_dump(struct etnaviv_gem_submit *submit)
|
||||
return;
|
||||
etnaviv_dump_core = false;
|
||||
|
||||
mutex_lock(&gpu->mmu_context->lock);
|
||||
mutex_lock(&submit->mmu_context->lock);
|
||||
|
||||
mmu_size = etnaviv_iommu_dump_size(gpu->mmu_context);
|
||||
mmu_size = etnaviv_iommu_dump_size(submit->mmu_context);
|
||||
|
||||
/* We always dump registers, mmu, ring, hanging cmdbuf and end marker */
|
||||
n_obj = 5;
|
||||
@ -157,7 +157,7 @@ void etnaviv_core_dump(struct etnaviv_gem_submit *submit)
|
||||
iter.start = __vmalloc(file_size, GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY,
|
||||
PAGE_KERNEL);
|
||||
if (!iter.start) {
|
||||
mutex_unlock(&gpu->mmu_context->lock);
|
||||
mutex_unlock(&submit->mmu_context->lock);
|
||||
dev_warn(gpu->dev, "failed to allocate devcoredump file\n");
|
||||
return;
|
||||
}
|
||||
@ -169,18 +169,18 @@ void etnaviv_core_dump(struct etnaviv_gem_submit *submit)
|
||||
memset(iter.hdr, 0, iter.data - iter.start);
|
||||
|
||||
etnaviv_core_dump_registers(&iter, gpu);
|
||||
etnaviv_core_dump_mmu(&iter, gpu->mmu_context, mmu_size);
|
||||
etnaviv_core_dump_mmu(&iter, submit->mmu_context, mmu_size);
|
||||
etnaviv_core_dump_mem(&iter, ETDUMP_BUF_RING, gpu->buffer.vaddr,
|
||||
gpu->buffer.size,
|
||||
etnaviv_cmdbuf_get_va(&gpu->buffer,
|
||||
&gpu->mmu_context->cmdbuf_mapping));
|
||||
&submit->mmu_context->cmdbuf_mapping));
|
||||
|
||||
etnaviv_core_dump_mem(&iter, ETDUMP_BUF_CMD,
|
||||
submit->cmdbuf.vaddr, submit->cmdbuf.size,
|
||||
etnaviv_cmdbuf_get_va(&submit->cmdbuf,
|
||||
&gpu->mmu_context->cmdbuf_mapping));
|
||||
&submit->mmu_context->cmdbuf_mapping));
|
||||
|
||||
mutex_unlock(&gpu->mmu_context->lock);
|
||||
mutex_unlock(&submit->mmu_context->lock);
|
||||
|
||||
/* Reserve space for the bomap */
|
||||
if (n_bomap_pages) {
|
||||
|
||||
@ -39,13 +39,12 @@ static void exynos_drm_crtc_atomic_disable(struct drm_crtc *crtc,
|
||||
if (exynos_crtc->ops->disable)
|
||||
exynos_crtc->ops->disable(exynos_crtc);
|
||||
|
||||
spin_lock_irq(&crtc->dev->event_lock);
|
||||
if (crtc->state->event && !crtc->state->active) {
|
||||
spin_lock_irq(&crtc->dev->event_lock);
|
||||
drm_crtc_send_vblank_event(crtc, crtc->state->event);
|
||||
spin_unlock_irq(&crtc->dev->event_lock);
|
||||
|
||||
crtc->state->event = NULL;
|
||||
}
|
||||
spin_unlock_irq(&crtc->dev->event_lock);
|
||||
}
|
||||
|
||||
static int exynos_crtc_atomic_check(struct drm_crtc *crtc,
|
||||
|
||||
@ -267,7 +267,11 @@ void *mtk_drm_gem_prime_vmap(struct drm_gem_object *obj)
|
||||
}
|
||||
mtk_gem->kvaddr = vmap(mtk_gem->pages, npages, VM_MAP,
|
||||
pgprot_writecombine(PAGE_KERNEL));
|
||||
|
||||
if (!mtk_gem->kvaddr) {
|
||||
kfree(sgt);
|
||||
kfree(mtk_gem->pages);
|
||||
return ERR_PTR(-ENOMEM);
|
||||
}
|
||||
out:
|
||||
kfree(sgt);
|
||||
|
||||
|
||||
@ -221,8 +221,7 @@ static void mdp5_plane_destroy_state(struct drm_plane *plane,
|
||||
{
|
||||
struct mdp5_plane_state *pstate = to_mdp5_plane_state(state);
|
||||
|
||||
if (state->fb)
|
||||
drm_framebuffer_put(state->fb);
|
||||
__drm_atomic_helper_plane_destroy_state(state);
|
||||
|
||||
kfree(pstate);
|
||||
}
|
||||
|
||||
@ -916,7 +916,9 @@ static const struct panel_desc auo_t215hvn01 = {
|
||||
.delay = {
|
||||
.disable = 5,
|
||||
.unprepare = 1000,
|
||||
}
|
||||
},
|
||||
.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
|
||||
.connector_type = DRM_MODE_CONNECTOR_LVDS,
|
||||
};
|
||||
|
||||
static const struct drm_display_mode avic_tm070ddh03_mode = {
|
||||
|
||||
@ -9504,7 +9504,6 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev)
|
||||
{
|
||||
struct pci_dev *root = rdev->pdev->bus->self;
|
||||
enum pci_bus_speed speed_cap;
|
||||
int bridge_pos, gpu_pos;
|
||||
u32 speed_cntl, current_data_rate;
|
||||
int i;
|
||||
u16 tmp16;
|
||||
@ -9546,12 +9545,7 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev)
|
||||
DRM_INFO("enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0\n");
|
||||
}
|
||||
|
||||
bridge_pos = pci_pcie_cap(root);
|
||||
if (!bridge_pos)
|
||||
return;
|
||||
|
||||
gpu_pos = pci_pcie_cap(rdev->pdev);
|
||||
if (!gpu_pos)
|
||||
if (!pci_is_pcie(root) || !pci_is_pcie(rdev->pdev))
|
||||
return;
|
||||
|
||||
if (speed_cap == PCIE_SPEED_8_0GT) {
|
||||
@ -9561,14 +9555,8 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev)
|
||||
u16 bridge_cfg2, gpu_cfg2;
|
||||
u32 max_lw, current_lw, tmp;
|
||||
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL, &bridge_cfg);
|
||||
pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg);
|
||||
|
||||
tmp16 = bridge_cfg | PCI_EXP_LNKCTL_HAWD;
|
||||
pci_write_config_word(root, bridge_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
|
||||
tmp16 = gpu_cfg | PCI_EXP_LNKCTL_HAWD;
|
||||
pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
pcie_capability_set_word(root, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_HAWD);
|
||||
pcie_capability_set_word(rdev->pdev, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_HAWD);
|
||||
|
||||
tmp = RREG32_PCIE_PORT(PCIE_LC_STATUS1);
|
||||
max_lw = (tmp & LC_DETECTED_LINK_WIDTH_MASK) >> LC_DETECTED_LINK_WIDTH_SHIFT;
|
||||
@ -9586,15 +9574,23 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev)
|
||||
|
||||
for (i = 0; i < 10; i++) {
|
||||
/* check status */
|
||||
pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_DEVSTA, &tmp16);
|
||||
pcie_capability_read_word(rdev->pdev,
|
||||
PCI_EXP_DEVSTA,
|
||||
&tmp16);
|
||||
if (tmp16 & PCI_EXP_DEVSTA_TRPND)
|
||||
break;
|
||||
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL, &bridge_cfg);
|
||||
pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg);
|
||||
pcie_capability_read_word(root, PCI_EXP_LNKCTL,
|
||||
&bridge_cfg);
|
||||
pcie_capability_read_word(rdev->pdev,
|
||||
PCI_EXP_LNKCTL,
|
||||
&gpu_cfg);
|
||||
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL2, &bridge_cfg2);
|
||||
pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &gpu_cfg2);
|
||||
pcie_capability_read_word(root, PCI_EXP_LNKCTL2,
|
||||
&bridge_cfg2);
|
||||
pcie_capability_read_word(rdev->pdev,
|
||||
PCI_EXP_LNKCTL2,
|
||||
&gpu_cfg2);
|
||||
|
||||
tmp = RREG32_PCIE_PORT(PCIE_LC_CNTL4);
|
||||
tmp |= LC_SET_QUIESCE;
|
||||
@ -9607,26 +9603,38 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev)
|
||||
msleep(100);
|
||||
|
||||
/* linkctl */
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL, &tmp16);
|
||||
tmp16 &= ~PCI_EXP_LNKCTL_HAWD;
|
||||
tmp16 |= (bridge_cfg & PCI_EXP_LNKCTL_HAWD);
|
||||
pci_write_config_word(root, bridge_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
|
||||
pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, &tmp16);
|
||||
tmp16 &= ~PCI_EXP_LNKCTL_HAWD;
|
||||
tmp16 |= (gpu_cfg & PCI_EXP_LNKCTL_HAWD);
|
||||
pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16);
|
||||
pcie_capability_clear_and_set_word(root, PCI_EXP_LNKCTL,
|
||||
PCI_EXP_LNKCTL_HAWD,
|
||||
bridge_cfg &
|
||||
PCI_EXP_LNKCTL_HAWD);
|
||||
pcie_capability_clear_and_set_word(rdev->pdev, PCI_EXP_LNKCTL,
|
||||
PCI_EXP_LNKCTL_HAWD,
|
||||
gpu_cfg &
|
||||
PCI_EXP_LNKCTL_HAWD);
|
||||
|
||||
/* linkctl2 */
|
||||
pci_read_config_word(root, bridge_pos + PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~((1 << 4) | (7 << 9));
|
||||
tmp16 |= (bridge_cfg2 & ((1 << 4) | (7 << 9)));
|
||||
pci_write_config_word(root, bridge_pos + PCI_EXP_LNKCTL2, tmp16);
|
||||
pcie_capability_read_word(root, PCI_EXP_LNKCTL2,
|
||||
&tmp16);
|
||||
tmp16 &= ~(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN);
|
||||
tmp16 |= (bridge_cfg2 &
|
||||
(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN));
|
||||
pcie_capability_write_word(root,
|
||||
PCI_EXP_LNKCTL2,
|
||||
tmp16);
|
||||
|
||||
pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~((1 << 4) | (7 << 9));
|
||||
tmp16 |= (gpu_cfg2 & ((1 << 4) | (7 << 9)));
|
||||
pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16);
|
||||
pcie_capability_read_word(rdev->pdev,
|
||||
PCI_EXP_LNKCTL2,
|
||||
&tmp16);
|
||||
tmp16 &= ~(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN);
|
||||
tmp16 |= (gpu_cfg2 &
|
||||
(PCI_EXP_LNKCTL2_ENTER_COMP |
|
||||
PCI_EXP_LNKCTL2_TX_MARGIN));
|
||||
pcie_capability_write_word(rdev->pdev,
|
||||
PCI_EXP_LNKCTL2,
|
||||
tmp16);
|
||||
|
||||
tmp = RREG32_PCIE_PORT(PCIE_LC_CNTL4);
|
||||
tmp &= ~LC_SET_QUIESCE;
|
||||
@ -9640,15 +9648,15 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev)
|
||||
speed_cntl &= ~LC_FORCE_DIS_SW_SPEED_CHANGE;
|
||||
WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
|
||||
|
||||
pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~0xf;
|
||||
pcie_capability_read_word(rdev->pdev, PCI_EXP_LNKCTL2, &tmp16);
|
||||
tmp16 &= ~PCI_EXP_LNKCTL2_TLS;
|
||||
if (speed_cap == PCIE_SPEED_8_0GT)
|
||||
tmp16 |= 3; /* gen3 */
|
||||
tmp16 |= PCI_EXP_LNKCTL2_TLS_8_0GT; /* gen3 */
|
||||
else if (speed_cap == PCIE_SPEED_5_0GT)
|
||||
tmp16 |= 2; /* gen2 */
|
||||
tmp16 |= PCI_EXP_LNKCTL2_TLS_5_0GT; /* gen2 */
|
||||
else
|
||||
tmp16 |= 1; /* gen1 */
|
||||
pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16);
|
||||
tmp16 |= PCI_EXP_LNKCTL2_TLS_2_5GT; /* gen1 */
|
||||
pcie_capability_write_word(rdev->pdev, PCI_EXP_LNKCTL2, tmp16);
|
||||
|
||||
speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
|
||||
speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE;
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user