serial: exar: Fix GPIO configuration for Sealevel cards based on XR17V35X
[ Upstream commit 5fdbe136ae19ab751daaa4d08d9a42f3e30d17f9 ] Sealevel XR17V35X based devices are inoperable on kernel versions 4.11 and above due to a change in the GPIO preconfiguration introduced in commit7dea8165f1
. This patch fixes this by preconfiguring the GPIO on Sealevel cards to the value (0x00) used prior to commit7dea8165f1
With GPIOs preconfigured as per commit7dea8165f1
all ports on Sealevel XR17V35X based devices become stuck in high impedance mode, regardless of dip-switch or software configuration. This causes the device to become effectively unusable. This patch (in various forms) has been distributed to our customers and no issues related to it have been reported. Fixes:7dea8165f1
("serial: exar: Preconfigure xr17v35x MPIOs as output") Signed-off-by: Matthew Howell <matthew.howell@sealevel.com> Link: https://lore.kernel.org/r/alpine.DEB.2.21.2007221605270.13247@tstest-VirtualBox Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -307,7 +307,17 @@ static void setup_gpio(struct pci_dev *pcidev, u8 __iomem *p)
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* devices will export them as GPIOs, so we pre-configure them safely
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* as inputs.
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*/
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u8 dir = pcidev->vendor == PCI_VENDOR_ID_EXAR ? 0xff : 0x00;
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u8 dir = 0x00;
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if ((pcidev->vendor == PCI_VENDOR_ID_EXAR) &&
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(pcidev->subsystem_vendor != PCI_VENDOR_ID_SEALEVEL)) {
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// Configure GPIO as inputs for Commtech adapters
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dir = 0xff;
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} else {
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// Configure GPIO as outputs for SeaLevel adapters
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dir = 0x00;
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}
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writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
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writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
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