Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Thomas Gleixner: "A small set of fixes for the usual ARM/SOC irqchip drivers - A set of fixes for mbigen to handle multiple devices in a hardware module proper - A cleanup for the mbigen config option which was pointlessly user configurable. - A cleanup for tegra replacing open coded functionality by the proper core function The config cleanup touches arch/arm64/Kconfig.platforms to select the irq chip for the related platform" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/mbigen: Make CONFIG_HISILICON_IRQ_MBIGEN a hidden option ARM64: Kconfig: Select mbigen interrupt controller on Hisilicon platform irqchip/mbigen: Handle multiple device nodes in a mbigen module irqchip/mbigen: Adjust DT bindings to handle multiple devices in a module irqchip/tegra: Switch to use irq_domain_free_irqs_common
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0f0fbec9c3
@ -21,6 +21,8 @@ Mbigen main node required properties:
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- reg: Specifies the base physical address and size of the Mbigen
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registers.
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Mbigen sub node required properties:
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------------------------------------------
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- interrupt controller: Identifies the node as an interrupt controller
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- msi-parent: Specifies the MSI controller this mbigen use.
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@ -45,15 +47,25 @@ Mbigen main node required properties:
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Examples:
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mbigen_device_gmac:intc {
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mbigen_chip_dsa {
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compatible = "hisilicon,mbigen-v2";
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reg = <0x0 0xc0080000 0x0 0x10000>;
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mbigen_gmac:intc_gmac {
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interrupt-controller;
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msi-parent = <&its_dsa 0x40b1c>;
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num-pins = <9>;
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#interrupt-cells = <2>;
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};
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mbigen_i2c:intc_i2c {
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interrupt-controller;
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msi-parent = <&its_dsa 0x40b0e>;
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num-pins = <2>;
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#interrupt-cells = <2>;
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};
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};
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Devices connect to mbigen required properties:
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----------------------------------------------------
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-interrupt-parent: Specifies the mbigen device node which device connected.
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@ -45,6 +45,7 @@ config ARCH_LAYERSCAPE
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config ARCH_HISI
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bool "Hisilicon SoC Family"
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select HISILICON_IRQ_MBIGEN
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help
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This enables support for Hisilicon ARMv8 SoC family
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@ -32,14 +32,6 @@ config ARM_GIC_V3_ITS
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bool
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select PCI_MSI_IRQ_DOMAIN
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config HISILICON_IRQ_MBIGEN
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bool "Support mbigen interrupt controller"
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default n
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depends on ARM_GIC_V3 && ARM_GIC_V3_ITS && GENERIC_MSI_IRQ_DOMAIN
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help
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Enable the mbigen interrupt controller used on
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Hisilicon platform.
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config ARM_NVIC
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bool
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select IRQ_DOMAIN
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@ -114,6 +106,12 @@ config DW_APB_ICTL
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select GENERIC_IRQ_CHIP
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select IRQ_DOMAIN
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config HISILICON_IRQ_MBIGEN
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bool
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select ARM_GIC_V3
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select ARM_GIC_V3_ITS
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select GENERIC_MSI_IRQ_DOMAIN
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config IMGPDC_IRQ
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bool
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select GENERIC_IRQ_CHIP
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@ -239,8 +239,11 @@ static struct irq_domain_ops mbigen_domain_ops = {
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static int mbigen_device_probe(struct platform_device *pdev)
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{
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struct mbigen_device *mgn_chip;
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struct resource *res;
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struct platform_device *child;
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struct irq_domain *domain;
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struct device_node *np;
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struct device *parent;
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struct resource *res;
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u32 num_pins;
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mgn_chip = devm_kzalloc(&pdev->dev, sizeof(*mgn_chip), GFP_KERNEL);
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@ -254,23 +257,30 @@ static int mbigen_device_probe(struct platform_device *pdev)
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if (IS_ERR(mgn_chip->base))
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return PTR_ERR(mgn_chip->base);
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if (of_property_read_u32(pdev->dev.of_node, "num-pins", &num_pins) < 0) {
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for_each_child_of_node(pdev->dev.of_node, np) {
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if (!of_property_read_bool(np, "interrupt-controller"))
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continue;
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parent = platform_bus_type.dev_root;
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child = of_platform_device_create(np, NULL, parent);
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if (IS_ERR(child))
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return PTR_ERR(child);
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if (of_property_read_u32(child->dev.of_node, "num-pins",
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&num_pins) < 0) {
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dev_err(&pdev->dev, "No num-pins property\n");
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return -EINVAL;
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}
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domain = platform_msi_create_device_domain(&pdev->dev, num_pins,
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domain = platform_msi_create_device_domain(&child->dev, num_pins,
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mbigen_write_msg,
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&mbigen_domain_ops,
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mgn_chip);
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if (!domain)
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return -ENOMEM;
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}
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platform_set_drvdata(pdev, mgn_chip);
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dev_info(&pdev->dev, "Allocated %d MSIs\n", num_pins);
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return 0;
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}
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@ -275,22 +275,10 @@ static int tegra_ictlr_domain_alloc(struct irq_domain *domain,
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&parent_fwspec);
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}
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static void tegra_ictlr_domain_free(struct irq_domain *domain,
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unsigned int virq,
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unsigned int nr_irqs)
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{
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unsigned int i;
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for (i = 0; i < nr_irqs; i++) {
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struct irq_data *d = irq_domain_get_irq_data(domain, virq + i);
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irq_domain_reset_irq_data(d);
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}
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}
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static const struct irq_domain_ops tegra_ictlr_domain_ops = {
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.translate = tegra_ictlr_domain_translate,
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.alloc = tegra_ictlr_domain_alloc,
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.free = tegra_ictlr_domain_free,
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.free = irq_domain_free_irqs_common,
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};
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static int __init tegra_ictlr_init(struct device_node *node,
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